2 * Versatile Express Core Tile Cortex A9x4 Support
4 #include <linux/init.h>
6 #include <linux/device.h>
7 #include <linux/dma-mapping.h>
8 #include <linux/platform_device.h>
9 #include <linux/amba/bus.h>
10 #include <linux/amba/clcd.h>
12 #include <asm/clkdev.h>
13 #include <asm/hardware/arm_timer.h>
14 #include <asm/hardware/cache-l2x0.h>
15 #include <asm/hardware/gic.h>
16 #include <asm/mach-types.h>
19 #include <mach/clkdev.h>
20 #include <mach/ct-ca9x4.h>
22 #include <plat/timer-sp.h>
24 #include <asm/mach/arch.h>
25 #include <asm/mach/map.h>
26 #include <asm/mach/time.h>
30 #include <mach/motherboard.h>
32 #define V2M_PA_CS7 0x10000000
34 static struct map_desc ct_ca9x4_io_desc[] __initdata = {
36 .virtual = __MMIO_P2V(CT_CA9X4_MPIC),
37 .pfn = __phys_to_pfn(CT_CA9X4_MPIC),
41 .virtual = __MMIO_P2V(CT_CA9X4_SP804_TIMER),
42 .pfn = __phys_to_pfn(CT_CA9X4_SP804_TIMER),
46 .virtual = __MMIO_P2V(CT_CA9X4_L2CC),
47 .pfn = __phys_to_pfn(CT_CA9X4_L2CC),
53 static void __init ct_ca9x4_map_io(void)
55 v2m_map_io(ct_ca9x4_io_desc, ARRAY_SIZE(ct_ca9x4_io_desc));
58 void __iomem *gic_cpu_base_addr;
60 static void __init ct_ca9x4_init_irq(void)
62 gic_cpu_base_addr = MMIO_P2V(A9_MPCORE_GIC_CPU);
63 gic_dist_init(0, MMIO_P2V(A9_MPCORE_GIC_DIST), 29);
64 gic_cpu_init(0, gic_cpu_base_addr);
68 static void ct_ca9x4_timer_init(void)
70 writel(0, MMIO_P2V(CT_CA9X4_TIMER0) + TIMER_CTRL);
71 writel(0, MMIO_P2V(CT_CA9X4_TIMER1) + TIMER_CTRL);
73 sp804_clocksource_init(MMIO_P2V(CT_CA9X4_TIMER1));
74 sp804_clockevents_init(MMIO_P2V(CT_CA9X4_TIMER0), IRQ_CT_CA9X4_TIMER0);
77 static struct sys_timer ct_ca9x4_timer = {
78 .init = ct_ca9x4_timer_init,
82 static struct clcd_panel xvga_panel = {
96 .vmode = FB_VMODE_NONINTERLACED,
100 .tim2 = TIM2_BCD | TIM2_IPC,
101 .cntl = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1),
105 static void ct_ca9x4_clcd_enable(struct clcd_fb *fb)
107 v2m_cfg_write(SYS_CFG_MUXFPGA | SYS_CFG_SITE_DB1, 0);
108 v2m_cfg_write(SYS_CFG_DVIMODE | SYS_CFG_SITE_DB1, 2);
111 static int ct_ca9x4_clcd_setup(struct clcd_fb *fb)
113 unsigned long framesize = 1024 * 768 * 2;
116 fb->panel = &xvga_panel;
118 fb->fb.screen_base = dma_alloc_writecombine(&fb->dev->dev, framesize,
120 if (!fb->fb.screen_base) {
121 printk(KERN_ERR "CLCD: unable to map frame buffer\n");
124 fb->fb.fix.smem_start = dma;
125 fb->fb.fix.smem_len = framesize;
130 static int ct_ca9x4_clcd_mmap(struct clcd_fb *fb, struct vm_area_struct *vma)
132 return dma_mmap_writecombine(&fb->dev->dev, vma, fb->fb.screen_base,
133 fb->fb.fix.smem_start, fb->fb.fix.smem_len);
136 static void ct_ca9x4_clcd_remove(struct clcd_fb *fb)
138 dma_free_writecombine(&fb->dev->dev, fb->fb.fix.smem_len,
139 fb->fb.screen_base, fb->fb.fix.smem_start);
142 static struct clcd_board ct_ca9x4_clcd_data = {
144 .check = clcdfb_check,
145 .decode = clcdfb_decode,
146 .enable = ct_ca9x4_clcd_enable,
147 .setup = ct_ca9x4_clcd_setup,
148 .mmap = ct_ca9x4_clcd_mmap,
149 .remove = ct_ca9x4_clcd_remove,
152 static AMBA_DEVICE(clcd, "ct:clcd", CT_CA9X4_CLCDC, &ct_ca9x4_clcd_data);
153 static AMBA_DEVICE(dmc, "ct:dmc", CT_CA9X4_DMC, NULL);
154 static AMBA_DEVICE(smc, "ct:smc", CT_CA9X4_SMC, NULL);
155 static AMBA_DEVICE(gpio, "ct:gpio", CT_CA9X4_GPIO, NULL);
157 static struct amba_device *ct_ca9x4_amba_devs[] __initdata = {
165 static long ct_round(struct clk *clk, unsigned long rate)
170 static int ct_set(struct clk *clk, unsigned long rate)
172 return v2m_cfg_write(SYS_CFG_OSC | SYS_CFG_SITE_DB1 | 1, rate);
175 static const struct clk_ops osc1_clk_ops = {
180 static struct clk osc1_clk = {
181 .ops = &osc1_clk_ops,
185 static struct clk_lookup lookups[] = {
192 static struct resource pmu_resources[] = {
194 .start = IRQ_CT_CA9X4_PMU_CPU0,
195 .end = IRQ_CT_CA9X4_PMU_CPU0,
196 .flags = IORESOURCE_IRQ,
199 .start = IRQ_CT_CA9X4_PMU_CPU1,
200 .end = IRQ_CT_CA9X4_PMU_CPU1,
201 .flags = IORESOURCE_IRQ,
204 .start = IRQ_CT_CA9X4_PMU_CPU2,
205 .end = IRQ_CT_CA9X4_PMU_CPU2,
206 .flags = IORESOURCE_IRQ,
209 .start = IRQ_CT_CA9X4_PMU_CPU3,
210 .end = IRQ_CT_CA9X4_PMU_CPU3,
211 .flags = IORESOURCE_IRQ,
215 static struct platform_device pmu_device = {
217 .id = ARM_PMU_DEVICE_CPU,
218 .num_resources = ARRAY_SIZE(pmu_resources),
219 .resource = pmu_resources,
222 static void ct_ca9x4_init(void)
226 #ifdef CONFIG_CACHE_L2X0
227 l2x0_init(MMIO_P2V(CT_CA9X4_L2CC), 0x00000000, 0xfe0fffff);
230 clkdev_add_table(lookups, ARRAY_SIZE(lookups));
232 for (i = 0; i < ARRAY_SIZE(ct_ca9x4_amba_devs); i++)
233 amba_device_register(ct_ca9x4_amba_devs[i], &iomem_resource);
235 platform_device_register(&pmu_device);
238 MACHINE_START(VEXPRESS, "ARM-Versatile Express CA9x4")
239 .phys_io = V2M_UART0,
240 .io_pg_offst = (__MMIO_P2V(V2M_UART0) >> 18) & 0xfffc,
241 .boot_params = PHYS_OFFSET + 0x00000100,
242 .map_io = ct_ca9x4_map_io,
243 .init_irq = ct_ca9x4_init_irq,
245 .timer = &ct_ca9x4_timer,
249 .init_machine = ct_ca9x4_init,