arch/arm64/kernel/cpufeature.c

   1 /*
   2  * Contains CPU feature definitions
   3  *
   4  * Copyright (C) 2015 ARM Ltd.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  17  */
  18
  19 #define pr_fmt(fmt) "alternatives: " fmt
  20
  21 #include <linux/types.h>
  22 #include <asm/cpu.h>
  23 #include <asm/cpufeature.h>
  24 #include <asm/processor.h>
  25
  26 static bool
  27 feature_matches(u64 reg, const struct arm64_cpu_capabilities *entry)
  28 {
  29         int val = cpuid_feature_extract_field(reg, entry->field_pos);
  30
  31         return val >= entry->min_field_value;
  32 }
  33
  34 #define __ID_FEAT_CHK(reg)                                              \
  35 static bool __maybe_unused                                              \
  36 has_##reg##_feature(const struct arm64_cpu_capabilities *entry)         \
  37 {                                                                       \
  38         u64 val;                                                        \
  39                                                                         \
  40         val = read_cpuid(reg##_el1);                                    \
  41         return feature_matches(val, entry);                             \
  42 }
  43
  44 __ID_FEAT_CHK(id_aa64pfr0);
  45 __ID_FEAT_CHK(id_aa64mmfr1);
  46 __ID_FEAT_CHK(id_aa64isar0);
  47
  48 static const struct arm64_cpu_capabilities arm64_features[] = {
  49         {
  50                 .desc = "GIC system register CPU interface",
  51                 .capability = ARM64_HAS_SYSREG_GIC_CPUIF,
  52                 .matches = has_id_aa64pfr0_feature,
  53                 .field_pos = 24,
  54                 .min_field_value = 1,
  55         },
  56 #ifdef CONFIG_ARM64_PAN
  57         {
  58                 .desc = "Privileged Access Never",
  59                 .capability = ARM64_HAS_PAN,
  60                 .matches = has_id_aa64mmfr1_feature,
  61                 .field_pos = 20,
  62                 .min_field_value = 1,
  63                 .enable = cpu_enable_pan,
  64         },
  65 #endif /* CONFIG_ARM64_PAN */
  66 #if defined(CONFIG_AS_LSE) && defined(CONFIG_ARM64_LSE_ATOMICS)
  67         {
  68                 .desc = "LSE atomic instructions",
  69                 .capability = ARM64_HAS_LSE_ATOMICS,
  70                 .matches = has_id_aa64isar0_feature,
  71                 .field_pos = 20,
  72                 .min_field_value = 2,
  73         },
  74 #endif /* CONFIG_AS_LSE && CONFIG_ARM64_LSE_ATOMICS */
  75         {},
  76 };
  77
  78 void check_cpu_capabilities(const struct arm64_cpu_capabilities *caps,
  79                             const char *info)
  80 {
  81         int i;
  82
  83         for (i = 0; caps[i].desc; i++) {
  84                 if (!caps[i].matches(&caps[i]))
  85                         continue;
  86
  87                 if (!cpus_have_cap(caps[i].capability))
  88                         pr_info("%s %s\n", info, caps[i].desc);
  89                 cpus_set_cap(caps[i].capability);
  90         }
  91
  92         /* second pass allows enable() to consider interacting capabilities */
  93         for (i = 0; caps[i].desc; i++) {
  94                 if (cpus_have_cap(caps[i].capability) && caps[i].enable)
  95                         caps[i].enable();
  96         }
  97 }
  98
  99 void check_local_cpu_features(void)
 100 {
 101         check_cpu_capabilities(arm64_features, "detected feature:");
 102 }