arch/powerpc/boot/dts/fsl/p2020rdb.dts

   1 /*
   2  * P2020 RDB Device Tree Source
   3  *
   4  * Copyright 2009-2012 Freescale Semiconductor Inc.
   5  *
   6  * This program is free software; you can redistribute  it and/or modify it
   7  * under  the terms of  the GNU General  Public License as published by the
   8  * Free Software Foundation;  either version 2 of the  License, or (at your
   9  * option) any later version.
  10  */
  11
  12 /include/ "p2020si-pre.dtsi"
  13
  14 / {
  15         model = "fsl,P2020RDB";
  16         compatible = "fsl,P2020RDB";
  17
  18         aliases {
  19                 ethernet0 = &enet0;
  20                 ethernet1 = &enet1;
  21                 ethernet2 = &enet2;
  22                 serial0 = &serial0;
  23                 serial1 = &serial1;
  24                 pci0 = &pci0;
  25                 pci1 = &pci1;
  26         };
  27
  28         memory {
  29                 device_type = "memory";
  30         };
  31
  32         lbc: localbus@ffe05000 {
  33                 reg = <0 0xffe05000 0 0x1000>;
  34
  35                 /* NOR and NAND Flashes */
  36                 ranges = <0x0 0x0 0x0 0xef000000 0x01000000
  37                           0x1 0x0 0x0 0xffa00000 0x00040000
  38                           0x2 0x0 0x0 0xffb00000 0x00020000>;
  39
  40                 nor@0,0 {
  41                         #address-cells = <1>;
  42                         #size-cells = <1>;
  43                         compatible = "cfi-flash";
  44                         reg = <0x0 0x0 0x1000000>;
  45                         bank-width = <2>;
  46                         device-width = <1>;
  47
  48                         partition@0 {
  49                                 /* This location must not be altered  */
  50                                 /* 256KB for Vitesse 7385 Switch firmware */
  51                                 reg = <0x0 0x00040000>;
  52                                 label = "NOR (RO) Vitesse-7385 Firmware";
  53                                 read-only;
  54                         };
  55
  56                         partition@40000 {
  57                                 /* 256KB for DTB Image */
  58                                 reg = <0x00040000 0x00040000>;
  59                                 label = "NOR (RO) DTB Image";
  60                                 read-only;
  61                         };
  62
  63                         partition@80000 {
  64                                 /* 3.5 MB for Linux Kernel Image */
  65                                 reg = <0x00080000 0x00380000>;
  66                                 label = "NOR (RO) Linux Kernel Image";
  67                                 read-only;
  68                         };
  69
  70                         partition@400000 {
  71                                 /* 11MB for JFFS2 based Root file System */
  72                                 reg = <0x00400000 0x00b00000>;
  73                                 label = "NOR (RW) JFFS2 Root File System";
  74                         };
  75
  76                         partition@f00000 {
  77                                 /* This location must not be altered  */
  78                                 /* 512KB for u-boot Bootloader Image */
  79                                 /* 512KB for u-boot Environment Variables */
  80                                 reg = <0x00f00000 0x00100000>;
  81                                 label = "NOR (RO) U-Boot Image";
  82                                 read-only;
  83                         };
  84                 };
  85
  86                 nand@1,0 {
  87                         #address-cells = <1>;
  88                         #size-cells = <1>;
  89                         compatible = "fsl,p2020-fcm-nand",
  90                                      "fsl,elbc-fcm-nand";
  91                         reg = <0x1 0x0 0x40000>;
  92
  93                         partition@0 {
  94                                 /* This location must not be altered  */
  95                                 /* 1MB for u-boot Bootloader Image */
  96                                 reg = <0x0 0x00100000>;
  97                                 label = "NAND (RO) U-Boot Image";
  98                                 read-only;
  99                         };
 100
 101                         partition@100000 {
 102                                 /* 1MB for DTB Image */
 103                                 reg = <0x00100000 0x00100000>;
 104                                 label = "NAND (RO) DTB Image";
 105                                 read-only;
 106                         };
 107
 108                         partition@200000 {
 109                                 /* 4MB for Linux Kernel Image */
 110                                 reg = <0x00200000 0x00400000>;
 111                                 label = "NAND (RO) Linux Kernel Image";
 112                                 read-only;
 113                         };
 114
 115                         partition@600000 {
 116                                 /* 4MB for Compressed Root file System Image */
 117                                 reg = <0x00600000 0x00400000>;
 118                                 label = "NAND (RO) Compressed RFS Image";
 119                                 read-only;
 120                         };
 121
 122                         partition@a00000 {
 123                                 /* 7MB for JFFS2 based Root file System */
 124                                 reg = <0x00a00000 0x00700000>;
 125                                 label = "NAND (RW) JFFS2 Root File System";
 126                         };
 127
 128                         partition@1100000 {
 129                                 /* 15MB for JFFS2 based Root file System */
 130                                 reg = <0x01100000 0x00f00000>;
 131                                 label = "NAND (RW) Writable User area";
 132                         };
 133                 };
 134
 135                 L2switch@2,0 {
 136                         #address-cells = <1>;
 137                         #size-cells = <1>;
 138                         compatible = "vitesse-7385";
 139                         reg = <0x2 0x0 0x20000>;
 140                 };
 141
 142         };
 143
 144         soc: soc@ffe00000 {
 145                 ranges = <0x0 0x0 0xffe00000 0x100000>;
 146
 147                 i2c@3000 {
 148                         rtc@68 {
 149                                 compatible = "dallas,ds1339";
 150                                 reg = <0x68>;
 151                         };
 152                 };
 153
 154                 spi@7000 {
 155                         flash@0 {
 156                                 #address-cells = <1>;
 157                                 #size-cells = <1>;
 158                                 compatible = "spansion,s25sl12801";
 159                                 reg = <0>;
 160                                 spi-max-frequency = <40000000>;
 161
 162                                 partition@0 {
 163                                         /* 512KB for u-boot Bootloader Image */
 164                                         reg = <0x0 0x00080000>;
 165                                         label = "SPI (RO) U-Boot Image";
 166                                         read-only;
 167                                 };
 168
 169                                 partition@80000 {
 170                                         /* 512KB for DTB Image */
 171                                         reg = <0x00080000 0x00080000>;
 172                                         label = "SPI (RO) DTB Image";
 173                                         read-only;
 174                                 };
 175
 176                                 partition@100000 {
 177                                         /* 4MB for Linux Kernel Image */
 178                                         reg = <0x00100000 0x00400000>;
 179                                         label = "SPI (RO) Linux Kernel Image";
 180                                         read-only;
 181                                 };
 182
 183                                 partition@500000 {
 184                                         /* 4MB for Compressed RFS Image */
 185                                         reg = <0x00500000 0x00400000>;
 186                                         label = "SPI (RO) Compressed RFS Image";
 187                                         read-only;
 188                                 };
 189
 190                                 partition@900000 {
 191                                         /* 7MB for JFFS2 based RFS */
 192                                         reg = <0x00900000 0x00700000>;
 193                                         label = "SPI (RW) JFFS2 RFS";
 194                                 };
 195                         };
 196                 };
 197
 198                 usb@22000 {
 199                         phy_type = "ulpi";
 200                         dr_mode = "host";
 201                 };
 202
 203                 mdio@24520 {
 204                         phy0: ethernet-phy@0 {
 205                                 interrupts = <3 1 0 0>;
 206                                 reg = <0x0>;
 207                         };
 208                         phy1: ethernet-phy@1 {
 209                                 interrupts = <3 1 0 0>;
 210                                 reg = <0x1>;
 211                         };
 212                         tbi-phy@2 {
 213                                 device_type = "tbi-phy";
 214                                 reg = <0x2>;
 215                         };
 216                 };
 217
 218                 mdio@25520 {
 219                         tbi0: tbi-phy@11 {
 220                                 reg = <0x11>;
 221                                 device_type = "tbi-phy";
 222                         };
 223                 };
 224
 225                 mdio@26520 {
 226                         status = "disabled";
 227                 };
 228
 229                 ptp_clock@24e00 {
 230                         fsl,tclk-period = <5>;
 231                         fsl,tmr-prsc = <200>;
 232                         fsl,tmr-add = <0xCCCCCCCD>;
 233                         fsl,tmr-fiper1 = <0x3B9AC9FB>;
 234                         fsl,tmr-fiper2 = <0x0001869B>;
 235                         fsl,max-adj = <249999999>;
 236                 };
 237
 238                 enet0: ethernet@24000 {
 239                         fixed-link = <1 1 1000 0 0>;
 240                         phy-connection-type = "rgmii-id";
 241                 };
 242
 243                 enet1: ethernet@25000 {
 244                         tbi-handle = <&tbi0>;
 245                         phy-handle = <&phy0>;
 246                         phy-connection-type = "sgmii";
 247                 };
 248
 249                 enet2: ethernet@26000 {
 250                         phy-handle = <&phy1>;
 251                         phy-connection-type = "rgmii-id";
 252                 };
 253         };
 254
 255         pci0: pcie@ffe08000 {
 256                 reg = <0 0xffe08000 0 0x1000>;
 257                 status = "disabled";
 258         };
 259
 260         pci1: pcie@ffe09000 {
 261                 reg = <0 0xffe09000 0 0x1000>;
 262                 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
 263                           0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
 264                 pcie@0 {
 265                         ranges = <0x2000000 0x0 0xa0000000
 266                                   0x2000000 0x0 0xa0000000
 267                                   0x0 0x20000000
 268
 269                                   0x1000000 0x0 0x0
 270                                   0x1000000 0x0 0x0
 271                                   0x0 0x100000>;
 272                 };
 273         };
 274
 275         pci2: pcie@ffe0a000 {
 276                 reg = <0 0xffe0a000 0 0x1000>;
 277                 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
 278                           0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
 279                 pcie@0 {
 280                         ranges = <0x2000000 0x0 0x80000000
 281                                   0x2000000 0x0 0x80000000
 282                                   0x0 0x20000000
 283
 284                                   0x1000000 0x0 0x0
 285                                   0x1000000 0x0 0x0
 286                                   0x0 0x100000>;
 287                 };
 288         };
 289 };
 290
 291 /include/ "p2020si-post.dtsi"