arch/powerpc/boot/dts/fsl/t104xrdb.dtsi

   1 /*
   2  * T1040RDB/T1042RDB Device Tree Source
   3  *
   4  * Copyright 2014 Freescale Semiconductor Inc.
   5  *
   6  * Redistribution and use in source and binary forms, with or without
   7  * modification, are permitted provided that the following conditions are met:
   8  *     * Redistributions of source code must retain the above copyright
   9  *       notice, this list of conditions and the following disclaimer.
  10  *     * Redistributions in binary form must reproduce the above copyright
  11  *       notice, this list of conditions and the following disclaimer in the
  12  *       documentation and/or other materials provided with the distribution.
  13  *     * Neither the name of Freescale Semiconductor nor the
  14  *       names of its contributors may be used to endorse or promote products
  15  *       derived from this software without specific prior written permission.
  16  *
  17  *
  18  * ALTERNATIVELY, this software may be distributed under the terms of the
  19  * GNU General Public License ("GPL") as published by the Free Software
  20  * Foundation, either version 2 of that License or (at your option) any
  21  * later version.
  22  *
  23  * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
  24  * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  25  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  26  * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  27  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  28  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  29  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  30  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  31  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  32  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  33  */
  34
  35 / {
  36         reserved-memory {
  37                 #address-cells = <2>;
  38                 #size-cells = <2>;
  39                 ranges;
  40
  41                 bman_fbpr: bman-fbpr {
  42                         size = <0 0x1000000>;
  43                         alignment = <0 0x1000000>;
  44                 };
  45                 qman_fqd: qman-fqd {
  46                         size = <0 0x400000>;
  47                         alignment = <0 0x400000>;
  48                 };
  49                 qman_pfdr: qman-pfdr {
  50                         size = <0 0x2000000>;
  51                         alignment = <0 0x2000000>;
  52                 };
  53         };
  54
  55         ifc: localbus@ffe124000 {
  56                 reg = <0xf 0xfe124000 0 0x2000>;
  57                 ranges = <0 0 0xf 0xe8000000 0x08000000
  58                           2 0 0xf 0xff800000 0x00010000
  59                           3 0 0xf 0xffdf0000 0x00008000>;
  60
  61                 nor@0,0 {
  62                         #address-cells = <1>;
  63                         #size-cells = <1>;
  64                         compatible = "cfi-flash";
  65                         reg = <0x0 0x0 0x8000000>;
  66                         bank-width = <2>;
  67                         device-width = <1>;
  68                 };
  69
  70                 nand@2,0 {
  71                         #address-cells = <1>;
  72                         #size-cells = <1>;
  73                         compatible = "fsl,ifc-nand";
  74                         reg = <0x2 0x0 0x10000>;
  75                 };
  76
  77                 cpld@3,0 {
  78                         reg = <3 0 0x300>;
  79                 };
  80         };
  81
  82         memory {
  83                 device_type = "memory";
  84         };
  85
  86         dcsr: dcsr@f00000000 {
  87                 ranges = <0x00000000 0xf 0x00000000 0x01072000>;
  88         };
  89
  90         bportals: bman-portals@ff4000000 {
  91                 ranges = <0x0 0xf 0xf4000000 0x2000000>;
  92         };
  93
  94         qportals: qman-portals@ff6000000 {
  95                 ranges = <0x0 0xf 0xf6000000 0x2000000>;
  96         };
  97
  98         soc: soc@ffe000000 {
  99                 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
 100                 reg = <0xf 0xfe000000 0 0x00001000>;
 101
 102                 spi@110000 {
 103                         flash@0 {
 104                                 #address-cells = <1>;
 105                                 #size-cells = <1>;
 106                                 compatible = "micron,n25q512a";
 107                                 reg = <0>;
 108                                 spi-max-frequency = <10000000>; /* input clock */
 109                         };
 110                 };
 111
 112                 i2c@118000 {
 113                         adt7461@4c {
 114                                 compatible = "adi,adt7461";
 115                                 reg = <0x4c>;
 116                         };
 117                 };
 118
 119                 i2c@118100 {
 120                         pca9546@77 {
 121                                 compatible = "nxp,pca9546";
 122                                 reg = <0x77>;
 123                                 #address-cells = <1>;
 124                                 #size-cells = <0>;
 125                         };
 126                 };
 127
 128         };
 129
 130         pci0: pcie@ffe240000 {
 131                 reg = <0xf 0xfe240000 0 0x10000>;
 132                 ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x10000000
 133                           0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>;
 134                 pcie@0 {
 135                         ranges = <0x02000000 0 0xe0000000
 136                                   0x02000000 0 0xe0000000
 137                                   0 0x10000000
 138
 139                                   0x01000000 0 0x00000000
 140                                   0x01000000 0 0x00000000
 141                                   0 0x00010000>;
 142                 };
 143         };
 144
 145         pci1: pcie@ffe250000 {
 146                 reg = <0xf 0xfe250000 0 0x10000>;
 147                 ranges = <0x02000000 0x0 0xe0000000 0xc 0x10000000 0x0 0x10000000
 148                           0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000>;
 149                 pcie@0 {
 150                         ranges = <0x02000000 0 0xe0000000
 151                                   0x02000000 0 0xe0000000
 152                                   0 0x10000000
 153
 154                                   0x01000000 0 0x00000000
 155                                   0x01000000 0 0x00000000
 156                                   0 0x00010000>;
 157                 };
 158         };
 159
 160         pci2: pcie@ffe260000 {
 161                 reg = <0xf 0xfe260000 0 0x10000>;
 162                 ranges = <0x02000000 0 0xe0000000 0xc 0x20000000 0 0x10000000
 163                           0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>;
 164                 pcie@0 {
 165                         ranges = <0x02000000 0 0xe0000000
 166                                   0x02000000 0 0xe0000000
 167                                   0 0x10000000
 168
 169                                   0x01000000 0 0x00000000
 170                                   0x01000000 0 0x00000000
 171                                   0 0x00010000>;
 172                 };
 173         };
 174
 175         pci3: pcie@ffe270000 {
 176                 reg = <0xf 0xfe270000 0 0x10000>;
 177                 ranges = <0x02000000 0 0xe0000000 0xc 0x30000000 0 0x10000000
 178                           0x01000000 0 0x00000000 0xf 0xf8030000 0 0x00010000>;
 179                 pcie@0 {
 180                         ranges = <0x02000000 0 0xe0000000
 181                                   0x02000000 0 0xe0000000
 182                                   0 0x10000000
 183
 184                                   0x01000000 0 0x00000000
 185                                   0x01000000 0 0x00000000
 186                                   0 0x00010000>;
 187                 };
 188         };
 189 };