arch/powerpc/boot/dts/fsl/t2081si-post.dtsi

   1 /*
   2  * T2081 Silicon/SoC Device Tree Source (post include)
   3  *
   4  * Copyright 2013 - 2014 Freescale Semiconductor Inc.
   5  *
   6  * Redistribution and use in source and binary forms, with or without
   7  * modification, are permitted provided that the following conditions are met:
   8  *     * Redistributions of source code must retain the above copyright
   9  *       notice, this list of conditions and the following disclaimer.
  10  *     * Redistributions in binary form must reproduce the above copyright
  11  *       notice, this list of conditions and the following disclaimer in the
  12  *       documentation and/or other materials provided with the distribution.
  13  *     * Neither the name of Freescale Semiconductor nor the
  14  *       names of its contributors may be used to endorse or promote products
  15  *       derived from this software without specific prior written permission.
  16  *
  17  *
  18  * ALTERNATIVELY, this software may be distributed under the terms of the
  19  * GNU General Public License ("GPL") as published by the Free Software
  20  * Foundation, either version 2 of that License or (at your option) any
  21  * later version.
  22  *
  23  * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
  24  * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  25  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  26  * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  27  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  28  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  29  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  30  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  31  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  32  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  33  */
  34
  35 &bman_fbpr {
  36         compatible = "fsl,bman-fbpr";
  37         alloc-ranges = <0 0 0x10000 0>;
  38 };
  39
  40 &qman_fqd {
  41         compatible = "fsl,qman-fqd";
  42         alloc-ranges = <0 0 0x10000 0>;
  43 };
  44
  45 &qman_pfdr {
  46         compatible = "fsl,qman-pfdr";
  47         alloc-ranges = <0 0 0x10000 0>;
  48 };
  49
  50 &ifc {
  51         #address-cells = <2>;
  52         #size-cells = <1>;
  53         compatible = "fsl,ifc", "simple-bus";
  54         interrupts = <25 2 0 0>;
  55 };
  56
  57 /* controller at 0x240000 */
  58 &pci0 {
  59         compatible = "fsl,t2080-pcie", "fsl,qoriq-pcie-v3.0", "fsl,qoriq-pcie";
  60         device_type = "pci";
  61         #size-cells = <2>;
  62         #address-cells = <3>;
  63         bus-range = <0x0 0xff>;
  64         interrupts = <20 2 0 0>;
  65         fsl,iommu-parent = <&pamu0>;
  66         pcie@0 {
  67                 reg = <0 0 0 0 0>;
  68                 #interrupt-cells = <1>;
  69                 #size-cells = <2>;
  70                 #address-cells = <3>;
  71                 device_type = "pci";
  72                 interrupts = <20 2 0 0>;
  73                 interrupt-map-mask = <0xf800 0 0 7>;
  74                 interrupt-map = <
  75                         /* IDSEL 0x0 */
  76                         0000 0 0 1 &mpic 40 1 0 0
  77                         0000 0 0 2 &mpic 1 1 0 0
  78                         0000 0 0 3 &mpic 2 1 0 0
  79                         0000 0 0 4 &mpic 3 1 0 0
  80                 >;
  81         };
  82 };
  83
  84 /* controller at 0x250000 */
  85 &pci1 {
  86         compatible = "fsl,t2080-pcie", "fsl,qoriq-pcie-v3.0", "fsl,qoriq-pcie";
  87         device_type = "pci";
  88         #size-cells = <2>;
  89         #address-cells = <3>;
  90         bus-range = <0 0xff>;
  91         interrupts = <21 2 0 0>;
  92         fsl,iommu-parent = <&pamu0>;
  93         pcie@0 {
  94                 reg = <0 0 0 0 0>;
  95                 #interrupt-cells = <1>;
  96                 #size-cells = <2>;
  97                 #address-cells = <3>;
  98                 device_type = "pci";
  99                 interrupts = <21 2 0 0>;
 100                 interrupt-map-mask = <0xf800 0 0 7>;
 101                 interrupt-map = <
 102                         /* IDSEL 0x0 */
 103                         0000 0 0 1 &mpic 41 1 0 0
 104                         0000 0 0 2 &mpic 5 1 0 0
 105                         0000 0 0 3 &mpic 6 1 0 0
 106                         0000 0 0 4 &mpic 7 1 0 0
 107                 >;
 108         };
 109 };
 110
 111 /* controller at 0x260000 */
 112 &pci2 {
 113         compatible = "fsl,t2080-pcie", "fsl,qoriq-pcie-v3.0", "fsl,qoriq-pcie";
 114         device_type = "pci";
 115         #size-cells = <2>;
 116         #address-cells = <3>;
 117         bus-range = <0x0 0xff>;
 118         interrupts = <22 2 0 0>;
 119         fsl,iommu-parent = <&pamu0>;
 120         pcie@0 {
 121                 reg = <0 0 0 0 0>;
 122                 #interrupt-cells = <1>;
 123                 #size-cells = <2>;
 124                 #address-cells = <3>;
 125                 device_type = "pci";
 126                 interrupts = <22 2 0 0>;
 127                 interrupt-map-mask = <0xf800 0 0 7>;
 128                 interrupt-map = <
 129                         /* IDSEL 0x0 */
 130                         0000 0 0 1 &mpic 42 1 0 0
 131                         0000 0 0 2 &mpic 9 1 0 0
 132                         0000 0 0 3 &mpic 10 1 0 0
 133                         0000 0 0 4 &mpic 11 1 0 0
 134                 >;
 135         };
 136 };
 137
 138 /* controller at 0x270000 */
 139 &pci3 {
 140         compatible = "fsl,t2080-pcie", "fsl,qoriq-pcie-v3.0", "fsl,qoriq-pcie";
 141         device_type = "pci";
 142         #size-cells = <2>;
 143         #address-cells = <3>;
 144         bus-range = <0x0 0xff>;
 145         interrupts = <23 2 0 0>;
 146         fsl,iommu-parent = <&pamu0>;
 147         pcie@0 {
 148                 reg = <0 0 0 0 0>;
 149                 #interrupt-cells = <1>;
 150                 #size-cells = <2>;
 151                 #address-cells = <3>;
 152                 device_type = "pci";
 153                 interrupts = <23 2 0 0>;
 154                 interrupt-map-mask = <0xf800 0 0 7>;
 155                 interrupt-map = <
 156                         /* IDSEL 0x0 */
 157                         0000 0 0 1 &mpic 43 1 0 0
 158                         0000 0 0 2 &mpic 0 1 0 0
 159                         0000 0 0 3 &mpic 4 1 0 0
 160                         0000 0 0 4 &mpic 8 1 0 0
 161                 >;
 162         };
 163 };
 164
 165 &dcsr {
 166         #address-cells = <1>;
 167         #size-cells = <1>;
 168         compatible = "fsl,dcsr", "simple-bus";
 169
 170         dcsr-epu@0 {
 171                 compatible = "fsl,t2080-dcsr-epu", "fsl,dcsr-epu";
 172                 interrupts = <52 2 0 0
 173                               84 2 0 0
 174                               85 2 0 0
 175                               94 2 0 0
 176                               95 2 0 0>;
 177                 reg = <0x0 0x1000>;
 178         };
 179         dcsr-npc {
 180                 compatible = "fsl,t2080-dcsr-cnpc", "fsl,dcsr-cnpc";
 181                 reg = <0x1000 0x1000 0x1002000 0x10000>;
 182         };
 183         dcsr-nxc@2000 {
 184                 compatible = "fsl,dcsr-nxc";
 185                 reg = <0x2000 0x1000>;
 186         };
 187         dcsr-corenet {
 188                 compatible = "fsl,dcsr-corenet";
 189                 reg = <0x8000 0x1000 0x1A000 0x1000>;
 190         };
 191         dcsr-ocn@11000 {
 192                 compatible = "fsl,t2080-dcsr-ocn", "fsl,dcsr-ocn";
 193                 reg = <0x11000 0x1000>;
 194         };
 195         dcsr-ddr@12000 {
 196                 compatible = "fsl,dcsr-ddr";
 197                 dev-handle = <&ddr1>;
 198                 reg = <0x12000 0x1000>;
 199         };
 200         dcsr-nal@18000 {
 201                 compatible = "fsl,t2080-dcsr-nal", "fsl,dcsr-nal";
 202                 reg = <0x18000 0x1000>;
 203         };
 204         dcsr-rcpm@22000 {
 205                 compatible = "fsl,t2080-dcsr-rcpm", "fsl,dcsr-rcpm";
 206                 reg = <0x22000 0x1000>;
 207         };
 208         dcsr-snpc@30000 {
 209                 compatible = "fsl,t2080-dcsr-snpc", "fsl,dcsr-snpc";
 210                 reg = <0x30000 0x1000 0x1022000 0x10000>;
 211         };
 212         dcsr-snpc@31000 {
 213                 compatible = "fsl,t2080-dcsr-snpc", "fsl,dcsr-snpc";
 214                 reg = <0x31000 0x1000 0x1042000 0x10000>;
 215         };
 216         dcsr-snpc@32000 {
 217                 compatible = "fsl,t2080-dcsr-snpc", "fsl,dcsr-snpc";
 218                 reg = <0x32000 0x1000 0x1062000 0x10000>;
 219         };
 220         dcsr-cpu-sb-proxy@100000 {
 221                 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
 222                 cpu-handle = <&cpu0>;
 223                 reg = <0x100000 0x1000 0x101000 0x1000>;
 224         };
 225         dcsr-cpu-sb-proxy@108000 {
 226                 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
 227                 cpu-handle = <&cpu1>;
 228                 reg = <0x108000 0x1000 0x109000 0x1000>;
 229         };
 230         dcsr-cpu-sb-proxy@110000 {
 231                 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
 232                 cpu-handle = <&cpu2>;
 233                 reg = <0x110000 0x1000 0x111000 0x1000>;
 234         };
 235         dcsr-cpu-sb-proxy@118000 {
 236                 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
 237                 cpu-handle = <&cpu3>;
 238                 reg = <0x118000 0x1000 0x119000 0x1000>;
 239         };
 240 };
 241
 242 &bportals {
 243         #address-cells = <0x1>;
 244         #size-cells = <0x1>;
 245         compatible = "simple-bus";
 246
 247         bman-portal@0 {
 248                 compatible = "fsl,bman-portal";
 249                 reg = <0x0 0x4000>, <0x1000000 0x1000>;
 250                 interrupts = <105 2 0 0>;
 251         };
 252         bman-portal@4000 {
 253                 compatible = "fsl,bman-portal";
 254                 reg = <0x4000 0x4000>, <0x1001000 0x1000>;
 255                 interrupts = <107 2 0 0>;
 256         };
 257         bman-portal@8000 {
 258                 compatible = "fsl,bman-portal";
 259                 reg = <0x8000 0x4000>, <0x1002000 0x1000>;
 260                 interrupts = <109 2 0 0>;
 261         };
 262         bman-portal@c000 {
 263                 compatible = "fsl,bman-portal";
 264                 reg = <0xc000 0x4000>, <0x1003000 0x1000>;
 265                 interrupts = <111 2 0 0>;
 266         };
 267         bman-portal@10000 {
 268                 compatible = "fsl,bman-portal";
 269                 reg = <0x10000 0x4000>, <0x1004000 0x1000>;
 270                 interrupts = <113 2 0 0>;
 271         };
 272         bman-portal@14000 {
 273                 compatible = "fsl,bman-portal";
 274                 reg = <0x14000 0x4000>, <0x1005000 0x1000>;
 275                 interrupts = <115 2 0 0>;
 276         };
 277         bman-portal@18000 {
 278                 compatible = "fsl,bman-portal";
 279                 reg = <0x18000 0x4000>, <0x1006000 0x1000>;
 280                 interrupts = <117 2 0 0>;
 281         };
 282         bman-portal@1c000 {
 283                 compatible = "fsl,bman-portal";
 284                 reg = <0x1c000 0x4000>, <0x1007000 0x1000>;
 285                 interrupts = <119 2 0 0>;
 286         };
 287         bman-portal@20000 {
 288                 compatible = "fsl,bman-portal";
 289                 reg = <0x20000 0x4000>, <0x1008000 0x1000>;
 290                 interrupts = <121 2 0 0>;
 291         };
 292         bman-portal@24000 {
 293                 compatible = "fsl,bman-portal";
 294                 reg = <0x24000 0x4000>, <0x1009000 0x1000>;
 295                 interrupts = <123 2 0 0>;
 296         };
 297         bman-portal@28000 {
 298                 compatible = "fsl,bman-portal";
 299                 reg = <0x28000 0x4000>, <0x100a000 0x1000>;
 300                 interrupts = <125 2 0 0>;
 301         };
 302         bman-portal@2c000 {
 303                 compatible = "fsl,bman-portal";
 304                 reg = <0x2c000 0x4000>, <0x100b000 0x1000>;
 305                 interrupts = <127 2 0 0>;
 306         };
 307         bman-portal@30000 {
 308                 compatible = "fsl,bman-portal";
 309                 reg = <0x30000 0x4000>, <0x100c000 0x1000>;
 310                 interrupts = <129 2 0 0>;
 311         };
 312         bman-portal@34000 {
 313                 compatible = "fsl,bman-portal";
 314                 reg = <0x34000 0x4000>, <0x100d000 0x1000>;
 315                 interrupts = <131 2 0 0>;
 316         };
 317         bman-portal@38000 {
 318                 compatible = "fsl,bman-portal";
 319                 reg = <0x38000 0x4000>, <0x100e000 0x1000>;
 320                 interrupts = <133 2 0 0>;
 321         };
 322         bman-portal@3c000 {
 323                 compatible = "fsl,bman-portal";
 324                 reg = <0x3c000 0x4000>, <0x100f000 0x1000>;
 325                 interrupts = <135 2 0 0>;
 326         };
 327         bman-portal@40000 {
 328                 compatible = "fsl,bman-portal";
 329                 reg = <0x40000 0x4000>, <0x1010000 0x1000>;
 330                 interrupts = <137 2 0 0>;
 331         };
 332         bman-portal@44000 {
 333                 compatible = "fsl,bman-portal";
 334                 reg = <0x44000 0x4000>, <0x1011000 0x1000>;
 335                 interrupts = <139 2 0 0>;
 336         };
 337 };
 338
 339 &qportals {
 340         #address-cells = <0x1>;
 341         #size-cells = <0x1>;
 342         compatible = "simple-bus";
 343
 344         qportal0: qman-portal@0 {
 345                 compatible = "fsl,qman-portal";
 346                 reg = <0x0 0x4000>, <0x1000000 0x1000>;
 347                 interrupts = <104 0x2 0 0>;
 348                 cell-index = <0x0>;
 349         };
 350         qportal1: qman-portal@4000 {
 351                 compatible = "fsl,qman-portal";
 352                 reg = <0x4000 0x4000>, <0x1001000 0x1000>;
 353                 interrupts = <106 0x2 0 0>;
 354                 cell-index = <0x1>;
 355         };
 356         qportal2: qman-portal@8000 {
 357                 compatible = "fsl,qman-portal";
 358                 reg = <0x8000 0x4000>, <0x1002000 0x1000>;
 359                 interrupts = <108 0x2 0 0>;
 360                 cell-index = <0x2>;
 361         };
 362         qportal3: qman-portal@c000 {
 363                 compatible = "fsl,qman-portal";
 364                 reg = <0xc000 0x4000>, <0x1003000 0x1000>;
 365                 interrupts = <110 0x2 0 0>;
 366                 cell-index = <0x3>;
 367         };
 368         qportal4: qman-portal@10000 {
 369                 compatible = "fsl,qman-portal";
 370                 reg = <0x10000 0x4000>, <0x1004000 0x1000>;
 371                 interrupts = <112 0x2 0 0>;
 372                 cell-index = <0x4>;
 373         };
 374         qportal5: qman-portal@14000 {
 375                 compatible = "fsl,qman-portal";
 376                 reg = <0x14000 0x4000>, <0x1005000 0x1000>;
 377                 interrupts = <114 0x2 0 0>;
 378                 cell-index = <0x5>;
 379         };
 380         qportal6: qman-portal@18000 {
 381                 compatible = "fsl,qman-portal";
 382                 reg = <0x18000 0x4000>, <0x1006000 0x1000>;
 383                 interrupts = <116 0x2 0 0>;
 384                 cell-index = <0x6>;
 385         };
 386         qportal7: qman-portal@1c000 {
 387                 compatible = "fsl,qman-portal";
 388                 reg = <0x1c000 0x4000>, <0x1007000 0x1000>;
 389                 interrupts = <118 0x2 0 0>;
 390                 cell-index = <0x7>;
 391         };
 392         qportal8: qman-portal@20000 {
 393                 compatible = "fsl,qman-portal";
 394                 reg = <0x20000 0x4000>, <0x1008000 0x1000>;
 395                 interrupts = <120 0x2 0 0>;
 396                 cell-index = <0x8>;
 397         };
 398         qportal9: qman-portal@24000 {
 399                 compatible = "fsl,qman-portal";
 400                 reg = <0x24000 0x4000>, <0x1009000 0x1000>;
 401                 interrupts = <122 0x2 0 0>;
 402                 cell-index = <0x9>;
 403         };
 404         qportal10: qman-portal@28000 {
 405                 compatible = "fsl,qman-portal";
 406                 reg = <0x28000 0x4000>, <0x100a000 0x1000>;
 407                 interrupts = <124 0x2 0 0>;
 408                 cell-index = <0xa>;
 409         };
 410         qportal11: qman-portal@2c000 {
 411                 compatible = "fsl,qman-portal";
 412                 reg = <0x2c000 0x4000>, <0x100b000 0x1000>;
 413                 interrupts = <126 0x2 0 0>;
 414                 cell-index = <0xb>;
 415         };
 416         qportal12: qman-portal@30000 {
 417                 compatible = "fsl,qman-portal";
 418                 reg = <0x30000 0x4000>, <0x100c000 0x1000>;
 419                 interrupts = <128 0x2 0 0>;
 420                 cell-index = <0xc>;
 421         };
 422         qportal13: qman-portal@34000 {
 423                 compatible = "fsl,qman-portal";
 424                 reg = <0x34000 0x4000>, <0x100d000 0x1000>;
 425                 interrupts = <130 0x2 0 0>;
 426                 cell-index = <0xd>;
 427         };
 428         qportal14: qman-portal@38000 {
 429                 compatible = "fsl,qman-portal";
 430                 reg = <0x38000 0x4000>, <0x100e000 0x1000>;
 431                 interrupts = <132 0x2 0 0>;
 432                 cell-index = <0xe>;
 433         };
 434         qportal15: qman-portal@3c000 {
 435                 compatible = "fsl,qman-portal";
 436                 reg = <0x3c000 0x4000>, <0x100f000 0x1000>;
 437                 interrupts = <134 0x2 0 0>;
 438                 cell-index = <0xf>;
 439         };
 440         qportal16: qman-portal@40000 {
 441                 compatible = "fsl,qman-portal";
 442                 reg = <0x40000 0x4000>, <0x1010000 0x1000>;
 443                 interrupts = <136 0x2 0 0>;
 444                 cell-index = <0x10>;
 445         };
 446         qportal17: qman-portal@44000 {
 447                 compatible = "fsl,qman-portal";
 448                 reg = <0x44000 0x4000>, <0x1011000 0x1000>;
 449                 interrupts = <138 0x2 0 0>;
 450                 cell-index = <0x11>;
 451         };
 452 };
 453
 454 &soc {
 455         #address-cells = <1>;
 456         #size-cells = <1>;
 457         device_type = "soc";
 458         compatible = "simple-bus";
 459
 460         soc-sram-error {
 461                 compatible = "fsl,soc-sram-error";
 462                 interrupts = <16 2 1 29>;
 463         };
 464
 465         corenet-law@0 {
 466                 compatible = "fsl,corenet-law";
 467                 reg = <0x0 0x1000>;
 468                 fsl,num-laws = <32>;
 469         };
 470
 471         ddr1: memory-controller@8000 {
 472                 compatible = "fsl,qoriq-memory-controller-v4.7",
 473                                 "fsl,qoriq-memory-controller";
 474                 reg = <0x8000 0x1000>;
 475                 interrupts = <16 2 1 23>;
 476         };
 477
 478         cpc: l3-cache-controller@10000 {
 479                 compatible = "fsl,t2080-l3-cache-controller", "cache";
 480                 reg = <0x10000 0x1000
 481                        0x11000 0x1000
 482                        0x12000 0x1000>;
 483                 interrupts = <16 2 1 27
 484                               16 2 1 26
 485                               16 2 1 25>;
 486         };
 487
 488         corenet-cf@18000 {
 489                 compatible = "fsl,corenet2-cf", "fsl,corenet-cf";
 490                 reg = <0x18000 0x1000>;
 491                 interrupts = <16 2 1 31>;
 492                 fsl,ccf-num-csdids = <32>;
 493                 fsl,ccf-num-snoopids = <32>;
 494         };
 495
 496         iommu@20000 {
 497                 compatible = "fsl,pamu-v1.0", "fsl,pamu";
 498                 reg = <0x20000 0x3000>;
 499                 fsl,portid-mapping = <0x8000>;
 500                 ranges = <0 0x20000 0x3000>;
 501                 #address-cells = <1>;
 502                 #size-cells = <1>;
 503                 interrupts = <
 504                         24 2 0 0
 505                         16 2 1 30>;
 506
 507                 pamu0: pamu@0 {
 508                         reg = <0 0x1000>;
 509                         fsl,primary-cache-geometry = <32 1>;
 510                         fsl,secondary-cache-geometry = <128 2>;
 511                 };
 512
 513                 pamu1: pamu@1000 {
 514                         reg = <0x1000 0x1000>;
 515                         fsl,primary-cache-geometry = <32 1>;
 516                         fsl,secondary-cache-geometry = <128 2>;
 517                 };
 518
 519                 pamu2: pamu@2000 {
 520                         reg = <0x2000 0x1000>;
 521                         fsl,primary-cache-geometry = <32 1>;
 522                         fsl,secondary-cache-geometry = <128 2>;
 523                 };
 524         };
 525
 526 /include/ "qoriq-mpic4.3.dtsi"
 527
 528         guts: global-utilities@e0000 {
 529                 compatible = "fsl,t2080-device-config", "fsl,qoriq-device-config-2.0";
 530                 reg = <0xe0000 0xe00>;
 531                 fsl,has-rstcr;
 532                 fsl,liodn-bits = <12>;
 533         };
 534
 535 /include/ "qoriq-clockgen2.dtsi"
 536         global-utilities@e1000 {
 537                 compatible = "fsl,t2080-clockgen", "fsl,qoriq-clockgen-2.0";
 538
 539                 mux0: mux0@0 {
 540                         #clock-cells = <0>;
 541                         reg = <0x0 4>;
 542                         compatible = "fsl,qoriq-core-mux-2.0";
 543                         clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>,
 544                                  <&pll1 0>, <&pll1 1>, <&pll1 2>;
 545                         clock-names = "pll0", "pll0-div2", "pll0-div4",
 546                                 "pll1", "pll1-div2", "pll1-div4";
 547                         clock-output-names = "cmux0";
 548                 };
 549
 550                 mux1: mux1@20 {
 551                         #clock-cells = <0>;
 552                         reg = <0x20 4>;
 553                         compatible = "fsl,qoriq-core-mux-2.0";
 554                         clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>,
 555                                  <&pll1 0>, <&pll1 1>, <&pll1 2>;
 556                         clock-names = "pll0", "pll0-div2", "pll0-div4",
 557                                 "pll1", "pll1-div2", "pll1-div4";
 558                         clock-output-names = "cmux1";
 559                 };
 560         };
 561
 562         rcpm: global-utilities@e2000 {
 563                 compatible = "fsl,t2080-rcpm", "fsl,qoriq-rcpm-2.0";
 564                 reg = <0xe2000 0x1000>;
 565         };
 566
 567         sfp: sfp@e8000 {
 568                 compatible = "fsl,t2080-sfp";
 569                 reg = <0xe8000 0x1000>;
 570         };
 571
 572         serdes: serdes@ea000 {
 573                 compatible = "fsl,t2080-serdes";
 574                 reg = <0xea000 0x4000>;
 575         };
 576
 577 /include/ "elo3-dma-0.dtsi"
 578         dma@100300 {
 579                 fsl,iommu-parent = <&pamu0>;
 580                 fsl,liodn-reg = <&guts 0x580>; /* DMA1LIODNR */
 581         };
 582 /include/ "elo3-dma-1.dtsi"
 583         dma@101300 {
 584                 fsl,iommu-parent = <&pamu0>;
 585                 fsl,liodn-reg = <&guts 0x584>; /* DMA2LIODNR */
 586         };
 587 /include/ "elo3-dma-2.dtsi"
 588         dma@102300 {
 589                 fsl,iommu-parent = <&pamu0>;
 590                 fsl,liodn-reg = <&guts 0x588>; /* DMA3LIODNR */
 591         };
 592
 593 /include/ "qoriq-espi-0.dtsi"
 594         spi@110000 {
 595                 fsl,espi-num-chipselects = <4>;
 596         };
 597
 598 /include/ "qoriq-esdhc-0.dtsi"
 599         sdhc@114000 {
 600                 compatible = "fsl,t2080-esdhc", "fsl,esdhc";
 601                 fsl,iommu-parent = <&pamu1>;
 602                 fsl,liodn-reg = <&guts 0x530>; /* SDMMCLIODNR */
 603                 sdhci,auto-cmd12;
 604         };
 605 /include/ "qoriq-i2c-0.dtsi"
 606 /include/ "qoriq-i2c-1.dtsi"
 607 /include/ "qoriq-duart-0.dtsi"
 608 /include/ "qoriq-duart-1.dtsi"
 609 /include/ "qoriq-gpio-0.dtsi"
 610 /include/ "qoriq-gpio-1.dtsi"
 611 /include/ "qoriq-gpio-2.dtsi"
 612 /include/ "qoriq-gpio-3.dtsi"
 613 /include/ "qoriq-usb2-mph-0.dtsi"
 614         usb0: usb@210000 {
 615                 compatible = "fsl-usb2-mph-v2.5", "fsl-usb2-mph";
 616                 fsl,iommu-parent = <&pamu1>;
 617                 fsl,liodn-reg = <&guts 0x520>; /* USB1LIODNR */
 618                 phy_type = "utmi";
 619                 port0;
 620         };
 621 /include/ "qoriq-usb2-dr-0.dtsi"
 622         usb1: usb@211000 {
 623                 compatible = "fsl-usb2-dr-v2.5", "fsl-usb2-dr";
 624                 fsl,iommu-parent = <&pamu1>;
 625                 fsl,liodn-reg = <&guts 0x524>; /* USB1LIODNR */
 626                 dr_mode = "host";
 627                 phy_type = "utmi";
 628         };
 629 /include/ "qoriq-sec5.2-0.dtsi"
 630 /include/ "qoriq-qman3.dtsi"
 631 /include/ "qoriq-bman1.dtsi"
 632
 633 /include/ "qoriq-fman3-0.dtsi"
 634 /include/ "qoriq-fman3-0-1g-0.dtsi"
 635 /include/ "qoriq-fman3-0-1g-1.dtsi"
 636 /include/ "qoriq-fman3-0-1g-2.dtsi"
 637 /include/ "qoriq-fman3-0-1g-3.dtsi"
 638 /include/ "qoriq-fman3-0-1g-4.dtsi"
 639 /include/ "qoriq-fman3-0-1g-5.dtsi"
 640 /include/ "qoriq-fman3-0-10g-0.dtsi"
 641 /include/ "qoriq-fman3-0-10g-1.dtsi"
 642         fman@400000 {
 643                 enet0: ethernet@e0000 {
 644                 };
 645
 646                 enet1: ethernet@e2000 {
 647                 };
 648
 649                 enet2: ethernet@e4000 {
 650                 };
 651
 652                 enet3: ethernet@e6000 {
 653                 };
 654
 655                 enet4: ethernet@e8000 {
 656                 };
 657
 658                 enet5: ethernet@ea000 {
 659                 };
 660
 661                 enet6: ethernet@f0000 {
 662                 };
 663
 664                 enet7: ethernet@f2000 {
 665                 };
 666
 667                 mdio@fc000 {
 668                         interrupts = <100 1 0 0>;
 669                 };
 670
 671                 mdio@fd000 {
 672                         interrupts = <101 1 0 0>;
 673                 };
 674         };
 675
 676         L2_1: l2-cache-controller@c20000 {
 677                 /* Cluster 0 L2 cache */
 678                 compatible = "fsl,t2080-l2-cache-controller";
 679                 reg = <0xc20000 0x40000>;
 680                 next-level-cache = <&cpc>;
 681         };
 682 };