arch/powerpc/boot/dts/t104xqds.dtsi

   1 /*
   2  * T104xQDS Device Tree Source
   3  *
   4  * Copyright 2013 - 2014 Freescale Semiconductor Inc.
   5  *
   6  * Redistribution and use in source and binary forms, with or without
   7  * modification, are permitted provided that the following conditions are met:
   8  *     * Redistributions of source code must retain the above copyright
   9  *       notice, this list of conditions and the following disclaimer.
  10  *     * Redistributions in binary form must reproduce the above copyright
  11  *       notice, this list of conditions and the following disclaimer in the
  12  *       documentation and/or other materials provided with the distribution.
  13  *     * Neither the name of Freescale Semiconductor nor the
  14  *       names of its contributors may be used to endorse or promote products
  15  *       derived from this software without specific prior written permission.
  16  *
  17  *
  18  * ALTERNATIVELY, this software may be distributed under the terms of the
  19  * GNU General Public License ("GPL") as published by the Free Software
  20  * Foundation, either version 2 of that License or (at your option) any
  21  * later version.
  22  *
  23  * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
  24  * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  25  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  26  * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  27  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  28  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  29  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  30  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  31  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  32  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  33  */
  34
  35 / {
  36         model = "fsl,T1040QDS";
  37         #address-cells = <2>;
  38         #size-cells = <2>;
  39         interrupt-parent = <&mpic>;
  40
  41         reserved-memory {
  42                 #address-cells = <2>;
  43                 #size-cells = <2>;
  44                 ranges;
  45
  46                 bman_fbpr: bman-fbpr {
  47                         size = <0 0x1000000>;
  48                         alignment = <0 0x1000000>;
  49                 };
  50                 qman_fqd: qman-fqd {
  51                         size = <0 0x400000>;
  52                         alignment = <0 0x400000>;
  53                 };
  54                 qman_pfdr: qman-pfdr {
  55                         size = <0 0x2000000>;
  56                         alignment = <0 0x2000000>;
  57                 };
  58         };
  59
  60         ifc: localbus@ffe124000 {
  61                 reg = <0xf 0xfe124000 0 0x2000>;
  62                 ranges = <0 0 0xf 0xe8000000 0x08000000
  63                           2 0 0xf 0xff800000 0x00010000
  64                           3 0 0xf 0xffdf0000 0x00008000>;
  65
  66                 nor@0,0 {
  67                         #address-cells = <1>;
  68                         #size-cells = <1>;
  69                         compatible = "cfi-flash";
  70                         reg = <0x0 0x0 0x8000000>;
  71
  72                         bank-width = <2>;
  73                         device-width = <1>;
  74                 };
  75
  76                 nand@2,0 {
  77                         #address-cells = <1>;
  78                         #size-cells = <1>;
  79                         compatible = "fsl,ifc-nand";
  80                         reg = <0x2 0x0 0x10000>;
  81                 };
  82
  83                 board-control@3,0 {
  84                         #address-cells = <1>;
  85                         #size-cells = <1>;
  86                         compatible = "fsl,fpga-qixis";
  87                         reg = <3 0 0x300>;
  88                 };
  89         };
  90
  91         memory {
  92                 device_type = "memory";
  93         };
  94
  95         dcsr: dcsr@f00000000 {
  96                 ranges = <0x00000000 0xf 0x00000000 0x01072000>;
  97         };
  98
  99         bportals: bman-portals@ff4000000 {
 100                 ranges = <0x0 0xf 0xf4000000 0x2000000>;
 101         };
 102
 103         qportals: qman-portals@ff6000000 {
 104                 ranges = <0x0 0xf 0xf6000000 0x2000000>;
 105         };
 106
 107         soc: soc@ffe000000 {
 108                 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
 109                 reg = <0xf 0xfe000000 0 0x00001000>;
 110
 111                 spi@110000 {
 112                         flash@0 {
 113                                 #address-cells = <1>;
 114                                 #size-cells = <1>;
 115                                 compatible = "micron,n25q128a11";
 116                                 reg = <0>;
 117                                 spi-max-frequency = <10000000>; /* input clock */
 118                         };
 119                 };
 120
 121                 i2c@118000 {
 122                         pca9547@77 {
 123                                 compatible = "philips,pca9547";
 124                                 reg = <0x77>;
 125                         };
 126                         rtc@68 {
 127                                 compatible = "dallas,ds3232";
 128                                 reg = <0x68>;
 129                                 interrupts = <0x1 0x1 0 0>;
 130                         };
 131                 };
 132         };
 133
 134         pci0: pcie@ffe240000 {
 135                 reg = <0xf 0xfe240000 0 0x10000>;
 136                 ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x10000000
 137                           0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>;
 138                 pcie@0 {
 139                         ranges = <0x02000000 0 0xe0000000
 140                                   0x02000000 0 0xe0000000
 141                                   0 0x10000000
 142
 143                                   0x01000000 0 0x00000000
 144                                   0x01000000 0 0x00000000
 145                                   0 0x00010000>;
 146                 };
 147         };
 148
 149         pci1: pcie@ffe250000 {
 150                 reg = <0xf 0xfe250000 0 0x10000>;
 151                 ranges = <0x02000000 0x0 0xe0000000 0xc 0x10000000 0x0 0x10000000
 152                           0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000>;
 153                 pcie@0 {
 154                         ranges = <0x02000000 0 0xe0000000
 155                                   0x02000000 0 0xe0000000
 156                                   0 0x10000000
 157
 158                                   0x01000000 0 0x00000000
 159                                   0x01000000 0 0x00000000
 160                                   0 0x00010000>;
 161                 };
 162         };
 163
 164         pci2: pcie@ffe260000 {
 165                 reg = <0xf 0xfe260000 0 0x10000>;
 166                 ranges = <0x02000000 0 0xe0000000 0xc 0x20000000 0 0x10000000
 167                           0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>;
 168                 pcie@0 {
 169                         ranges = <0x02000000 0 0xe0000000
 170                                   0x02000000 0 0xe0000000
 171                                   0 0x10000000
 172
 173                                   0x01000000 0 0x00000000
 174                                   0x01000000 0 0x00000000
 175                                   0 0x00010000>;
 176                 };
 177         };
 178
 179         pci3: pcie@ffe270000 {
 180                 reg = <0xf 0xfe270000 0 0x10000>;
 181                 ranges = <0x02000000 0 0xe0000000 0xc 0x30000000 0 0x10000000
 182                           0x01000000 0 0x00000000 0xf 0xf8030000 0 0x00010000>;
 183                 pcie@0 {
 184                         ranges = <0x02000000 0 0xe0000000
 185                                   0x02000000 0 0xe0000000
 186                                   0 0x10000000
 187
 188                                   0x01000000 0 0x00000000
 189                                   0x01000000 0 0x00000000
 190                                   0 0x00010000>;
 191                 };
 192         };
 193 };