arch/powerpc/platforms/iseries/setup.c

   1 /*
   2  *    Copyright (c) 2000 Mike Corrigan <mikejc@us.ibm.com>
   3  *    Copyright (c) 1999-2000 Grant Erickson <grant@lcse.umn.edu>
   4  *
   5  *    Description:
   6  *      Architecture- / platform-specific boot-time initialization code for
   7  *      the IBM iSeries LPAR.  Adapted from original code by Grant Erickson and
   8  *      code by Gary Thomas, Cort Dougan <cort@fsmlabs.com>, and Dan Malek
   9  *      <dan@net4x.com>.
  10  *
  11  *      This program is free software; you can redistribute it and/or
  12  *      modify it under the terms of the GNU General Public License
  13  *      as published by the Free Software Foundation; either version
  14  *      2 of the License, or (at your option) any later version.
  15  */
  16
  17 #undef DEBUG
  18
  19 #include <linux/config.h>
  20 #include <linux/init.h>
  21 #include <linux/threads.h>
  22 #include <linux/smp.h>
  23 #include <linux/param.h>
  24 #include <linux/string.h>
  25 #include <linux/initrd.h>
  26 #include <linux/seq_file.h>
  27 #include <linux/kdev_t.h>
  28 #include <linux/major.h>
  29 #include <linux/root_dev.h>
  30 #include <linux/kernel.h>
  31
  32 #include <asm/processor.h>
  33 #include <asm/machdep.h>
  34 #include <asm/page.h>
  35 #include <asm/mmu.h>
  36 #include <asm/pgtable.h>
  37 #include <asm/mmu_context.h>
  38 #include <asm/cputable.h>
  39 #include <asm/sections.h>
  40 #include <asm/iommu.h>
  41 #include <asm/firmware.h>
  42
  43 #include <asm/time.h>
  44 #include <asm/paca.h>
  45 #include <asm/cache.h>
  46 #include <asm/sections.h>
  47 #include <asm/abs_addr.h>
  48 #include <asm/iseries/hv_lp_config.h>
  49 #include <asm/iseries/hv_call_event.h>
  50 #include <asm/iseries/hv_call_xm.h>
  51 #include <asm/iseries/it_lp_queue.h>
  52 #include <asm/iseries/mf.h>
  53 #include <asm/iseries/hv_lp_event.h>
  54 #include <asm/iseries/lpar_map.h>
  55
  56 #include "naca.h"
  57 #include "setup.h"
  58 #include "irq.h"
  59 #include "vpd_areas.h"
  60 #include "processor_vpd.h"
  61 #include "main_store.h"
  62 #include "call_sm.h"
  63 #include "call_hpt.h"
  64
  65 extern void hvlog(char *fmt, ...);
  66
  67 #ifdef DEBUG
  68 #define DBG(fmt...) hvlog(fmt)
  69 #else
  70 #define DBG(fmt...)
  71 #endif
  72
  73 /* Function Prototypes */
  74 extern void ppcdbg_initialize(void);
  75
  76 static void build_iSeries_Memory_Map(void);
  77 static void iseries_shared_idle(void);
  78 static void iseries_dedicated_idle(void);
  79 #ifdef CONFIG_PCI
  80 extern void iSeries_pci_final_fixup(void);
  81 #else
  82 static void iSeries_pci_final_fixup(void) { }
  83 #endif
  84
  85 /* Global Variables */
  86 int piranha_simulator;
  87
  88 extern int rd_size;             /* Defined in drivers/block/rd.c */
  89 extern unsigned long klimit;
  90 extern unsigned long embedded_sysmap_start;
  91 extern unsigned long embedded_sysmap_end;
  92
  93 extern unsigned long iSeries_recal_tb;
  94 extern unsigned long iSeries_recal_titan;
  95
  96 static int mf_initialized;
  97
  98 static unsigned long cmd_mem_limit;
  99
 100 struct MemoryBlock {
 101         unsigned long absStart;
 102         unsigned long absEnd;
 103         unsigned long logicalStart;
 104         unsigned long logicalEnd;
 105 };
 106
 107 /*
 108  * Process the main store vpd to determine where the holes in memory are
 109  * and return the number of physical blocks and fill in the array of
 110  * block data.
 111  */
 112 static unsigned long iSeries_process_Condor_mainstore_vpd(
 113                 struct MemoryBlock *mb_array, unsigned long max_entries)
 114 {
 115         unsigned long holeFirstChunk, holeSizeChunks;
 116         unsigned long numMemoryBlocks = 1;
 117         struct IoHriMainStoreSegment4 *msVpd =
 118                 (struct IoHriMainStoreSegment4 *)xMsVpd;
 119         unsigned long holeStart = msVpd->nonInterleavedBlocksStartAdr;
 120         unsigned long holeEnd = msVpd->nonInterleavedBlocksEndAdr;
 121         unsigned long holeSize = holeEnd - holeStart;
 122
 123         printk("Mainstore_VPD: Condor\n");
 124         /*
 125          * Determine if absolute memory has any
 126          * holes so that we can interpret the
 127          * access map we get back from the hypervisor
 128          * correctly.
 129          */
 130         mb_array[0].logicalStart = 0;
 131         mb_array[0].logicalEnd = 0x100000000;
 132         mb_array[0].absStart = 0;
 133         mb_array[0].absEnd = 0x100000000;
 134
 135         if (holeSize) {
 136                 numMemoryBlocks = 2;
 137                 holeStart = holeStart & 0x000fffffffffffff;
 138                 holeStart = addr_to_chunk(holeStart);
 139                 holeFirstChunk = holeStart;
 140                 holeSize = addr_to_chunk(holeSize);
 141                 holeSizeChunks = holeSize;
 142                 printk( "Main store hole: start chunk = %0lx, size = %0lx chunks\n",
 143                                 holeFirstChunk, holeSizeChunks );
 144                 mb_array[0].logicalEnd = holeFirstChunk;
 145                 mb_array[0].absEnd = holeFirstChunk;
 146                 mb_array[1].logicalStart = holeFirstChunk;
 147                 mb_array[1].logicalEnd = 0x100000000 - holeSizeChunks;
 148                 mb_array[1].absStart = holeFirstChunk + holeSizeChunks;
 149                 mb_array[1].absEnd = 0x100000000;
 150         }
 151         return numMemoryBlocks;
 152 }
 153
 154 #define MaxSegmentAreas                 32
 155 #define MaxSegmentAdrRangeBlocks        128
 156 #define MaxAreaRangeBlocks              4
 157
 158 static unsigned long iSeries_process_Regatta_mainstore_vpd(
 159                 struct MemoryBlock *mb_array, unsigned long max_entries)
 160 {
 161         struct IoHriMainStoreSegment5 *msVpdP =
 162                 (struct IoHriMainStoreSegment5 *)xMsVpd;
 163         unsigned long numSegmentBlocks = 0;
 164         u32 existsBits = msVpdP->msAreaExists;
 165         unsigned long area_num;
 166
 167         printk("Mainstore_VPD: Regatta\n");
 168
 169         for (area_num = 0; area_num < MaxSegmentAreas; ++area_num ) {
 170                 unsigned long numAreaBlocks;
 171                 struct IoHriMainStoreArea4 *currentArea;
 172
 173                 if (existsBits & 0x80000000) {
 174                         unsigned long block_num;
 175
 176                         currentArea = &msVpdP->msAreaArray[area_num];
 177                         numAreaBlocks = currentArea->numAdrRangeBlocks;
 178                         printk("ms_vpd: processing area %2ld  blocks=%ld",
 179                                         area_num, numAreaBlocks);
 180                         for (block_num = 0; block_num < numAreaBlocks;
 181                                         ++block_num ) {
 182                                 /* Process an address range block */
 183                                 struct MemoryBlock tempBlock;
 184                                 unsigned long i;
 185
 186                                 tempBlock.absStart =
 187                                         (unsigned long)currentArea->xAdrRangeBlock[block_num].blockStart;
 188                                 tempBlock.absEnd =
 189                                         (unsigned long)currentArea->xAdrRangeBlock[block_num].blockEnd;
 190                                 tempBlock.logicalStart = 0;
 191                                 tempBlock.logicalEnd   = 0;
 192                                 printk("\n          block %ld absStart=%016lx absEnd=%016lx",
 193                                                 block_num, tempBlock.absStart,
 194                                                 tempBlock.absEnd);
 195
 196                                 for (i = 0; i < numSegmentBlocks; ++i) {
 197                                         if (mb_array[i].absStart ==
 198                                                         tempBlock.absStart)
 199                                                 break;
 200                                 }
 201                                 if (i == numSegmentBlocks) {
 202                                         if (numSegmentBlocks == max_entries)
 203                                                 panic("iSeries_process_mainstore_vpd: too many memory blocks");
 204                                         mb_array[numSegmentBlocks] = tempBlock;
 205                                         ++numSegmentBlocks;
 206                                 } else
 207                                         printk(" (duplicate)");
 208                         }
 209                         printk("\n");
 210                 }
 211                 existsBits <<= 1;
 212         }
 213         /* Now sort the blocks found into ascending sequence */
 214         if (numSegmentBlocks > 1) {
 215                 unsigned long m, n;
 216
 217                 for (m = 0; m < numSegmentBlocks - 1; ++m) {
 218                         for (n = numSegmentBlocks - 1; m < n; --n) {
 219                                 if (mb_array[n].absStart <
 220                                                 mb_array[n-1].absStart) {
 221                                         struct MemoryBlock tempBlock;
 222
 223                                         tempBlock = mb_array[n];
 224                                         mb_array[n] = mb_array[n-1];
 225                                         mb_array[n-1] = tempBlock;
 226                                 }
 227                         }
 228                 }
 229         }
 230         /*
 231          * Assign "logical" addresses to each block.  These
 232          * addresses correspond to the hypervisor "bitmap" space.
 233          * Convert all addresses into units of 256K chunks.
 234          */
 235         {
 236         unsigned long i, nextBitmapAddress;
 237
 238         printk("ms_vpd: %ld sorted memory blocks\n", numSegmentBlocks);
 239         nextBitmapAddress = 0;
 240         for (i = 0; i < numSegmentBlocks; ++i) {
 241                 unsigned long length = mb_array[i].absEnd -
 242                         mb_array[i].absStart;
 243
 244                 mb_array[i].logicalStart = nextBitmapAddress;
 245                 mb_array[i].logicalEnd = nextBitmapAddress + length;
 246                 nextBitmapAddress += length;
 247                 printk("          Bitmap range: %016lx - %016lx\n"
 248                                 "        Absolute range: %016lx - %016lx\n",
 249                                 mb_array[i].logicalStart,
 250                                 mb_array[i].logicalEnd,
 251                                 mb_array[i].absStart, mb_array[i].absEnd);
 252                 mb_array[i].absStart = addr_to_chunk(mb_array[i].absStart &
 253                                 0x000fffffffffffff);
 254                 mb_array[i].absEnd = addr_to_chunk(mb_array[i].absEnd &
 255                                 0x000fffffffffffff);
 256                 mb_array[i].logicalStart =
 257                         addr_to_chunk(mb_array[i].logicalStart);
 258                 mb_array[i].logicalEnd = addr_to_chunk(mb_array[i].logicalEnd);
 259         }
 260         }
 261
 262         return numSegmentBlocks;
 263 }
 264
 265 static unsigned long iSeries_process_mainstore_vpd(struct MemoryBlock *mb_array,
 266                 unsigned long max_entries)
 267 {
 268         unsigned long i;
 269         unsigned long mem_blocks = 0;
 270
 271         if (cpu_has_feature(CPU_FTR_SLB))
 272                 mem_blocks = iSeries_process_Regatta_mainstore_vpd(mb_array,
 273                                 max_entries);
 274         else
 275                 mem_blocks = iSeries_process_Condor_mainstore_vpd(mb_array,
 276                                 max_entries);
 277
 278         printk("Mainstore_VPD: numMemoryBlocks = %ld \n", mem_blocks);
 279         for (i = 0; i < mem_blocks; ++i) {
 280                 printk("Mainstore_VPD: block %3ld logical chunks %016lx - %016lx\n"
 281                        "                             abs chunks %016lx - %016lx\n",
 282                         i, mb_array[i].logicalStart, mb_array[i].logicalEnd,
 283                         mb_array[i].absStart, mb_array[i].absEnd);
 284         }
 285         return mem_blocks;
 286 }
 287
 288 static void __init iSeries_get_cmdline(void)
 289 {
 290         char *p, *q;
 291
 292         /* copy the command line parameter from the primary VSP  */
 293         HvCallEvent_dmaToSp(cmd_line, 2 * 64* 1024, 256,
 294                         HvLpDma_Direction_RemoteToLocal);
 295
 296         p = cmd_line;
 297         q = cmd_line + 255;
 298         while(p < q) {
 299                 if (!*p || *p == '\n')
 300                         break;
 301                 ++p;
 302         }
 303         *p = 0;
 304 }
 305
 306 static void __init iSeries_init_early(void)
 307 {
 308         DBG(" -> iSeries_init_early()\n");
 309
 310         ppc64_firmware_features = FW_FEATURE_ISERIES;
 311
 312         ppcdbg_initialize();
 313
 314         ppc64_interrupt_controller = IC_ISERIES;
 315
 316 #if defined(CONFIG_BLK_DEV_INITRD)
 317         /*
 318          * If the init RAM disk has been configured and there is
 319          * a non-zero starting address for it, set it up
 320          */
 321         if (naca.xRamDisk) {
 322                 initrd_start = (unsigned long)__va(naca.xRamDisk);
 323                 initrd_end = initrd_start + naca.xRamDiskSize * HW_PAGE_SIZE;
 324                 initrd_below_start_ok = 1;      // ramdisk in kernel space
 325                 ROOT_DEV = Root_RAM0;
 326                 if (((rd_size * 1024) / HW_PAGE_SIZE) < naca.xRamDiskSize)
 327                         rd_size = (naca.xRamDiskSize * HW_PAGE_SIZE) / 1024;
 328         } else
 329 #endif /* CONFIG_BLK_DEV_INITRD */
 330         {
 331             /* ROOT_DEV = MKDEV(VIODASD_MAJOR, 1); */
 332         }
 333
 334         iSeries_recal_tb = get_tb();
 335         iSeries_recal_titan = HvCallXm_loadTod();
 336
 337         /*
 338          * Initialize the hash table management pointers
 339          */
 340         hpte_init_iSeries();
 341
 342         /*
 343          * Initialize the DMA/TCE management
 344          */
 345         iommu_init_early_iSeries();
 346
 347         /* Initialize machine-dependency vectors */
 348 #ifdef CONFIG_SMP
 349         smp_init_iSeries();
 350 #endif
 351         if (itLpNaca.xPirEnvironMode == 0)
 352                 piranha_simulator = 1;
 353
 354         /* Associate Lp Event Queue 0 with processor 0 */
 355         HvCallEvent_setLpEventQueueInterruptProc(0, 0);
 356
 357         mf_init();
 358         mf_initialized = 1;
 359         mb();
 360
 361         /* If we were passed an initrd, set the ROOT_DEV properly if the values
 362          * look sensible. If not, clear initrd reference.
 363          */
 364 #ifdef CONFIG_BLK_DEV_INITRD
 365         if (initrd_start >= KERNELBASE && initrd_end >= KERNELBASE &&
 366             initrd_end > initrd_start)
 367                 ROOT_DEV = Root_RAM0;
 368         else
 369                 initrd_start = initrd_end = 0;
 370 #endif /* CONFIG_BLK_DEV_INITRD */
 371
 372         DBG(" <- iSeries_init_early()\n");
 373 }
 374
 375 struct mschunks_map mschunks_map = {
 376         /* XXX We don't use these, but Piranha might need them. */
 377         .chunk_size  = MSCHUNKS_CHUNK_SIZE,
 378         .chunk_shift = MSCHUNKS_CHUNK_SHIFT,
 379         .chunk_mask  = MSCHUNKS_OFFSET_MASK,
 380 };
 381 EXPORT_SYMBOL(mschunks_map);
 382
 383 void mschunks_alloc(unsigned long num_chunks)
 384 {
 385         klimit = _ALIGN(klimit, sizeof(u32));
 386         mschunks_map.mapping = (u32 *)klimit;
 387         klimit += num_chunks * sizeof(u32);
 388         mschunks_map.num_chunks = num_chunks;
 389 }
 390
 391 /*
 392  * The iSeries may have very large memories ( > 128 GB ) and a partition
 393  * may get memory in "chunks" that may be anywhere in the 2**52 real
 394  * address space.  The chunks are 256K in size.  To map this to the
 395  * memory model Linux expects, the AS/400 specific code builds a
 396  * translation table to translate what Linux thinks are "physical"
 397  * addresses to the actual real addresses.  This allows us to make
 398  * it appear to Linux that we have contiguous memory starting at
 399  * physical address zero while in fact this could be far from the truth.
 400  * To avoid confusion, I'll let the words physical and/or real address
 401  * apply to the Linux addresses while I'll use "absolute address" to
 402  * refer to the actual hardware real address.
 403  *
 404  * build_iSeries_Memory_Map gets information from the Hypervisor and
 405  * looks at the Main Store VPD to determine the absolute addresses
 406  * of the memory that has been assigned to our partition and builds
 407  * a table used to translate Linux's physical addresses to these
 408  * absolute addresses.  Absolute addresses are needed when
 409  * communicating with the hypervisor (e.g. to build HPT entries)
 410  */
 411
 412 static void __init build_iSeries_Memory_Map(void)
 413 {
 414         u32 loadAreaFirstChunk, loadAreaLastChunk, loadAreaSize;
 415         u32 nextPhysChunk;
 416         u32 hptFirstChunk, hptLastChunk, hptSizeChunks, hptSizePages;
 417         u32 totalChunks,moreChunks;
 418         u32 currChunk, thisChunk, absChunk;
 419         u32 currDword;
 420         u32 chunkBit;
 421         u64 map;
 422         struct MemoryBlock mb[32];
 423         unsigned long numMemoryBlocks, curBlock;
 424
 425         /* Chunk size on iSeries is 256K bytes */
 426         totalChunks = (u32)HvLpConfig_getMsChunks();
 427         mschunks_alloc(totalChunks);
 428
 429         /*
 430          * Get absolute address of our load area
 431          * and map it to physical address 0
 432          * This guarantees that the loadarea ends up at physical 0
 433          * otherwise, it might not be returned by PLIC as the first
 434          * chunks
 435          */
 436
 437         loadAreaFirstChunk = (u32)addr_to_chunk(itLpNaca.xLoadAreaAddr);
 438         loadAreaSize =  itLpNaca.xLoadAreaChunks;
 439
 440         /*
 441          * Only add the pages already mapped here.
 442          * Otherwise we might add the hpt pages
 443          * The rest of the pages of the load area
 444          * aren't in the HPT yet and can still
 445          * be assigned an arbitrary physical address
 446          */
 447         if ((loadAreaSize * 64) > HvPagesToMap)
 448                 loadAreaSize = HvPagesToMap / 64;
 449
 450         loadAreaLastChunk = loadAreaFirstChunk + loadAreaSize - 1;
 451
 452         /*
 453          * TODO Do we need to do something if the HPT is in the 64MB load area?
 454          * This would be required if the itLpNaca.xLoadAreaChunks includes
 455          * the HPT size
 456          */
 457
 458         printk("Mapping load area - physical addr = 0000000000000000\n"
 459                 "                    absolute addr = %016lx\n",
 460                 chunk_to_addr(loadAreaFirstChunk));
 461         printk("Load area size %dK\n", loadAreaSize * 256);
 462
 463         for (nextPhysChunk = 0; nextPhysChunk < loadAreaSize; ++nextPhysChunk)
 464                 mschunks_map.mapping[nextPhysChunk] =
 465                         loadAreaFirstChunk + nextPhysChunk;
 466
 467         /*
 468          * Get absolute address of our HPT and remember it so
 469          * we won't map it to any physical address
 470          */
 471         hptFirstChunk = (u32)addr_to_chunk(HvCallHpt_getHptAddress());
 472         hptSizePages = (u32)HvCallHpt_getHptPages();
 473         hptSizeChunks = hptSizePages >>
 474                 (MSCHUNKS_CHUNK_SHIFT - HW_PAGE_SHIFT);
 475         hptLastChunk = hptFirstChunk + hptSizeChunks - 1;
 476
 477         printk("HPT absolute addr = %016lx, size = %dK\n",
 478                         chunk_to_addr(hptFirstChunk), hptSizeChunks * 256);
 479
 480         ppc64_pft_size = __ilog2(hptSizePages * HW_PAGE_SIZE);
 481
 482         /*
 483          * The actual hashed page table is in the hypervisor,
 484          * we have no direct access
 485          */
 486         htab_address = NULL;
 487
 488         /*
 489          * Determine if absolute memory has any
 490          * holes so that we can interpret the
 491          * access map we get back from the hypervisor
 492          * correctly.
 493          */
 494         numMemoryBlocks = iSeries_process_mainstore_vpd(mb, 32);
 495
 496         /*
 497          * Process the main store access map from the hypervisor
 498          * to build up our physical -> absolute translation table
 499          */
 500         curBlock = 0;
 501         currChunk = 0;
 502         currDword = 0;
 503         moreChunks = totalChunks;
 504
 505         while (moreChunks) {
 506                 map = HvCallSm_get64BitsOfAccessMap(itLpNaca.xLpIndex,
 507                                 currDword);
 508                 thisChunk = currChunk;
 509                 while (map) {
 510                         chunkBit = map >> 63;
 511                         map <<= 1;
 512                         if (chunkBit) {
 513                                 --moreChunks;
 514                                 while (thisChunk >= mb[curBlock].logicalEnd) {
 515                                         ++curBlock;
 516                                         if (curBlock >= numMemoryBlocks)
 517                                                 panic("out of memory blocks");
 518                                 }
 519                                 if (thisChunk < mb[curBlock].logicalStart)
 520                                         panic("memory block error");
 521
 522                                 absChunk = mb[curBlock].absStart +
 523                                         (thisChunk - mb[curBlock].logicalStart);
 524                                 if (((absChunk < hptFirstChunk) ||
 525                                      (absChunk > hptLastChunk)) &&
 526                                     ((absChunk < loadAreaFirstChunk) ||
 527                                      (absChunk > loadAreaLastChunk))) {
 528                                         mschunks_map.mapping[nextPhysChunk] =
 529                                                 absChunk;
 530                                         ++nextPhysChunk;
 531                                 }
 532                         }
 533                         ++thisChunk;
 534                 }
 535                 ++currDword;
 536                 currChunk += 64;
 537         }
 538
 539         /*
 540          * main store size (in chunks) is
 541          *   totalChunks - hptSizeChunks
 542          * which should be equal to
 543          *   nextPhysChunk
 544          */
 545         systemcfg->physicalMemorySize = chunk_to_addr(nextPhysChunk);
 546 }
 547
 548 /*
 549  * Document me.
 550  */
 551 static void __init iSeries_setup_arch(void)
 552 {
 553         unsigned procIx = get_paca()->lppaca.dyn_hv_phys_proc_index;
 554
 555         if (get_paca()->lppaca.shared_proc) {
 556                 ppc_md.idle_loop = iseries_shared_idle;
 557                 printk(KERN_INFO "Using shared processor idle loop\n");
 558         } else {
 559                 ppc_md.idle_loop = iseries_dedicated_idle;
 560                 printk(KERN_INFO "Using dedicated idle loop\n");
 561         }
 562
 563         /* Setup the Lp Event Queue */
 564         setup_hvlpevent_queue();
 565
 566         printk("Max  logical processors = %d\n",
 567                         itVpdAreas.xSlicMaxLogicalProcs);
 568         printk("Max physical processors = %d\n",
 569                         itVpdAreas.xSlicMaxPhysicalProcs);
 570
 571         systemcfg->processor = xIoHriProcessorVpd[procIx].xPVR;
 572         printk("Processor version = %x\n", systemcfg->processor);
 573 }
 574
 575 static void iSeries_show_cpuinfo(struct seq_file *m)
 576 {
 577         seq_printf(m, "machine\t\t: 64-bit iSeries Logical Partition\n");
 578 }
 579
 580 /*
 581  * Document me.
 582  * and Implement me.
 583  */
 584 static int iSeries_get_irq(struct pt_regs *regs)
 585 {
 586         /* -2 means ignore this interrupt */
 587         return -2;
 588 }
 589
 590 /*
 591  * Document me.
 592  */
 593 static void iSeries_restart(char *cmd)
 594 {
 595         mf_reboot();
 596 }
 597
 598 /*
 599  * Document me.
 600  */
 601 static void iSeries_power_off(void)
 602 {
 603         mf_power_off();
 604 }
 605
 606 /*
 607  * Document me.
 608  */
 609 static void iSeries_halt(void)
 610 {
 611         mf_power_off();
 612 }
 613
 614 static void __init iSeries_progress(char * st, unsigned short code)
 615 {
 616         printk("Progress: [%04x] - %s\n", (unsigned)code, st);
 617         if (!piranha_simulator && mf_initialized) {
 618                 if (code != 0xffff)
 619                         mf_display_progress(code);
 620                 else
 621                         mf_clear_src();
 622         }
 623 }
 624
 625 static void __init iSeries_fixup_klimit(void)
 626 {
 627         /*
 628          * Change klimit to take into account any ram disk
 629          * that may be included
 630          */
 631         if (naca.xRamDisk)
 632                 klimit = KERNELBASE + (u64)naca.xRamDisk +
 633                         (naca.xRamDiskSize * HW_PAGE_SIZE);
 634         else {
 635                 /*
 636                  * No ram disk was included - check and see if there
 637                  * was an embedded system map.  Change klimit to take
 638                  * into account any embedded system map
 639                  */
 640                 if (embedded_sysmap_end)
 641                         klimit = KERNELBASE + ((embedded_sysmap_end + 4095) &
 642                                         0xfffffffffffff000);
 643         }
 644 }
 645
 646 static int __init iSeries_src_init(void)
 647 {
 648         /* clear the progress line */
 649         ppc_md.progress(" ", 0xffff);
 650         return 0;
 651 }
 652
 653 late_initcall(iSeries_src_init);
 654
 655 static inline void process_iSeries_events(void)
 656 {
 657         asm volatile ("li 0,0x5555; sc" : : : "r0", "r3");
 658 }
 659
 660 static void yield_shared_processor(void)
 661 {
 662         unsigned long tb;
 663
 664         HvCall_setEnabledInterrupts(HvCall_MaskIPI |
 665                                     HvCall_MaskLpEvent |
 666                                     HvCall_MaskLpProd |
 667                                     HvCall_MaskTimeout);
 668
 669         tb = get_tb();
 670         /* Compute future tb value when yield should expire */
 671         HvCall_yieldProcessor(HvCall_YieldTimed, tb+tb_ticks_per_jiffy);
 672
 673         /*
 674          * The decrementer stops during the yield.  Force a fake decrementer
 675          * here and let the timer_interrupt code sort out the actual time.
 676          */
 677         get_paca()->lppaca.int_dword.fields.decr_int = 1;
 678         process_iSeries_events();
 679 }
 680
 681 static void iseries_shared_idle(void)
 682 {
 683         while (1) {
 684                 while (!need_resched() && !hvlpevent_is_pending()) {
 685                         local_irq_disable();
 686                         ppc64_runlatch_off();
 687
 688                         /* Recheck with irqs off */
 689                         if (!need_resched() && !hvlpevent_is_pending())
 690                                 yield_shared_processor();
 691
 692                         HMT_medium();
 693                         local_irq_enable();
 694                 }
 695
 696                 ppc64_runlatch_on();
 697
 698                 if (hvlpevent_is_pending())
 699                         process_iSeries_events();
 700
 701                 schedule();
 702         }
 703 }
 704
 705 static void iseries_dedicated_idle(void)
 706 {
 707         long oldval;
 708
 709         while (1) {
 710                 oldval = test_and_clear_thread_flag(TIF_NEED_RESCHED);
 711
 712                 if (!oldval) {
 713                         set_thread_flag(TIF_POLLING_NRFLAG);
 714
 715                         while (!need_resched()) {
 716                                 ppc64_runlatch_off();
 717                                 HMT_low();
 718
 719                                 if (hvlpevent_is_pending()) {
 720                                         HMT_medium();
 721                                         ppc64_runlatch_on();
 722                                         process_iSeries_events();
 723                                 }
 724                         }
 725
 726                         HMT_medium();
 727                         clear_thread_flag(TIF_POLLING_NRFLAG);
 728                 } else {
 729                         set_need_resched();
 730                 }
 731
 732                 ppc64_runlatch_on();
 733                 schedule();
 734         }
 735 }
 736
 737 #ifndef CONFIG_PCI
 738 void __init iSeries_init_IRQ(void) { }
 739 #endif
 740
 741 static int __init iseries_probe(int platform)
 742 {
 743         return PLATFORM_ISERIES_LPAR == platform;
 744 }
 745
 746 struct machdep_calls __initdata iseries_md = {
 747         .setup_arch     = iSeries_setup_arch,
 748         .show_cpuinfo   = iSeries_show_cpuinfo,
 749         .init_IRQ       = iSeries_init_IRQ,
 750         .get_irq        = iSeries_get_irq,
 751         .init_early     = iSeries_init_early,
 752         .pcibios_fixup  = iSeries_pci_final_fixup,
 753         .restart        = iSeries_restart,
 754         .power_off      = iSeries_power_off,
 755         .halt           = iSeries_halt,
 756         .get_boot_time  = iSeries_get_boot_time,
 757         .set_rtc_time   = iSeries_set_rtc_time,
 758         .get_rtc_time   = iSeries_get_rtc_time,
 759         .calibrate_decr = generic_calibrate_decr,
 760         .progress       = iSeries_progress,
 761         .probe          = iseries_probe,
 762         /* XXX Implement enable_pmcs for iSeries */
 763 };
 764
 765 struct blob {
 766         unsigned char data[PAGE_SIZE];
 767         unsigned long next;
 768 };
 769
 770 struct iseries_flat_dt {
 771         struct boot_param_header header;
 772         u64 reserve_map[2];
 773         struct blob dt;
 774         struct blob strings;
 775 };
 776
 777 struct iseries_flat_dt iseries_dt;
 778
 779 void dt_init(struct iseries_flat_dt *dt)
 780 {
 781         dt->header.off_mem_rsvmap =
 782                 offsetof(struct iseries_flat_dt, reserve_map);
 783         dt->header.off_dt_struct = offsetof(struct iseries_flat_dt, dt);
 784         dt->header.off_dt_strings = offsetof(struct iseries_flat_dt, strings);
 785         dt->header.totalsize = sizeof(struct iseries_flat_dt);
 786         dt->header.dt_strings_size = sizeof(struct blob);
 787
 788         /* There is no notion of hardware cpu id on iSeries */
 789         dt->header.boot_cpuid_phys = smp_processor_id();
 790
 791         dt->dt.next = (unsigned long)&dt->dt.data;
 792         dt->strings.next = (unsigned long)&dt->strings.data;
 793
 794         dt->header.magic = OF_DT_HEADER;
 795         dt->header.version = 0x10;
 796         dt->header.last_comp_version = 0x10;
 797
 798         dt->reserve_map[0] = 0;
 799         dt->reserve_map[1] = 0;
 800 }
 801
 802 void dt_check_blob(struct blob *b)
 803 {
 804         if (b->next >= (unsigned long)&b->next) {
 805                 DBG("Ran out of space in flat device tree blob!\n");
 806                 BUG();
 807         }
 808 }
 809
 810 void dt_push_u32(struct iseries_flat_dt *dt, u32 value)
 811 {
 812         *((u32*)dt->dt.next) = value;
 813         dt->dt.next += sizeof(u32);
 814
 815         dt_check_blob(&dt->dt);
 816 }
 817
 818 void dt_push_u64(struct iseries_flat_dt *dt, u64 value)
 819 {
 820         *((u64*)dt->dt.next) = value;
 821         dt->dt.next += sizeof(u64);
 822
 823         dt_check_blob(&dt->dt);
 824 }
 825
 826 unsigned long dt_push_bytes(struct blob *blob, char *data, int len)
 827 {
 828         unsigned long start = blob->next - (unsigned long)blob->data;
 829
 830         memcpy((char *)blob->next, data, len);
 831         blob->next = _ALIGN(blob->next + len, 4);
 832
 833         dt_check_blob(blob);
 834
 835         return start;
 836 }
 837
 838 void dt_start_node(struct iseries_flat_dt *dt, char *name)
 839 {
 840         dt_push_u32(dt, OF_DT_BEGIN_NODE);
 841         dt_push_bytes(&dt->dt, name, strlen(name) + 1);
 842 }
 843
 844 #define dt_end_node(dt) dt_push_u32(dt, OF_DT_END_NODE)
 845
 846 void dt_prop(struct iseries_flat_dt *dt, char *name, char *data, int len)
 847 {
 848         unsigned long offset;
 849
 850         dt_push_u32(dt, OF_DT_PROP);
 851
 852         /* Length of the data */
 853         dt_push_u32(dt, len);
 854
 855         /* Put the property name in the string blob. */
 856         offset = dt_push_bytes(&dt->strings, name, strlen(name) + 1);
 857
 858         /* The offset of the properties name in the string blob. */
 859         dt_push_u32(dt, (u32)offset);
 860
 861         /* The actual data. */
 862         dt_push_bytes(&dt->dt, data, len);
 863 }
 864
 865 void dt_prop_str(struct iseries_flat_dt *dt, char *name, char *data)
 866 {
 867         dt_prop(dt, name, data, strlen(data) + 1); /* + 1 for NULL */
 868 }
 869
 870 void dt_prop_u32(struct iseries_flat_dt *dt, char *name, u32 data)
 871 {
 872         dt_prop(dt, name, (char *)&data, sizeof(u32));
 873 }
 874
 875 void dt_prop_u64(struct iseries_flat_dt *dt, char *name, u64 data)
 876 {
 877         dt_prop(dt, name, (char *)&data, sizeof(u64));
 878 }
 879
 880 void dt_prop_u64_list(struct iseries_flat_dt *dt, char *name, u64 *data, int n)
 881 {
 882         dt_prop(dt, name, (char *)data, sizeof(u64) * n);
 883 }
 884
 885 void dt_prop_empty(struct iseries_flat_dt *dt, char *name)
 886 {
 887         dt_prop(dt, name, NULL, 0);
 888 }
 889
 890 void dt_cpus(struct iseries_flat_dt *dt)
 891 {
 892         unsigned char buf[32];
 893         unsigned char *p;
 894         unsigned int i, index;
 895         struct IoHriProcessorVpd *d;
 896
 897         /* yuck */
 898         snprintf(buf, 32, "PowerPC,%s", cur_cpu_spec->cpu_name);
 899         p = strchr(buf, ' ');
 900         if (!p) p = buf + strlen(buf);
 901
 902         dt_start_node(dt, "cpus");
 903         dt_prop_u32(dt, "#address-cells", 1);
 904         dt_prop_u32(dt, "#size-cells", 0);
 905
 906         for (i = 0; i < NR_CPUS; i++) {
 907                 if (paca[i].lppaca.dyn_proc_status >= 2)
 908                         continue;
 909
 910                 snprintf(p, 32 - (p - buf), "@%d", i);
 911                 dt_start_node(dt, buf);
 912
 913                 dt_prop_str(dt, "device_type", "cpu");
 914
 915                 index = paca[i].lppaca.dyn_hv_phys_proc_index;
 916                 d = &xIoHriProcessorVpd[index];
 917
 918                 dt_prop_u32(dt, "i-cache-size", d->xInstCacheSize * 1024);
 919                 dt_prop_u32(dt, "i-cache-line-size", d->xInstCacheOperandSize);
 920
 921                 dt_prop_u32(dt, "d-cache-size", d->xDataL1CacheSizeKB * 1024);
 922                 dt_prop_u32(dt, "d-cache-line-size", d->xDataCacheOperandSize);
 923
 924                 /* magic conversions to Hz copied from old code */
 925                 dt_prop_u32(dt, "clock-frequency",
 926                         ((1UL << 34) * 1000000) / d->xProcFreq);
 927                 dt_prop_u32(dt, "timebase-frequency",
 928                         ((1UL << 32) * 1000000) / d->xTimeBaseFreq);
 929
 930                 dt_prop_u32(dt, "reg", i);
 931
 932                 dt_end_node(dt);
 933         }
 934
 935         dt_end_node(dt);
 936 }
 937
 938 void build_flat_dt(struct iseries_flat_dt *dt)
 939 {
 940         u64 tmp[2];
 941
 942         dt_init(dt);
 943
 944         dt_start_node(dt, "");
 945
 946         dt_prop_u32(dt, "#address-cells", 2);
 947         dt_prop_u32(dt, "#size-cells", 2);
 948
 949         /* /memory */
 950         dt_start_node(dt, "memory@0");
 951         dt_prop_str(dt, "name", "memory");
 952         dt_prop_str(dt, "device_type", "memory");
 953         tmp[0] = 0;
 954         tmp[1] = systemcfg->physicalMemorySize;
 955         dt_prop_u64_list(dt, "reg", tmp, 2);
 956         dt_end_node(dt);
 957
 958         /* /chosen */
 959         dt_start_node(dt, "chosen");
 960         dt_prop_u32(dt, "linux,platform", PLATFORM_ISERIES_LPAR);
 961         if (cmd_mem_limit)
 962                 dt_prop_u64(dt, "linux,memory-limit", cmd_mem_limit);
 963         dt_end_node(dt);
 964
 965         dt_cpus(dt);
 966
 967         dt_end_node(dt);
 968
 969         dt_push_u32(dt, OF_DT_END);
 970 }
 971
 972 void * __init iSeries_early_setup(void)
 973 {
 974         iSeries_fixup_klimit();
 975
 976         /*
 977          * Initialize the table which translate Linux physical addresses to
 978          * AS/400 absolute addresses
 979          */
 980         build_iSeries_Memory_Map();
 981
 982         iSeries_get_cmdline();
 983
 984         /* Save unparsed command line copy for /proc/cmdline */
 985         strlcpy(saved_command_line, cmd_line, COMMAND_LINE_SIZE);
 986
 987         /* Parse early parameters, in particular mem=x */
 988         parse_early_param();
 989
 990         build_flat_dt(&iseries_dt);
 991
 992         return (void *) __pa(&iseries_dt);
 993 }
 994
 995 /*
 996  * On iSeries we just parse the mem=X option from the command line.
 997  * On pSeries it's a bit more complicated, see prom_init_mem()
 998  */
 999 static int __init early_parsemem(char *p)
1000 {
1001         if (p)
1002                 cmd_mem_limit = ALIGN(memparse(p, &p), PAGE_SIZE);
1003         return 0;
1004 }
1005 early_param("mem", early_parsemem);