arch/powerpc/platforms/iseries/setup.c

   1 /*
   2  *    Copyright (c) 2000 Mike Corrigan <mikejc@us.ibm.com>
   3  *    Copyright (c) 1999-2000 Grant Erickson <grant@lcse.umn.edu>
   4  *
   5  *    Description:
   6  *      Architecture- / platform-specific boot-time initialization code for
   7  *      the IBM iSeries LPAR.  Adapted from original code by Grant Erickson and
   8  *      code by Gary Thomas, Cort Dougan <cort@fsmlabs.com>, and Dan Malek
   9  *      <dan@net4x.com>.
  10  *
  11  *      This program is free software; you can redistribute it and/or
  12  *      modify it under the terms of the GNU General Public License
  13  *      as published by the Free Software Foundation; either version
  14  *      2 of the License, or (at your option) any later version.
  15  */
  16
  17 #undef DEBUG
  18
  19 #include <linux/config.h>
  20 #include <linux/init.h>
  21 #include <linux/threads.h>
  22 #include <linux/smp.h>
  23 #include <linux/param.h>
  24 #include <linux/string.h>
  25 #include <linux/initrd.h>
  26 #include <linux/seq_file.h>
  27 #include <linux/kdev_t.h>
  28 #include <linux/major.h>
  29 #include <linux/root_dev.h>
  30 #include <linux/kernel.h>
  31
  32 #include <asm/processor.h>
  33 #include <asm/machdep.h>
  34 #include <asm/page.h>
  35 #include <asm/mmu.h>
  36 #include <asm/pgtable.h>
  37 #include <asm/mmu_context.h>
  38 #include <asm/cputable.h>
  39 #include <asm/sections.h>
  40 #include <asm/iommu.h>
  41 #include <asm/firmware.h>
  42 #include <asm/systemcfg.h>
  43 #include <asm/system.h>
  44 #include <asm/time.h>
  45 #include <asm/paca.h>
  46 #include <asm/cache.h>
  47 #include <asm/sections.h>
  48 #include <asm/abs_addr.h>
  49 #include <asm/iseries/hv_lp_config.h>
  50 #include <asm/iseries/hv_call_event.h>
  51 #include <asm/iseries/hv_call_xm.h>
  52 #include <asm/iseries/it_lp_queue.h>
  53 #include <asm/iseries/mf.h>
  54 #include <asm/iseries/hv_lp_event.h>
  55 #include <asm/iseries/lpar_map.h>
  56
  57 #include "naca.h"
  58 #include "setup.h"
  59 #include "irq.h"
  60 #include "vpd_areas.h"
  61 #include "processor_vpd.h"
  62 #include "main_store.h"
  63 #include "call_sm.h"
  64 #include "call_hpt.h"
  65
  66 extern void hvlog(char *fmt, ...);
  67
  68 #ifdef DEBUG
  69 #define DBG(fmt...) hvlog(fmt)
  70 #else
  71 #define DBG(fmt...)
  72 #endif
  73
  74 /* Function Prototypes */
  75 static unsigned long build_iSeries_Memory_Map(void);
  76 static void iseries_shared_idle(void);
  77 static void iseries_dedicated_idle(void);
  78 #ifdef CONFIG_PCI
  79 extern void iSeries_pci_final_fixup(void);
  80 #else
  81 static void iSeries_pci_final_fixup(void) { }
  82 #endif
  83
  84 /* Global Variables */
  85 int piranha_simulator;
  86
  87 extern int rd_size;             /* Defined in drivers/block/rd.c */
  88 extern unsigned long embedded_sysmap_start;
  89 extern unsigned long embedded_sysmap_end;
  90
  91 extern unsigned long iSeries_recal_tb;
  92 extern unsigned long iSeries_recal_titan;
  93
  94 static int mf_initialized;
  95
  96 static unsigned long cmd_mem_limit;
  97
  98 struct MemoryBlock {
  99         unsigned long absStart;
 100         unsigned long absEnd;
 101         unsigned long logicalStart;
 102         unsigned long logicalEnd;
 103 };
 104
 105 /*
 106  * Process the main store vpd to determine where the holes in memory are
 107  * and return the number of physical blocks and fill in the array of
 108  * block data.
 109  */
 110 static unsigned long iSeries_process_Condor_mainstore_vpd(
 111                 struct MemoryBlock *mb_array, unsigned long max_entries)
 112 {
 113         unsigned long holeFirstChunk, holeSizeChunks;
 114         unsigned long numMemoryBlocks = 1;
 115         struct IoHriMainStoreSegment4 *msVpd =
 116                 (struct IoHriMainStoreSegment4 *)xMsVpd;
 117         unsigned long holeStart = msVpd->nonInterleavedBlocksStartAdr;
 118         unsigned long holeEnd = msVpd->nonInterleavedBlocksEndAdr;
 119         unsigned long holeSize = holeEnd - holeStart;
 120
 121         printk("Mainstore_VPD: Condor\n");
 122         /*
 123          * Determine if absolute memory has any
 124          * holes so that we can interpret the
 125          * access map we get back from the hypervisor
 126          * correctly.
 127          */
 128         mb_array[0].logicalStart = 0;
 129         mb_array[0].logicalEnd = 0x100000000;
 130         mb_array[0].absStart = 0;
 131         mb_array[0].absEnd = 0x100000000;
 132
 133         if (holeSize) {
 134                 numMemoryBlocks = 2;
 135                 holeStart = holeStart & 0x000fffffffffffff;
 136                 holeStart = addr_to_chunk(holeStart);
 137                 holeFirstChunk = holeStart;
 138                 holeSize = addr_to_chunk(holeSize);
 139                 holeSizeChunks = holeSize;
 140                 printk( "Main store hole: start chunk = %0lx, size = %0lx chunks\n",
 141                                 holeFirstChunk, holeSizeChunks );
 142                 mb_array[0].logicalEnd = holeFirstChunk;
 143                 mb_array[0].absEnd = holeFirstChunk;
 144                 mb_array[1].logicalStart = holeFirstChunk;
 145                 mb_array[1].logicalEnd = 0x100000000 - holeSizeChunks;
 146                 mb_array[1].absStart = holeFirstChunk + holeSizeChunks;
 147                 mb_array[1].absEnd = 0x100000000;
 148         }
 149         return numMemoryBlocks;
 150 }
 151
 152 #define MaxSegmentAreas                 32
 153 #define MaxSegmentAdrRangeBlocks        128
 154 #define MaxAreaRangeBlocks              4
 155
 156 static unsigned long iSeries_process_Regatta_mainstore_vpd(
 157                 struct MemoryBlock *mb_array, unsigned long max_entries)
 158 {
 159         struct IoHriMainStoreSegment5 *msVpdP =
 160                 (struct IoHriMainStoreSegment5 *)xMsVpd;
 161         unsigned long numSegmentBlocks = 0;
 162         u32 existsBits = msVpdP->msAreaExists;
 163         unsigned long area_num;
 164
 165         printk("Mainstore_VPD: Regatta\n");
 166
 167         for (area_num = 0; area_num < MaxSegmentAreas; ++area_num ) {
 168                 unsigned long numAreaBlocks;
 169                 struct IoHriMainStoreArea4 *currentArea;
 170
 171                 if (existsBits & 0x80000000) {
 172                         unsigned long block_num;
 173
 174                         currentArea = &msVpdP->msAreaArray[area_num];
 175                         numAreaBlocks = currentArea->numAdrRangeBlocks;
 176                         printk("ms_vpd: processing area %2ld  blocks=%ld",
 177                                         area_num, numAreaBlocks);
 178                         for (block_num = 0; block_num < numAreaBlocks;
 179                                         ++block_num ) {
 180                                 /* Process an address range block */
 181                                 struct MemoryBlock tempBlock;
 182                                 unsigned long i;
 183
 184                                 tempBlock.absStart =
 185                                         (unsigned long)currentArea->xAdrRangeBlock[block_num].blockStart;
 186                                 tempBlock.absEnd =
 187                                         (unsigned long)currentArea->xAdrRangeBlock[block_num].blockEnd;
 188                                 tempBlock.logicalStart = 0;
 189                                 tempBlock.logicalEnd   = 0;
 190                                 printk("\n          block %ld absStart=%016lx absEnd=%016lx",
 191                                                 block_num, tempBlock.absStart,
 192                                                 tempBlock.absEnd);
 193
 194                                 for (i = 0; i < numSegmentBlocks; ++i) {
 195                                         if (mb_array[i].absStart ==
 196                                                         tempBlock.absStart)
 197                                                 break;
 198                                 }
 199                                 if (i == numSegmentBlocks) {
 200                                         if (numSegmentBlocks == max_entries)
 201                                                 panic("iSeries_process_mainstore_vpd: too many memory blocks");
 202                                         mb_array[numSegmentBlocks] = tempBlock;
 203                                         ++numSegmentBlocks;
 204                                 } else
 205                                         printk(" (duplicate)");
 206                         }
 207                         printk("\n");
 208                 }
 209                 existsBits <<= 1;
 210         }
 211         /* Now sort the blocks found into ascending sequence */
 212         if (numSegmentBlocks > 1) {
 213                 unsigned long m, n;
 214
 215                 for (m = 0; m < numSegmentBlocks - 1; ++m) {
 216                         for (n = numSegmentBlocks - 1; m < n; --n) {
 217                                 if (mb_array[n].absStart <
 218                                                 mb_array[n-1].absStart) {
 219                                         struct MemoryBlock tempBlock;
 220
 221                                         tempBlock = mb_array[n];
 222                                         mb_array[n] = mb_array[n-1];
 223                                         mb_array[n-1] = tempBlock;
 224                                 }
 225                         }
 226                 }
 227         }
 228         /*
 229          * Assign "logical" addresses to each block.  These
 230          * addresses correspond to the hypervisor "bitmap" space.
 231          * Convert all addresses into units of 256K chunks.
 232          */
 233         {
 234         unsigned long i, nextBitmapAddress;
 235
 236         printk("ms_vpd: %ld sorted memory blocks\n", numSegmentBlocks);
 237         nextBitmapAddress = 0;
 238         for (i = 0; i < numSegmentBlocks; ++i) {
 239                 unsigned long length = mb_array[i].absEnd -
 240                         mb_array[i].absStart;
 241
 242                 mb_array[i].logicalStart = nextBitmapAddress;
 243                 mb_array[i].logicalEnd = nextBitmapAddress + length;
 244                 nextBitmapAddress += length;
 245                 printk("          Bitmap range: %016lx - %016lx\n"
 246                                 "        Absolute range: %016lx - %016lx\n",
 247                                 mb_array[i].logicalStart,
 248                                 mb_array[i].logicalEnd,
 249                                 mb_array[i].absStart, mb_array[i].absEnd);
 250                 mb_array[i].absStart = addr_to_chunk(mb_array[i].absStart &
 251                                 0x000fffffffffffff);
 252                 mb_array[i].absEnd = addr_to_chunk(mb_array[i].absEnd &
 253                                 0x000fffffffffffff);
 254                 mb_array[i].logicalStart =
 255                         addr_to_chunk(mb_array[i].logicalStart);
 256                 mb_array[i].logicalEnd = addr_to_chunk(mb_array[i].logicalEnd);
 257         }
 258         }
 259
 260         return numSegmentBlocks;
 261 }
 262
 263 static unsigned long iSeries_process_mainstore_vpd(struct MemoryBlock *mb_array,
 264                 unsigned long max_entries)
 265 {
 266         unsigned long i;
 267         unsigned long mem_blocks = 0;
 268
 269         if (cpu_has_feature(CPU_FTR_SLB))
 270                 mem_blocks = iSeries_process_Regatta_mainstore_vpd(mb_array,
 271                                 max_entries);
 272         else
 273                 mem_blocks = iSeries_process_Condor_mainstore_vpd(mb_array,
 274                                 max_entries);
 275
 276         printk("Mainstore_VPD: numMemoryBlocks = %ld \n", mem_blocks);
 277         for (i = 0; i < mem_blocks; ++i) {
 278                 printk("Mainstore_VPD: block %3ld logical chunks %016lx - %016lx\n"
 279                        "                             abs chunks %016lx - %016lx\n",
 280                         i, mb_array[i].logicalStart, mb_array[i].logicalEnd,
 281                         mb_array[i].absStart, mb_array[i].absEnd);
 282         }
 283         return mem_blocks;
 284 }
 285
 286 static void __init iSeries_get_cmdline(void)
 287 {
 288         char *p, *q;
 289
 290         /* copy the command line parameter from the primary VSP  */
 291         HvCallEvent_dmaToSp(cmd_line, 2 * 64* 1024, 256,
 292                         HvLpDma_Direction_RemoteToLocal);
 293
 294         p = cmd_line;
 295         q = cmd_line + 255;
 296         while(p < q) {
 297                 if (!*p || *p == '\n')
 298                         break;
 299                 ++p;
 300         }
 301         *p = 0;
 302 }
 303
 304 static void __init iSeries_init_early(void)
 305 {
 306         DBG(" -> iSeries_init_early()\n");
 307
 308         ppc64_firmware_features = FW_FEATURE_ISERIES;
 309
 310         ppc64_interrupt_controller = IC_ISERIES;
 311
 312 #if defined(CONFIG_BLK_DEV_INITRD)
 313         /*
 314          * If the init RAM disk has been configured and there is
 315          * a non-zero starting address for it, set it up
 316          */
 317         if (naca.xRamDisk) {
 318                 initrd_start = (unsigned long)__va(naca.xRamDisk);
 319                 initrd_end = initrd_start + naca.xRamDiskSize * HW_PAGE_SIZE;
 320                 initrd_below_start_ok = 1;      // ramdisk in kernel space
 321                 ROOT_DEV = Root_RAM0;
 322                 if (((rd_size * 1024) / HW_PAGE_SIZE) < naca.xRamDiskSize)
 323                         rd_size = (naca.xRamDiskSize * HW_PAGE_SIZE) / 1024;
 324         } else
 325 #endif /* CONFIG_BLK_DEV_INITRD */
 326         {
 327             /* ROOT_DEV = MKDEV(VIODASD_MAJOR, 1); */
 328         }
 329
 330         iSeries_recal_tb = get_tb();
 331         iSeries_recal_titan = HvCallXm_loadTod();
 332
 333         /*
 334          * Initialize the hash table management pointers
 335          */
 336         hpte_init_iSeries();
 337
 338         /*
 339          * Initialize the DMA/TCE management
 340          */
 341         iommu_init_early_iSeries();
 342
 343         /* Initialize machine-dependency vectors */
 344 #ifdef CONFIG_SMP
 345         smp_init_iSeries();
 346 #endif
 347         if (itLpNaca.xPirEnvironMode == 0)
 348                 piranha_simulator = 1;
 349
 350         /* Associate Lp Event Queue 0 with processor 0 */
 351         HvCallEvent_setLpEventQueueInterruptProc(0, 0);
 352
 353         mf_init();
 354         mf_initialized = 1;
 355         mb();
 356
 357         /* If we were passed an initrd, set the ROOT_DEV properly if the values
 358          * look sensible. If not, clear initrd reference.
 359          */
 360 #ifdef CONFIG_BLK_DEV_INITRD
 361         if (initrd_start >= KERNELBASE && initrd_end >= KERNELBASE &&
 362             initrd_end > initrd_start)
 363                 ROOT_DEV = Root_RAM0;
 364         else
 365                 initrd_start = initrd_end = 0;
 366 #endif /* CONFIG_BLK_DEV_INITRD */
 367
 368         DBG(" <- iSeries_init_early()\n");
 369 }
 370
 371 struct mschunks_map mschunks_map = {
 372         /* XXX We don't use these, but Piranha might need them. */
 373         .chunk_size  = MSCHUNKS_CHUNK_SIZE,
 374         .chunk_shift = MSCHUNKS_CHUNK_SHIFT,
 375         .chunk_mask  = MSCHUNKS_OFFSET_MASK,
 376 };
 377 EXPORT_SYMBOL(mschunks_map);
 378
 379 void mschunks_alloc(unsigned long num_chunks)
 380 {
 381         klimit = _ALIGN(klimit, sizeof(u32));
 382         mschunks_map.mapping = (u32 *)klimit;
 383         klimit += num_chunks * sizeof(u32);
 384         mschunks_map.num_chunks = num_chunks;
 385 }
 386
 387 /*
 388  * The iSeries may have very large memories ( > 128 GB ) and a partition
 389  * may get memory in "chunks" that may be anywhere in the 2**52 real
 390  * address space.  The chunks are 256K in size.  To map this to the
 391  * memory model Linux expects, the AS/400 specific code builds a
 392  * translation table to translate what Linux thinks are "physical"
 393  * addresses to the actual real addresses.  This allows us to make
 394  * it appear to Linux that we have contiguous memory starting at
 395  * physical address zero while in fact this could be far from the truth.
 396  * To avoid confusion, I'll let the words physical and/or real address
 397  * apply to the Linux addresses while I'll use "absolute address" to
 398  * refer to the actual hardware real address.
 399  *
 400  * build_iSeries_Memory_Map gets information from the Hypervisor and
 401  * looks at the Main Store VPD to determine the absolute addresses
 402  * of the memory that has been assigned to our partition and builds
 403  * a table used to translate Linux's physical addresses to these
 404  * absolute addresses.  Absolute addresses are needed when
 405  * communicating with the hypervisor (e.g. to build HPT entries)
 406  *
 407  * Returns the physical memory size
 408  */
 409
 410 static unsigned long __init build_iSeries_Memory_Map(void)
 411 {
 412         u32 loadAreaFirstChunk, loadAreaLastChunk, loadAreaSize;
 413         u32 nextPhysChunk;
 414         u32 hptFirstChunk, hptLastChunk, hptSizeChunks, hptSizePages;
 415         u32 totalChunks,moreChunks;
 416         u32 currChunk, thisChunk, absChunk;
 417         u32 currDword;
 418         u32 chunkBit;
 419         u64 map;
 420         struct MemoryBlock mb[32];
 421         unsigned long numMemoryBlocks, curBlock;
 422
 423         /* Chunk size on iSeries is 256K bytes */
 424         totalChunks = (u32)HvLpConfig_getMsChunks();
 425         mschunks_alloc(totalChunks);
 426
 427         /*
 428          * Get absolute address of our load area
 429          * and map it to physical address 0
 430          * This guarantees that the loadarea ends up at physical 0
 431          * otherwise, it might not be returned by PLIC as the first
 432          * chunks
 433          */
 434
 435         loadAreaFirstChunk = (u32)addr_to_chunk(itLpNaca.xLoadAreaAddr);
 436         loadAreaSize =  itLpNaca.xLoadAreaChunks;
 437
 438         /*
 439          * Only add the pages already mapped here.
 440          * Otherwise we might add the hpt pages
 441          * The rest of the pages of the load area
 442          * aren't in the HPT yet and can still
 443          * be assigned an arbitrary physical address
 444          */
 445         if ((loadAreaSize * 64) > HvPagesToMap)
 446                 loadAreaSize = HvPagesToMap / 64;
 447
 448         loadAreaLastChunk = loadAreaFirstChunk + loadAreaSize - 1;
 449
 450         /*
 451          * TODO Do we need to do something if the HPT is in the 64MB load area?
 452          * This would be required if the itLpNaca.xLoadAreaChunks includes
 453          * the HPT size
 454          */
 455
 456         printk("Mapping load area - physical addr = 0000000000000000\n"
 457                 "                    absolute addr = %016lx\n",
 458                 chunk_to_addr(loadAreaFirstChunk));
 459         printk("Load area size %dK\n", loadAreaSize * 256);
 460
 461         for (nextPhysChunk = 0; nextPhysChunk < loadAreaSize; ++nextPhysChunk)
 462                 mschunks_map.mapping[nextPhysChunk] =
 463                         loadAreaFirstChunk + nextPhysChunk;
 464
 465         /*
 466          * Get absolute address of our HPT and remember it so
 467          * we won't map it to any physical address
 468          */
 469         hptFirstChunk = (u32)addr_to_chunk(HvCallHpt_getHptAddress());
 470         hptSizePages = (u32)HvCallHpt_getHptPages();
 471         hptSizeChunks = hptSizePages >>
 472                 (MSCHUNKS_CHUNK_SHIFT - HW_PAGE_SHIFT);
 473         hptLastChunk = hptFirstChunk + hptSizeChunks - 1;
 474
 475         printk("HPT absolute addr = %016lx, size = %dK\n",
 476                         chunk_to_addr(hptFirstChunk), hptSizeChunks * 256);
 477
 478         ppc64_pft_size = __ilog2(hptSizePages * HW_PAGE_SIZE);
 479
 480         /*
 481          * The actual hashed page table is in the hypervisor,
 482          * we have no direct access
 483          */
 484         htab_address = NULL;
 485
 486         /*
 487          * Determine if absolute memory has any
 488          * holes so that we can interpret the
 489          * access map we get back from the hypervisor
 490          * correctly.
 491          */
 492         numMemoryBlocks = iSeries_process_mainstore_vpd(mb, 32);
 493
 494         /*
 495          * Process the main store access map from the hypervisor
 496          * to build up our physical -> absolute translation table
 497          */
 498         curBlock = 0;
 499         currChunk = 0;
 500         currDword = 0;
 501         moreChunks = totalChunks;
 502
 503         while (moreChunks) {
 504                 map = HvCallSm_get64BitsOfAccessMap(itLpNaca.xLpIndex,
 505                                 currDword);
 506                 thisChunk = currChunk;
 507                 while (map) {
 508                         chunkBit = map >> 63;
 509                         map <<= 1;
 510                         if (chunkBit) {
 511                                 --moreChunks;
 512                                 while (thisChunk >= mb[curBlock].logicalEnd) {
 513                                         ++curBlock;
 514                                         if (curBlock >= numMemoryBlocks)
 515                                                 panic("out of memory blocks");
 516                                 }
 517                                 if (thisChunk < mb[curBlock].logicalStart)
 518                                         panic("memory block error");
 519
 520                                 absChunk = mb[curBlock].absStart +
 521                                         (thisChunk - mb[curBlock].logicalStart);
 522                                 if (((absChunk < hptFirstChunk) ||
 523                                      (absChunk > hptLastChunk)) &&
 524                                     ((absChunk < loadAreaFirstChunk) ||
 525                                      (absChunk > loadAreaLastChunk))) {
 526                                         mschunks_map.mapping[nextPhysChunk] =
 527                                                 absChunk;
 528                                         ++nextPhysChunk;
 529                                 }
 530                         }
 531                         ++thisChunk;
 532                 }
 533                 ++currDword;
 534                 currChunk += 64;
 535         }
 536
 537         /*
 538          * main store size (in chunks) is
 539          *   totalChunks - hptSizeChunks
 540          * which should be equal to
 541          *   nextPhysChunk
 542          */
 543         return chunk_to_addr(nextPhysChunk);
 544 }
 545
 546 /*
 547  * Document me.
 548  */
 549 static void __init iSeries_setup_arch(void)
 550 {
 551         unsigned procIx = get_paca()->lppaca.dyn_hv_phys_proc_index;
 552
 553         if (get_paca()->lppaca.shared_proc) {
 554                 ppc_md.idle_loop = iseries_shared_idle;
 555                 printk(KERN_INFO "Using shared processor idle loop\n");
 556         } else {
 557                 ppc_md.idle_loop = iseries_dedicated_idle;
 558                 printk(KERN_INFO "Using dedicated idle loop\n");
 559         }
 560
 561         /* Setup the Lp Event Queue */
 562         setup_hvlpevent_queue();
 563
 564         printk("Max  logical processors = %d\n",
 565                         itVpdAreas.xSlicMaxLogicalProcs);
 566         printk("Max physical processors = %d\n",
 567                         itVpdAreas.xSlicMaxPhysicalProcs);
 568
 569         _systemcfg->processor = xIoHriProcessorVpd[procIx].xPVR;
 570         printk("Processor version = %x\n", _systemcfg->processor);
 571 }
 572
 573 static void iSeries_show_cpuinfo(struct seq_file *m)
 574 {
 575         seq_printf(m, "machine\t\t: 64-bit iSeries Logical Partition\n");
 576 }
 577
 578 /*
 579  * Document me.
 580  * and Implement me.
 581  */
 582 static int iSeries_get_irq(struct pt_regs *regs)
 583 {
 584         /* -2 means ignore this interrupt */
 585         return -2;
 586 }
 587
 588 /*
 589  * Document me.
 590  */
 591 static void iSeries_restart(char *cmd)
 592 {
 593         mf_reboot();
 594 }
 595
 596 /*
 597  * Document me.
 598  */
 599 static void iSeries_power_off(void)
 600 {
 601         mf_power_off();
 602 }
 603
 604 /*
 605  * Document me.
 606  */
 607 static void iSeries_halt(void)
 608 {
 609         mf_power_off();
 610 }
 611
 612 static void __init iSeries_progress(char * st, unsigned short code)
 613 {
 614         printk("Progress: [%04x] - %s\n", (unsigned)code, st);
 615         if (!piranha_simulator && mf_initialized) {
 616                 if (code != 0xffff)
 617                         mf_display_progress(code);
 618                 else
 619                         mf_clear_src();
 620         }
 621 }
 622
 623 static void __init iSeries_fixup_klimit(void)
 624 {
 625         /*
 626          * Change klimit to take into account any ram disk
 627          * that may be included
 628          */
 629         if (naca.xRamDisk)
 630                 klimit = KERNELBASE + (u64)naca.xRamDisk +
 631                         (naca.xRamDiskSize * HW_PAGE_SIZE);
 632         else {
 633                 /*
 634                  * No ram disk was included - check and see if there
 635                  * was an embedded system map.  Change klimit to take
 636                  * into account any embedded system map
 637                  */
 638                 if (embedded_sysmap_end)
 639                         klimit = KERNELBASE + ((embedded_sysmap_end + 4095) &
 640                                         0xfffffffffffff000);
 641         }
 642 }
 643
 644 static int __init iSeries_src_init(void)
 645 {
 646         /* clear the progress line */
 647         ppc_md.progress(" ", 0xffff);
 648         return 0;
 649 }
 650
 651 late_initcall(iSeries_src_init);
 652
 653 static inline void process_iSeries_events(void)
 654 {
 655         asm volatile ("li 0,0x5555; sc" : : : "r0", "r3");
 656 }
 657
 658 static void yield_shared_processor(void)
 659 {
 660         unsigned long tb;
 661
 662         HvCall_setEnabledInterrupts(HvCall_MaskIPI |
 663                                     HvCall_MaskLpEvent |
 664                                     HvCall_MaskLpProd |
 665                                     HvCall_MaskTimeout);
 666
 667         tb = get_tb();
 668         /* Compute future tb value when yield should expire */
 669         HvCall_yieldProcessor(HvCall_YieldTimed, tb+tb_ticks_per_jiffy);
 670
 671         /*
 672          * The decrementer stops during the yield.  Force a fake decrementer
 673          * here and let the timer_interrupt code sort out the actual time.
 674          */
 675         get_paca()->lppaca.int_dword.fields.decr_int = 1;
 676         process_iSeries_events();
 677 }
 678
 679 static void iseries_shared_idle(void)
 680 {
 681         while (1) {
 682                 while (!need_resched() && !hvlpevent_is_pending()) {
 683                         local_irq_disable();
 684                         ppc64_runlatch_off();
 685
 686                         /* Recheck with irqs off */
 687                         if (!need_resched() && !hvlpevent_is_pending())
 688                                 yield_shared_processor();
 689
 690                         HMT_medium();
 691                         local_irq_enable();
 692                 }
 693
 694                 ppc64_runlatch_on();
 695
 696                 if (hvlpevent_is_pending())
 697                         process_iSeries_events();
 698
 699                 preempt_enable_no_resched();
 700                 schedule();
 701                 preempt_disable();
 702         }
 703 }
 704
 705 static void iseries_dedicated_idle(void)
 706 {
 707         set_thread_flag(TIF_POLLING_NRFLAG);
 708
 709         while (1) {
 710                 if (!need_resched()) {
 711                         while (!need_resched()) {
 712                                 ppc64_runlatch_off();
 713                                 HMT_low();
 714
 715                                 if (hvlpevent_is_pending()) {
 716                                         HMT_medium();
 717                                         ppc64_runlatch_on();
 718                                         process_iSeries_events();
 719                                 }
 720                         }
 721
 722                         HMT_medium();
 723                 }
 724
 725                 ppc64_runlatch_on();
 726                 preempt_enable_no_resched();
 727                 schedule();
 728                 preempt_disable();
 729         }
 730 }
 731
 732 #ifndef CONFIG_PCI
 733 void __init iSeries_init_IRQ(void) { }
 734 #endif
 735
 736 static int __init iseries_probe(int platform)
 737 {
 738         return PLATFORM_ISERIES_LPAR == platform;
 739 }
 740
 741 struct machdep_calls __initdata iseries_md = {
 742         .setup_arch     = iSeries_setup_arch,
 743         .show_cpuinfo   = iSeries_show_cpuinfo,
 744         .init_IRQ       = iSeries_init_IRQ,
 745         .get_irq        = iSeries_get_irq,
 746         .init_early     = iSeries_init_early,
 747         .pcibios_fixup  = iSeries_pci_final_fixup,
 748         .restart        = iSeries_restart,
 749         .power_off      = iSeries_power_off,
 750         .halt           = iSeries_halt,
 751         .get_boot_time  = iSeries_get_boot_time,
 752         .set_rtc_time   = iSeries_set_rtc_time,
 753         .get_rtc_time   = iSeries_get_rtc_time,
 754         .calibrate_decr = generic_calibrate_decr,
 755         .progress       = iSeries_progress,
 756         .probe          = iseries_probe,
 757         /* XXX Implement enable_pmcs for iSeries */
 758 };
 759
 760 struct blob {
 761         unsigned char data[PAGE_SIZE];
 762         unsigned long next;
 763 };
 764
 765 struct iseries_flat_dt {
 766         struct boot_param_header header;
 767         u64 reserve_map[2];
 768         struct blob dt;
 769         struct blob strings;
 770 };
 771
 772 struct iseries_flat_dt iseries_dt;
 773
 774 void dt_init(struct iseries_flat_dt *dt)
 775 {
 776         dt->header.off_mem_rsvmap =
 777                 offsetof(struct iseries_flat_dt, reserve_map);
 778         dt->header.off_dt_struct = offsetof(struct iseries_flat_dt, dt);
 779         dt->header.off_dt_strings = offsetof(struct iseries_flat_dt, strings);
 780         dt->header.totalsize = sizeof(struct iseries_flat_dt);
 781         dt->header.dt_strings_size = sizeof(struct blob);
 782
 783         /* There is no notion of hardware cpu id on iSeries */
 784         dt->header.boot_cpuid_phys = smp_processor_id();
 785
 786         dt->dt.next = (unsigned long)&dt->dt.data;
 787         dt->strings.next = (unsigned long)&dt->strings.data;
 788
 789         dt->header.magic = OF_DT_HEADER;
 790         dt->header.version = 0x10;
 791         dt->header.last_comp_version = 0x10;
 792
 793         dt->reserve_map[0] = 0;
 794         dt->reserve_map[1] = 0;
 795 }
 796
 797 void dt_check_blob(struct blob *b)
 798 {
 799         if (b->next >= (unsigned long)&b->next) {
 800                 DBG("Ran out of space in flat device tree blob!\n");
 801                 BUG();
 802         }
 803 }
 804
 805 void dt_push_u32(struct iseries_flat_dt *dt, u32 value)
 806 {
 807         *((u32*)dt->dt.next) = value;
 808         dt->dt.next += sizeof(u32);
 809
 810         dt_check_blob(&dt->dt);
 811 }
 812
 813 void dt_push_u64(struct iseries_flat_dt *dt, u64 value)
 814 {
 815         *((u64*)dt->dt.next) = value;
 816         dt->dt.next += sizeof(u64);
 817
 818         dt_check_blob(&dt->dt);
 819 }
 820
 821 unsigned long dt_push_bytes(struct blob *blob, char *data, int len)
 822 {
 823         unsigned long start = blob->next - (unsigned long)blob->data;
 824
 825         memcpy((char *)blob->next, data, len);
 826         blob->next = _ALIGN(blob->next + len, 4);
 827
 828         dt_check_blob(blob);
 829
 830         return start;
 831 }
 832
 833 void dt_start_node(struct iseries_flat_dt *dt, char *name)
 834 {
 835         dt_push_u32(dt, OF_DT_BEGIN_NODE);
 836         dt_push_bytes(&dt->dt, name, strlen(name) + 1);
 837 }
 838
 839 #define dt_end_node(dt) dt_push_u32(dt, OF_DT_END_NODE)
 840
 841 void dt_prop(struct iseries_flat_dt *dt, char *name, char *data, int len)
 842 {
 843         unsigned long offset;
 844
 845         dt_push_u32(dt, OF_DT_PROP);
 846
 847         /* Length of the data */
 848         dt_push_u32(dt, len);
 849
 850         /* Put the property name in the string blob. */
 851         offset = dt_push_bytes(&dt->strings, name, strlen(name) + 1);
 852
 853         /* The offset of the properties name in the string blob. */
 854         dt_push_u32(dt, (u32)offset);
 855
 856         /* The actual data. */
 857         dt_push_bytes(&dt->dt, data, len);
 858 }
 859
 860 void dt_prop_str(struct iseries_flat_dt *dt, char *name, char *data)
 861 {
 862         dt_prop(dt, name, data, strlen(data) + 1); /* + 1 for NULL */
 863 }
 864
 865 void dt_prop_u32(struct iseries_flat_dt *dt, char *name, u32 data)
 866 {
 867         dt_prop(dt, name, (char *)&data, sizeof(u32));
 868 }
 869
 870 void dt_prop_u64(struct iseries_flat_dt *dt, char *name, u64 data)
 871 {
 872         dt_prop(dt, name, (char *)&data, sizeof(u64));
 873 }
 874
 875 void dt_prop_u64_list(struct iseries_flat_dt *dt, char *name, u64 *data, int n)
 876 {
 877         dt_prop(dt, name, (char *)data, sizeof(u64) * n);
 878 }
 879
 880 void dt_prop_empty(struct iseries_flat_dt *dt, char *name)
 881 {
 882         dt_prop(dt, name, NULL, 0);
 883 }
 884
 885 void dt_cpus(struct iseries_flat_dt *dt)
 886 {
 887         unsigned char buf[32];
 888         unsigned char *p;
 889         unsigned int i, index;
 890         struct IoHriProcessorVpd *d;
 891
 892         /* yuck */
 893         snprintf(buf, 32, "PowerPC,%s", cur_cpu_spec->cpu_name);
 894         p = strchr(buf, ' ');
 895         if (!p) p = buf + strlen(buf);
 896
 897         dt_start_node(dt, "cpus");
 898         dt_prop_u32(dt, "#address-cells", 1);
 899         dt_prop_u32(dt, "#size-cells", 0);
 900
 901         for (i = 0; i < NR_CPUS; i++) {
 902                 if (paca[i].lppaca.dyn_proc_status >= 2)
 903                         continue;
 904
 905                 snprintf(p, 32 - (p - buf), "@%d", i);
 906                 dt_start_node(dt, buf);
 907
 908                 dt_prop_str(dt, "device_type", "cpu");
 909
 910                 index = paca[i].lppaca.dyn_hv_phys_proc_index;
 911                 d = &xIoHriProcessorVpd[index];
 912
 913                 dt_prop_u32(dt, "i-cache-size", d->xInstCacheSize * 1024);
 914                 dt_prop_u32(dt, "i-cache-line-size", d->xInstCacheOperandSize);
 915
 916                 dt_prop_u32(dt, "d-cache-size", d->xDataL1CacheSizeKB * 1024);
 917                 dt_prop_u32(dt, "d-cache-line-size", d->xDataCacheOperandSize);
 918
 919                 /* magic conversions to Hz copied from old code */
 920                 dt_prop_u32(dt, "clock-frequency",
 921                         ((1UL << 34) * 1000000) / d->xProcFreq);
 922                 dt_prop_u32(dt, "timebase-frequency",
 923                         ((1UL << 32) * 1000000) / d->xTimeBaseFreq);
 924
 925                 dt_prop_u32(dt, "reg", i);
 926
 927                 dt_end_node(dt);
 928         }
 929
 930         dt_end_node(dt);
 931 }
 932
 933 void build_flat_dt(struct iseries_flat_dt *dt, unsigned long phys_mem_size)
 934 {
 935         u64 tmp[2];
 936
 937         dt_init(dt);
 938
 939         dt_start_node(dt, "");
 940
 941         dt_prop_u32(dt, "#address-cells", 2);
 942         dt_prop_u32(dt, "#size-cells", 2);
 943
 944         /* /memory */
 945         dt_start_node(dt, "memory@0");
 946         dt_prop_str(dt, "name", "memory");
 947         dt_prop_str(dt, "device_type", "memory");
 948         tmp[0] = 0;
 949         tmp[1] = phys_mem_size;
 950         dt_prop_u64_list(dt, "reg", tmp, 2);
 951         dt_end_node(dt);
 952
 953         /* /chosen */
 954         dt_start_node(dt, "chosen");
 955         dt_prop_u32(dt, "linux,platform", PLATFORM_ISERIES_LPAR);
 956         if (cmd_mem_limit)
 957                 dt_prop_u64(dt, "linux,memory-limit", cmd_mem_limit);
 958         dt_end_node(dt);
 959
 960         dt_cpus(dt);
 961
 962         dt_end_node(dt);
 963
 964         dt_push_u32(dt, OF_DT_END);
 965 }
 966
 967 void * __init iSeries_early_setup(void)
 968 {
 969         unsigned long phys_mem_size;
 970
 971         iSeries_fixup_klimit();
 972
 973         /*
 974          * Initialize the table which translate Linux physical addresses to
 975          * AS/400 absolute addresses
 976          */
 977         phys_mem_size = build_iSeries_Memory_Map();
 978
 979         iSeries_get_cmdline();
 980
 981         /* Save unparsed command line copy for /proc/cmdline */
 982         strlcpy(saved_command_line, cmd_line, COMMAND_LINE_SIZE);
 983
 984         /* Parse early parameters, in particular mem=x */
 985         parse_early_param();
 986
 987         build_flat_dt(&iseries_dt, phys_mem_size);
 988
 989         return (void *) __pa(&iseries_dt);
 990 }
 991
 992 /*
 993  * On iSeries we just parse the mem=X option from the command line.
 994  * On pSeries it's a bit more complicated, see prom_init_mem()
 995  */
 996 static int __init early_parsemem(char *p)
 997 {
 998         if (p)
 999                 cmd_mem_limit = ALIGN(memparse(p, &p), PAGE_SIZE);
1000         return 0;
1001 }
1002 early_param("mem", early_parsemem);