arch/sparc64/kernel/prom.c

   1 /*
   2  * Procedures for creating, accessing and interpreting the device tree.
   3  *
   4  * Paul Mackerras       August 1996.
   5  * Copyright (C) 1996-2005 Paul Mackerras.
   6  *
   7  *  Adapted for 64bit PowerPC by Dave Engebretsen and Peter Bergner.
   8  *    {engebret|bergner}@us.ibm.com
   9  *
  10  *  Adapted for sparc64 by David S. Miller davem@davemloft.net
  11  *
  12  *      This program is free software; you can redistribute it and/or
  13  *      modify it under the terms of the GNU General Public License
  14  *      as published by the Free Software Foundation; either version
  15  *      2 of the License, or (at your option) any later version.
  16  */
  17
  18 #include <linux/kernel.h>
  19 #include <linux/types.h>
  20 #include <linux/string.h>
  21 #include <linux/mm.h>
  22 #include <linux/bootmem.h>
  23 #include <linux/module.h>
  24
  25 #include <asm/prom.h>
  26 #include <asm/of_device.h>
  27 #include <asm/oplib.h>
  28 #include <asm/irq.h>
  29 #include <asm/asi.h>
  30 #include <asm/upa.h>
  31 #include <asm/smp.h>
  32
  33 static struct device_node *allnodes;
  34
  35 /* use when traversing tree through the allnext, child, sibling,
  36  * or parent members of struct device_node.
  37  */
  38 static DEFINE_RWLOCK(devtree_lock);
  39
  40 struct device_node *of_get_parent(const struct device_node *node)
  41 {
  42         struct device_node *np;
  43
  44         if (!node)
  45                 return NULL;
  46
  47         np = node->parent;
  48
  49         return np;
  50 }
  51 EXPORT_SYMBOL(of_get_parent);
  52
  53 struct device_node *of_get_next_child(const struct device_node *node,
  54         struct device_node *prev)
  55 {
  56         struct device_node *next;
  57
  58         next = prev ? prev->sibling : node->child;
  59         for (; next != 0; next = next->sibling) {
  60                 break;
  61         }
  62
  63         return next;
  64 }
  65 EXPORT_SYMBOL(of_get_next_child);
  66
  67 struct device_node *of_find_node_by_path(const char *path)
  68 {
  69         struct device_node *np = allnodes;
  70
  71         for (; np != 0; np = np->allnext) {
  72                 if (np->full_name != 0 && strcmp(np->full_name, path) == 0)
  73                         break;
  74         }
  75
  76         return np;
  77 }
  78 EXPORT_SYMBOL(of_find_node_by_path);
  79
  80 struct device_node *of_find_node_by_phandle(phandle handle)
  81 {
  82         struct device_node *np;
  83
  84         for (np = allnodes; np != 0; np = np->allnext)
  85                 if (np->node == handle)
  86                         break;
  87
  88         return np;
  89 }
  90 EXPORT_SYMBOL(of_find_node_by_phandle);
  91
  92 struct device_node *of_find_node_by_name(struct device_node *from,
  93         const char *name)
  94 {
  95         struct device_node *np;
  96
  97         np = from ? from->allnext : allnodes;
  98         for (; np != NULL; np = np->allnext)
  99                 if (np->name != NULL && strcmp(np->name, name) == 0)
 100                         break;
 101
 102         return np;
 103 }
 104 EXPORT_SYMBOL(of_find_node_by_name);
 105
 106 struct device_node *of_find_node_by_type(struct device_node *from,
 107         const char *type)
 108 {
 109         struct device_node *np;
 110
 111         np = from ? from->allnext : allnodes;
 112         for (; np != 0; np = np->allnext)
 113                 if (np->type != 0 && strcmp(np->type, type) == 0)
 114                         break;
 115
 116         return np;
 117 }
 118 EXPORT_SYMBOL(of_find_node_by_type);
 119
 120 struct device_node *of_find_compatible_node(struct device_node *from,
 121         const char *type, const char *compatible)
 122 {
 123         struct device_node *np;
 124
 125         np = from ? from->allnext : allnodes;
 126         for (; np != 0; np = np->allnext) {
 127                 if (type != NULL
 128                     && !(np->type != 0 && strcmp(np->type, type) == 0))
 129                         continue;
 130                 if (of_device_is_compatible(np, compatible))
 131                         break;
 132         }
 133
 134         return np;
 135 }
 136 EXPORT_SYMBOL(of_find_compatible_node);
 137
 138 struct property *of_find_property(const struct device_node *np,
 139                                   const char *name,
 140                                   int *lenp)
 141 {
 142         struct property *pp;
 143
 144         for (pp = np->properties; pp != 0; pp = pp->next) {
 145                 if (strcasecmp(pp->name, name) == 0) {
 146                         if (lenp != 0)
 147                                 *lenp = pp->length;
 148                         break;
 149                 }
 150         }
 151         return pp;
 152 }
 153 EXPORT_SYMBOL(of_find_property);
 154
 155 int of_getintprop_default(struct device_node *np, const char *name, int def)
 156 {
 157         struct property *prop;
 158         int len;
 159
 160         prop = of_find_property(np, name, &len);
 161         if (!prop || len != 4)
 162                 return def;
 163
 164         return *(int *) prop->value;
 165 }
 166 EXPORT_SYMBOL(of_getintprop_default);
 167
 168 int of_set_property(struct device_node *dp, const char *name, void *val, int len)
 169 {
 170         struct property **prevp;
 171         void *new_val;
 172         int err;
 173
 174         new_val = kmalloc(len, GFP_KERNEL);
 175         if (!new_val)
 176                 return -ENOMEM;
 177
 178         memcpy(new_val, val, len);
 179
 180         err = -ENODEV;
 181
 182         write_lock(&devtree_lock);
 183         prevp = &dp->properties;
 184         while (*prevp) {
 185                 struct property *prop = *prevp;
 186
 187                 if (!strcasecmp(prop->name, name)) {
 188                         void *old_val = prop->value;
 189                         int ret;
 190
 191                         ret = prom_setprop(dp->node, name, val, len);
 192                         err = -EINVAL;
 193                         if (ret >= 0) {
 194                                 prop->value = new_val;
 195                                 prop->length = len;
 196
 197                                 if (OF_IS_DYNAMIC(prop))
 198                                         kfree(old_val);
 199
 200                                 OF_MARK_DYNAMIC(prop);
 201
 202                                 err = 0;
 203                         }
 204                         break;
 205                 }
 206                 prevp = &(*prevp)->next;
 207         }
 208         write_unlock(&devtree_lock);
 209
 210         /* XXX Upate procfs if necessary... */
 211
 212         return err;
 213 }
 214 EXPORT_SYMBOL(of_set_property);
 215
 216 static unsigned int prom_early_allocated;
 217
 218 static void * __init prom_early_alloc(unsigned long size)
 219 {
 220         void *ret;
 221
 222         ret = __alloc_bootmem(size, SMP_CACHE_BYTES, 0UL);
 223         if (ret != NULL)
 224                 memset(ret, 0, size);
 225
 226         prom_early_allocated += size;
 227
 228         return ret;
 229 }
 230
 231 #ifdef CONFIG_PCI
 232 /* PSYCHO interrupt mapping support. */
 233 #define PSYCHO_IMAP_A_SLOT0     0x0c00UL
 234 #define PSYCHO_IMAP_B_SLOT0     0x0c20UL
 235 static unsigned long psycho_pcislot_imap_offset(unsigned long ino)
 236 {
 237         unsigned int bus =  (ino & 0x10) >> 4;
 238         unsigned int slot = (ino & 0x0c) >> 2;
 239
 240         if (bus == 0)
 241                 return PSYCHO_IMAP_A_SLOT0 + (slot * 8);
 242         else
 243                 return PSYCHO_IMAP_B_SLOT0 + (slot * 8);
 244 }
 245
 246 #define PSYCHO_IMAP_SCSI        0x1000UL
 247 #define PSYCHO_IMAP_ETH         0x1008UL
 248 #define PSYCHO_IMAP_BPP         0x1010UL
 249 #define PSYCHO_IMAP_AU_REC      0x1018UL
 250 #define PSYCHO_IMAP_AU_PLAY     0x1020UL
 251 #define PSYCHO_IMAP_PFAIL       0x1028UL
 252 #define PSYCHO_IMAP_KMS         0x1030UL
 253 #define PSYCHO_IMAP_FLPY        0x1038UL
 254 #define PSYCHO_IMAP_SHW         0x1040UL
 255 #define PSYCHO_IMAP_KBD         0x1048UL
 256 #define PSYCHO_IMAP_MS          0x1050UL
 257 #define PSYCHO_IMAP_SER         0x1058UL
 258 #define PSYCHO_IMAP_TIM0        0x1060UL
 259 #define PSYCHO_IMAP_TIM1        0x1068UL
 260 #define PSYCHO_IMAP_UE          0x1070UL
 261 #define PSYCHO_IMAP_CE          0x1078UL
 262 #define PSYCHO_IMAP_A_ERR       0x1080UL
 263 #define PSYCHO_IMAP_B_ERR       0x1088UL
 264 #define PSYCHO_IMAP_PMGMT       0x1090UL
 265 #define PSYCHO_IMAP_GFX         0x1098UL
 266 #define PSYCHO_IMAP_EUPA        0x10a0UL
 267
 268 static unsigned long __psycho_onboard_imap_off[] = {
 269 /*0x20*/        PSYCHO_IMAP_SCSI,
 270 /*0x21*/        PSYCHO_IMAP_ETH,
 271 /*0x22*/        PSYCHO_IMAP_BPP,
 272 /*0x23*/        PSYCHO_IMAP_AU_REC,
 273 /*0x24*/        PSYCHO_IMAP_AU_PLAY,
 274 /*0x25*/        PSYCHO_IMAP_PFAIL,
 275 /*0x26*/        PSYCHO_IMAP_KMS,
 276 /*0x27*/        PSYCHO_IMAP_FLPY,
 277 /*0x28*/        PSYCHO_IMAP_SHW,
 278 /*0x29*/        PSYCHO_IMAP_KBD,
 279 /*0x2a*/        PSYCHO_IMAP_MS,
 280 /*0x2b*/        PSYCHO_IMAP_SER,
 281 /*0x2c*/        PSYCHO_IMAP_TIM0,
 282 /*0x2d*/        PSYCHO_IMAP_TIM1,
 283 /*0x2e*/        PSYCHO_IMAP_UE,
 284 /*0x2f*/        PSYCHO_IMAP_CE,
 285 /*0x30*/        PSYCHO_IMAP_A_ERR,
 286 /*0x31*/        PSYCHO_IMAP_B_ERR,
 287 /*0x32*/        PSYCHO_IMAP_PMGMT,
 288 /*0x33*/        PSYCHO_IMAP_GFX,
 289 /*0x34*/        PSYCHO_IMAP_EUPA,
 290 };
 291 #define PSYCHO_ONBOARD_IRQ_BASE         0x20
 292 #define PSYCHO_ONBOARD_IRQ_LAST         0x34
 293 #define psycho_onboard_imap_offset(__ino) \
 294         __psycho_onboard_imap_off[(__ino) - PSYCHO_ONBOARD_IRQ_BASE]
 295
 296 #define PSYCHO_ICLR_A_SLOT0     0x1400UL
 297 #define PSYCHO_ICLR_SCSI        0x1800UL
 298
 299 #define psycho_iclr_offset(ino)                                       \
 300         ((ino & 0x20) ? (PSYCHO_ICLR_SCSI + (((ino) & 0x1f) << 3)) :  \
 301                         (PSYCHO_ICLR_A_SLOT0 + (((ino) & 0x1f)<<3)))
 302
 303 static unsigned int psycho_irq_build(struct device_node *dp,
 304                                      unsigned int ino,
 305                                      void *_data)
 306 {
 307         unsigned long controller_regs = (unsigned long) _data;
 308         unsigned long imap, iclr;
 309         unsigned long imap_off, iclr_off;
 310         int inofixup = 0;
 311
 312         ino &= 0x3f;
 313         if (ino < PSYCHO_ONBOARD_IRQ_BASE) {
 314                 /* PCI slot */
 315                 imap_off = psycho_pcislot_imap_offset(ino);
 316         } else {
 317                 /* Onboard device */
 318                 if (ino > PSYCHO_ONBOARD_IRQ_LAST) {
 319                         prom_printf("psycho_irq_build: Wacky INO [%x]\n", ino);
 320                         prom_halt();
 321                 }
 322                 imap_off = psycho_onboard_imap_offset(ino);
 323         }
 324
 325         /* Now build the IRQ bucket. */
 326         imap = controller_regs + imap_off;
 327
 328         iclr_off = psycho_iclr_offset(ino);
 329         iclr = controller_regs + iclr_off;
 330
 331         if ((ino & 0x20) == 0)
 332                 inofixup = ino & 0x03;
 333
 334         return build_irq(inofixup, iclr, imap);
 335 }
 336
 337 static void __init psycho_irq_trans_init(struct device_node *dp)
 338 {
 339         const struct linux_prom64_registers *regs;
 340
 341         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
 342         dp->irq_trans->irq_build = psycho_irq_build;
 343
 344         regs = of_get_property(dp, "reg", NULL);
 345         dp->irq_trans->data = (void *) regs[2].phys_addr;
 346 }
 347
 348 #define sabre_read(__reg) \
 349 ({      u64 __ret; \
 350         __asm__ __volatile__("ldxa [%1] %2, %0" \
 351                              : "=r" (__ret) \
 352                              : "r" (__reg), "i" (ASI_PHYS_BYPASS_EC_E) \
 353                              : "memory"); \
 354         __ret; \
 355 })
 356
 357 struct sabre_irq_data {
 358         unsigned long controller_regs;
 359         unsigned int pci_first_busno;
 360 };
 361 #define SABRE_CONFIGSPACE       0x001000000UL
 362 #define SABRE_WRSYNC            0x1c20UL
 363
 364 #define SABRE_CONFIG_BASE(CONFIG_SPACE) \
 365         (CONFIG_SPACE | (1UL << 24))
 366 #define SABRE_CONFIG_ENCODE(BUS, DEVFN, REG)    \
 367         (((unsigned long)(BUS)   << 16) |       \
 368          ((unsigned long)(DEVFN) << 8)  |       \
 369          ((unsigned long)(REG)))
 370
 371 /* When a device lives behind a bridge deeper in the PCI bus topology
 372  * than APB, a special sequence must run to make sure all pending DMA
 373  * transfers at the time of IRQ delivery are visible in the coherency
 374  * domain by the cpu.  This sequence is to perform a read on the far
 375  * side of the non-APB bridge, then perform a read of Sabre's DMA
 376  * write-sync register.
 377  */
 378 static void sabre_wsync_handler(unsigned int ino, void *_arg1, void *_arg2)
 379 {
 380         unsigned int phys_hi = (unsigned int) (unsigned long) _arg1;
 381         struct sabre_irq_data *irq_data = _arg2;
 382         unsigned long controller_regs = irq_data->controller_regs;
 383         unsigned long sync_reg = controller_regs + SABRE_WRSYNC;
 384         unsigned long config_space = controller_regs + SABRE_CONFIGSPACE;
 385         unsigned int bus, devfn;
 386         u16 _unused;
 387
 388         config_space = SABRE_CONFIG_BASE(config_space);
 389
 390         bus = (phys_hi >> 16) & 0xff;
 391         devfn = (phys_hi >> 8) & 0xff;
 392
 393         config_space |= SABRE_CONFIG_ENCODE(bus, devfn, 0x00);
 394
 395         __asm__ __volatile__("membar #Sync\n\t"
 396                              "lduha [%1] %2, %0\n\t"
 397                              "membar #Sync"
 398                              : "=r" (_unused)
 399                              : "r" ((u16 *) config_space),
 400                                "i" (ASI_PHYS_BYPASS_EC_E_L)
 401                              : "memory");
 402
 403         sabre_read(sync_reg);
 404 }
 405
 406 #define SABRE_IMAP_A_SLOT0      0x0c00UL
 407 #define SABRE_IMAP_B_SLOT0      0x0c20UL
 408 #define SABRE_IMAP_SCSI         0x1000UL
 409 #define SABRE_IMAP_ETH          0x1008UL
 410 #define SABRE_IMAP_BPP          0x1010UL
 411 #define SABRE_IMAP_AU_REC       0x1018UL
 412 #define SABRE_IMAP_AU_PLAY      0x1020UL
 413 #define SABRE_IMAP_PFAIL        0x1028UL
 414 #define SABRE_IMAP_KMS          0x1030UL
 415 #define SABRE_IMAP_FLPY         0x1038UL
 416 #define SABRE_IMAP_SHW          0x1040UL
 417 #define SABRE_IMAP_KBD          0x1048UL
 418 #define SABRE_IMAP_MS           0x1050UL
 419 #define SABRE_IMAP_SER          0x1058UL
 420 #define SABRE_IMAP_UE           0x1070UL
 421 #define SABRE_IMAP_CE           0x1078UL
 422 #define SABRE_IMAP_PCIERR       0x1080UL
 423 #define SABRE_IMAP_GFX          0x1098UL
 424 #define SABRE_IMAP_EUPA         0x10a0UL
 425 #define SABRE_ICLR_A_SLOT0      0x1400UL
 426 #define SABRE_ICLR_B_SLOT0      0x1480UL
 427 #define SABRE_ICLR_SCSI         0x1800UL
 428 #define SABRE_ICLR_ETH          0x1808UL
 429 #define SABRE_ICLR_BPP          0x1810UL
 430 #define SABRE_ICLR_AU_REC       0x1818UL
 431 #define SABRE_ICLR_AU_PLAY      0x1820UL
 432 #define SABRE_ICLR_PFAIL        0x1828UL
 433 #define SABRE_ICLR_KMS          0x1830UL
 434 #define SABRE_ICLR_FLPY         0x1838UL
 435 #define SABRE_ICLR_SHW          0x1840UL
 436 #define SABRE_ICLR_KBD          0x1848UL
 437 #define SABRE_ICLR_MS           0x1850UL
 438 #define SABRE_ICLR_SER          0x1858UL
 439 #define SABRE_ICLR_UE           0x1870UL
 440 #define SABRE_ICLR_CE           0x1878UL
 441 #define SABRE_ICLR_PCIERR       0x1880UL
 442
 443 static unsigned long sabre_pcislot_imap_offset(unsigned long ino)
 444 {
 445         unsigned int bus =  (ino & 0x10) >> 4;
 446         unsigned int slot = (ino & 0x0c) >> 2;
 447
 448         if (bus == 0)
 449                 return SABRE_IMAP_A_SLOT0 + (slot * 8);
 450         else
 451                 return SABRE_IMAP_B_SLOT0 + (slot * 8);
 452 }
 453
 454 static unsigned long __sabre_onboard_imap_off[] = {
 455 /*0x20*/        SABRE_IMAP_SCSI,
 456 /*0x21*/        SABRE_IMAP_ETH,
 457 /*0x22*/        SABRE_IMAP_BPP,
 458 /*0x23*/        SABRE_IMAP_AU_REC,
 459 /*0x24*/        SABRE_IMAP_AU_PLAY,
 460 /*0x25*/        SABRE_IMAP_PFAIL,
 461 /*0x26*/        SABRE_IMAP_KMS,
 462 /*0x27*/        SABRE_IMAP_FLPY,
 463 /*0x28*/        SABRE_IMAP_SHW,
 464 /*0x29*/        SABRE_IMAP_KBD,
 465 /*0x2a*/        SABRE_IMAP_MS,
 466 /*0x2b*/        SABRE_IMAP_SER,
 467 /*0x2c*/        0 /* reserved */,
 468 /*0x2d*/        0 /* reserved */,
 469 /*0x2e*/        SABRE_IMAP_UE,
 470 /*0x2f*/        SABRE_IMAP_CE,
 471 /*0x30*/        SABRE_IMAP_PCIERR,
 472 /*0x31*/        0 /* reserved */,
 473 /*0x32*/        0 /* reserved */,
 474 /*0x33*/        SABRE_IMAP_GFX,
 475 /*0x34*/        SABRE_IMAP_EUPA,
 476 };
 477 #define SABRE_ONBOARD_IRQ_BASE          0x20
 478 #define SABRE_ONBOARD_IRQ_LAST          0x30
 479 #define sabre_onboard_imap_offset(__ino) \
 480         __sabre_onboard_imap_off[(__ino) - SABRE_ONBOARD_IRQ_BASE]
 481
 482 #define sabre_iclr_offset(ino)                                        \
 483         ((ino & 0x20) ? (SABRE_ICLR_SCSI + (((ino) & 0x1f) << 3)) :  \
 484                         (SABRE_ICLR_A_SLOT0 + (((ino) & 0x1f)<<3)))
 485
 486 static int sabre_device_needs_wsync(struct device_node *dp)
 487 {
 488         struct device_node *parent = dp->parent;
 489         const char *parent_model, *parent_compat;
 490
 491         /* This traversal up towards the root is meant to
 492          * handle two cases:
 493          *
 494          * 1) non-PCI bus sitting under PCI, such as 'ebus'
 495          * 2) the PCI controller interrupts themselves, which
 496          *    will use the sabre_irq_build but do not need
 497          *    the DMA synchronization handling
 498          */
 499         while (parent) {
 500                 if (!strcmp(parent->type, "pci"))
 501                         break;
 502                 parent = parent->parent;
 503         }
 504
 505         if (!parent)
 506                 return 0;
 507
 508         parent_model = of_get_property(parent,
 509                                        "model", NULL);
 510         if (parent_model &&
 511             (!strcmp(parent_model, "SUNW,sabre") ||
 512              !strcmp(parent_model, "SUNW,simba")))
 513                 return 0;
 514
 515         parent_compat = of_get_property(parent,
 516                                         "compatible", NULL);
 517         if (parent_compat &&
 518             (!strcmp(parent_compat, "pci108e,a000") ||
 519              !strcmp(parent_compat, "pci108e,a001")))
 520                 return 0;
 521
 522         return 1;
 523 }
 524
 525 static unsigned int sabre_irq_build(struct device_node *dp,
 526                                     unsigned int ino,
 527                                     void *_data)
 528 {
 529         struct sabre_irq_data *irq_data = _data;
 530         unsigned long controller_regs = irq_data->controller_regs;
 531         const struct linux_prom_pci_registers *regs;
 532         unsigned long imap, iclr;
 533         unsigned long imap_off, iclr_off;
 534         int inofixup = 0;
 535         int virt_irq;
 536
 537         ino &= 0x3f;
 538         if (ino < SABRE_ONBOARD_IRQ_BASE) {
 539                 /* PCI slot */
 540                 imap_off = sabre_pcislot_imap_offset(ino);
 541         } else {
 542                 /* onboard device */
 543                 if (ino > SABRE_ONBOARD_IRQ_LAST) {
 544                         prom_printf("sabre_irq_build: Wacky INO [%x]\n", ino);
 545                         prom_halt();
 546                 }
 547                 imap_off = sabre_onboard_imap_offset(ino);
 548         }
 549
 550         /* Now build the IRQ bucket. */
 551         imap = controller_regs + imap_off;
 552
 553         iclr_off = sabre_iclr_offset(ino);
 554         iclr = controller_regs + iclr_off;
 555
 556         if ((ino & 0x20) == 0)
 557                 inofixup = ino & 0x03;
 558
 559         virt_irq = build_irq(inofixup, iclr, imap);
 560
 561         /* If the parent device is a PCI<->PCI bridge other than
 562          * APB, we have to install a pre-handler to ensure that
 563          * all pending DMA is drained before the interrupt handler
 564          * is run.
 565          */
 566         regs = of_get_property(dp, "reg", NULL);
 567         if (regs && sabre_device_needs_wsync(dp)) {
 568                 irq_install_pre_handler(virt_irq,
 569                                         sabre_wsync_handler,
 570                                         (void *) (long) regs->phys_hi,
 571                                         (void *) irq_data);
 572         }
 573
 574         return virt_irq;
 575 }
 576
 577 static void __init sabre_irq_trans_init(struct device_node *dp)
 578 {
 579         const struct linux_prom64_registers *regs;
 580         struct sabre_irq_data *irq_data;
 581         const u32 *busrange;
 582
 583         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
 584         dp->irq_trans->irq_build = sabre_irq_build;
 585
 586         irq_data = prom_early_alloc(sizeof(struct sabre_irq_data));
 587
 588         regs = of_get_property(dp, "reg", NULL);
 589         irq_data->controller_regs = regs[0].phys_addr;
 590
 591         busrange = of_get_property(dp, "bus-range", NULL);
 592         irq_data->pci_first_busno = busrange[0];
 593
 594         dp->irq_trans->data = irq_data;
 595 }
 596
 597 /* SCHIZO interrupt mapping support.  Unlike Psycho, for this controller the
 598  * imap/iclr registers are per-PBM.
 599  */
 600 #define SCHIZO_IMAP_BASE        0x1000UL
 601 #define SCHIZO_ICLR_BASE        0x1400UL
 602
 603 static unsigned long schizo_imap_offset(unsigned long ino)
 604 {
 605         return SCHIZO_IMAP_BASE + (ino * 8UL);
 606 }
 607
 608 static unsigned long schizo_iclr_offset(unsigned long ino)
 609 {
 610         return SCHIZO_ICLR_BASE + (ino * 8UL);
 611 }
 612
 613 static unsigned long schizo_ino_to_iclr(unsigned long pbm_regs,
 614                                         unsigned int ino)
 615 {
 616
 617         return pbm_regs + schizo_iclr_offset(ino);
 618 }
 619
 620 static unsigned long schizo_ino_to_imap(unsigned long pbm_regs,
 621                                         unsigned int ino)
 622 {
 623         return pbm_regs + schizo_imap_offset(ino);
 624 }
 625
 626 #define schizo_read(__reg) \
 627 ({      u64 __ret; \
 628         __asm__ __volatile__("ldxa [%1] %2, %0" \
 629                              : "=r" (__ret) \
 630                              : "r" (__reg), "i" (ASI_PHYS_BYPASS_EC_E) \
 631                              : "memory"); \
 632         __ret; \
 633 })
 634 #define schizo_write(__reg, __val) \
 635         __asm__ __volatile__("stxa %0, [%1] %2" \
 636                              : /* no outputs */ \
 637                              : "r" (__val), "r" (__reg), \
 638                                "i" (ASI_PHYS_BYPASS_EC_E) \
 639                              : "memory")
 640
 641 static void tomatillo_wsync_handler(unsigned int ino, void *_arg1, void *_arg2)
 642 {
 643         unsigned long sync_reg = (unsigned long) _arg2;
 644         u64 mask = 1UL << (ino & IMAP_INO);
 645         u64 val;
 646         int limit;
 647
 648         schizo_write(sync_reg, mask);
 649
 650         limit = 100000;
 651         val = 0;
 652         while (--limit) {
 653                 val = schizo_read(sync_reg);
 654                 if (!(val & mask))
 655                         break;
 656         }
 657         if (limit <= 0) {
 658                 printk("tomatillo_wsync_handler: DMA won't sync [%lx:%lx]\n",
 659                        val, mask);
 660         }
 661
 662         if (_arg1) {
 663                 static unsigned char cacheline[64]
 664                         __attribute__ ((aligned (64)));
 665
 666                 __asm__ __volatile__("rd %%fprs, %0\n\t"
 667                                      "or %0, %4, %1\n\t"
 668                                      "wr %1, 0x0, %%fprs\n\t"
 669                                      "stda %%f0, [%5] %6\n\t"
 670                                      "wr %0, 0x0, %%fprs\n\t"
 671                                      "membar #Sync"
 672                                      : "=&r" (mask), "=&r" (val)
 673                                      : "0" (mask), "1" (val),
 674                                      "i" (FPRS_FEF), "r" (&cacheline[0]),
 675                                      "i" (ASI_BLK_COMMIT_P));
 676         }
 677 }
 678
 679 struct schizo_irq_data {
 680         unsigned long pbm_regs;
 681         unsigned long sync_reg;
 682         u32 portid;
 683         int chip_version;
 684 };
 685
 686 static unsigned int schizo_irq_build(struct device_node *dp,
 687                                      unsigned int ino,
 688                                      void *_data)
 689 {
 690         struct schizo_irq_data *irq_data = _data;
 691         unsigned long pbm_regs = irq_data->pbm_regs;
 692         unsigned long imap, iclr;
 693         int ign_fixup;
 694         int virt_irq;
 695         int is_tomatillo;
 696
 697         ino &= 0x3f;
 698
 699         /* Now build the IRQ bucket. */
 700         imap = schizo_ino_to_imap(pbm_regs, ino);
 701         iclr = schizo_ino_to_iclr(pbm_regs, ino);
 702
 703         /* On Schizo, no inofixup occurs.  This is because each
 704          * INO has it's own IMAP register.  On Psycho and Sabre
 705          * there is only one IMAP register for each PCI slot even
 706          * though four different INOs can be generated by each
 707          * PCI slot.
 708          *
 709          * But, for JBUS variants (essentially, Tomatillo), we have
 710          * to fixup the lowest bit of the interrupt group number.
 711          */
 712         ign_fixup = 0;
 713
 714         is_tomatillo = (irq_data->sync_reg != 0UL);
 715
 716         if (is_tomatillo) {
 717                 if (irq_data->portid & 1)
 718                         ign_fixup = (1 << 6);
 719         }
 720
 721         virt_irq = build_irq(ign_fixup, iclr, imap);
 722
 723         if (is_tomatillo) {
 724                 irq_install_pre_handler(virt_irq,
 725                                         tomatillo_wsync_handler,
 726                                         ((irq_data->chip_version <= 4) ?
 727                                          (void *) 1 : (void *) 0),
 728                                         (void *) irq_data->sync_reg);
 729         }
 730
 731         return virt_irq;
 732 }
 733
 734 static void __init __schizo_irq_trans_init(struct device_node *dp,
 735                                            int is_tomatillo)
 736 {
 737         const struct linux_prom64_registers *regs;
 738         struct schizo_irq_data *irq_data;
 739
 740         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
 741         dp->irq_trans->irq_build = schizo_irq_build;
 742
 743         irq_data = prom_early_alloc(sizeof(struct schizo_irq_data));
 744
 745         regs = of_get_property(dp, "reg", NULL);
 746         dp->irq_trans->data = irq_data;
 747
 748         irq_data->pbm_regs = regs[0].phys_addr;
 749         if (is_tomatillo)
 750                 irq_data->sync_reg = regs[3].phys_addr + 0x1a18UL;
 751         else
 752                 irq_data->sync_reg = 0UL;
 753         irq_data->portid = of_getintprop_default(dp, "portid", 0);
 754         irq_data->chip_version = of_getintprop_default(dp, "version#", 0);
 755 }
 756
 757 static void __init schizo_irq_trans_init(struct device_node *dp)
 758 {
 759         __schizo_irq_trans_init(dp, 0);
 760 }
 761
 762 static void __init tomatillo_irq_trans_init(struct device_node *dp)
 763 {
 764         __schizo_irq_trans_init(dp, 1);
 765 }
 766
 767 static unsigned int pci_sun4v_irq_build(struct device_node *dp,
 768                                         unsigned int devino,
 769                                         void *_data)
 770 {
 771         u32 devhandle = (u32) (unsigned long) _data;
 772
 773         return sun4v_build_irq(devhandle, devino);
 774 }
 775
 776 static void __init pci_sun4v_irq_trans_init(struct device_node *dp)
 777 {
 778         const struct linux_prom64_registers *regs;
 779
 780         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
 781         dp->irq_trans->irq_build = pci_sun4v_irq_build;
 782
 783         regs = of_get_property(dp, "reg", NULL);
 784         dp->irq_trans->data = (void *) (unsigned long)
 785                 ((regs->phys_addr >> 32UL) & 0x0fffffff);
 786 }
 787
 788 struct fire_irq_data {
 789         unsigned long pbm_regs;
 790         u32 portid;
 791 };
 792
 793 #define FIRE_IMAP_BASE  0x001000
 794 #define FIRE_ICLR_BASE  0x001400
 795
 796 static unsigned long fire_imap_offset(unsigned long ino)
 797 {
 798         return FIRE_IMAP_BASE + (ino * 8UL);
 799 }
 800
 801 static unsigned long fire_iclr_offset(unsigned long ino)
 802 {
 803         return FIRE_ICLR_BASE + (ino * 8UL);
 804 }
 805
 806 static unsigned long fire_ino_to_iclr(unsigned long pbm_regs,
 807                                             unsigned int ino)
 808 {
 809         return pbm_regs + fire_iclr_offset(ino);
 810 }
 811
 812 static unsigned long fire_ino_to_imap(unsigned long pbm_regs,
 813                                             unsigned int ino)
 814 {
 815         return pbm_regs + fire_imap_offset(ino);
 816 }
 817
 818 static unsigned int fire_irq_build(struct device_node *dp,
 819                                          unsigned int ino,
 820                                          void *_data)
 821 {
 822         struct fire_irq_data *irq_data = _data;
 823         unsigned long pbm_regs = irq_data->pbm_regs;
 824         unsigned long imap, iclr;
 825         unsigned long int_ctrlr;
 826
 827         ino &= 0x3f;
 828
 829         /* Now build the IRQ bucket. */
 830         imap = fire_ino_to_imap(pbm_regs, ino);
 831         iclr = fire_ino_to_iclr(pbm_regs, ino);
 832
 833         /* Set the interrupt controller number.  */
 834         int_ctrlr = 1 << 6;
 835         upa_writeq(int_ctrlr, imap);
 836
 837         /* The interrupt map registers do not have an INO field
 838          * like other chips do.  They return zero in the INO
 839          * field, and the interrupt controller number is controlled
 840          * in bits 6 to 9.  So in order for build_irq() to get
 841          * the INO right we pass it in as part of the fixup
 842          * which will get added to the map register zero value
 843          * read by build_irq().
 844          */
 845         ino |= (irq_data->portid << 6);
 846         ino -= int_ctrlr;
 847         return build_irq(ino, iclr, imap);
 848 }
 849
 850 static void __init fire_irq_trans_init(struct device_node *dp)
 851 {
 852         const struct linux_prom64_registers *regs;
 853         struct fire_irq_data *irq_data;
 854
 855         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
 856         dp->irq_trans->irq_build = fire_irq_build;
 857
 858         irq_data = prom_early_alloc(sizeof(struct fire_irq_data));
 859
 860         regs = of_get_property(dp, "reg", NULL);
 861         dp->irq_trans->data = irq_data;
 862
 863         irq_data->pbm_regs = regs[0].phys_addr;
 864         irq_data->portid = of_getintprop_default(dp, "portid", 0);
 865 }
 866 #endif /* CONFIG_PCI */
 867
 868 #ifdef CONFIG_SBUS
 869 /* INO number to IMAP register offset for SYSIO external IRQ's.
 870  * This should conform to both Sunfire/Wildfire server and Fusion
 871  * desktop designs.
 872  */
 873 #define SYSIO_IMAP_SLOT0        0x2c00UL
 874 #define SYSIO_IMAP_SLOT1        0x2c08UL
 875 #define SYSIO_IMAP_SLOT2        0x2c10UL
 876 #define SYSIO_IMAP_SLOT3        0x2c18UL
 877 #define SYSIO_IMAP_SCSI         0x3000UL
 878 #define SYSIO_IMAP_ETH          0x3008UL
 879 #define SYSIO_IMAP_BPP          0x3010UL
 880 #define SYSIO_IMAP_AUDIO        0x3018UL
 881 #define SYSIO_IMAP_PFAIL        0x3020UL
 882 #define SYSIO_IMAP_KMS          0x3028UL
 883 #define SYSIO_IMAP_FLPY         0x3030UL
 884 #define SYSIO_IMAP_SHW          0x3038UL
 885 #define SYSIO_IMAP_KBD          0x3040UL
 886 #define SYSIO_IMAP_MS           0x3048UL
 887 #define SYSIO_IMAP_SER          0x3050UL
 888 #define SYSIO_IMAP_TIM0         0x3060UL
 889 #define SYSIO_IMAP_TIM1         0x3068UL
 890 #define SYSIO_IMAP_UE           0x3070UL
 891 #define SYSIO_IMAP_CE           0x3078UL
 892 #define SYSIO_IMAP_SBERR        0x3080UL
 893 #define SYSIO_IMAP_PMGMT        0x3088UL
 894 #define SYSIO_IMAP_GFX          0x3090UL
 895 #define SYSIO_IMAP_EUPA         0x3098UL
 896
 897 #define bogon     ((unsigned long) -1)
 898 static unsigned long sysio_irq_offsets[] = {
 899         /* SBUS Slot 0 --> 3, level 1 --> 7 */
 900         SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0,
 901         SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0,
 902         SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1,
 903         SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1,
 904         SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2,
 905         SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2,
 906         SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3,
 907         SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3,
 908
 909         /* Onboard devices (not relevant/used on SunFire). */
 910         SYSIO_IMAP_SCSI,
 911         SYSIO_IMAP_ETH,
 912         SYSIO_IMAP_BPP,
 913         bogon,
 914         SYSIO_IMAP_AUDIO,
 915         SYSIO_IMAP_PFAIL,
 916         bogon,
 917         bogon,
 918         SYSIO_IMAP_KMS,
 919         SYSIO_IMAP_FLPY,
 920         SYSIO_IMAP_SHW,
 921         SYSIO_IMAP_KBD,
 922         SYSIO_IMAP_MS,
 923         SYSIO_IMAP_SER,
 924         bogon,
 925         bogon,
 926         SYSIO_IMAP_TIM0,
 927         SYSIO_IMAP_TIM1,
 928         bogon,
 929         bogon,
 930         SYSIO_IMAP_UE,
 931         SYSIO_IMAP_CE,
 932         SYSIO_IMAP_SBERR,
 933         SYSIO_IMAP_PMGMT,
 934         SYSIO_IMAP_GFX,
 935         SYSIO_IMAP_EUPA,
 936 };
 937
 938 #undef bogon
 939
 940 #define NUM_SYSIO_OFFSETS ARRAY_SIZE(sysio_irq_offsets)
 941
 942 /* Convert Interrupt Mapping register pointer to associated
 943  * Interrupt Clear register pointer, SYSIO specific version.
 944  */
 945 #define SYSIO_ICLR_UNUSED0      0x3400UL
 946 #define SYSIO_ICLR_SLOT0        0x3408UL
 947 #define SYSIO_ICLR_SLOT1        0x3448UL
 948 #define SYSIO_ICLR_SLOT2        0x3488UL
 949 #define SYSIO_ICLR_SLOT3        0x34c8UL
 950 static unsigned long sysio_imap_to_iclr(unsigned long imap)
 951 {
 952         unsigned long diff = SYSIO_ICLR_UNUSED0 - SYSIO_IMAP_SLOT0;
 953         return imap + diff;
 954 }
 955
 956 static unsigned int sbus_of_build_irq(struct device_node *dp,
 957                                       unsigned int ino,
 958                                       void *_data)
 959 {
 960         unsigned long reg_base = (unsigned long) _data;
 961         const struct linux_prom_registers *regs;
 962         unsigned long imap, iclr;
 963         int sbus_slot = 0;
 964         int sbus_level = 0;
 965
 966         ino &= 0x3f;
 967
 968         regs = of_get_property(dp, "reg", NULL);
 969         if (regs)
 970                 sbus_slot = regs->which_io;
 971
 972         if (ino < 0x20)
 973                 ino += (sbus_slot * 8);
 974
 975         imap = sysio_irq_offsets[ino];
 976         if (imap == ((unsigned long)-1)) {
 977                 prom_printf("get_irq_translations: Bad SYSIO INO[%x]\n",
 978                             ino);
 979                 prom_halt();
 980         }
 981         imap += reg_base;
 982
 983         /* SYSIO inconsistency.  For external SLOTS, we have to select
 984          * the right ICLR register based upon the lower SBUS irq level
 985          * bits.
 986          */
 987         if (ino >= 0x20) {
 988                 iclr = sysio_imap_to_iclr(imap);
 989         } else {
 990                 sbus_level = ino & 0x7;
 991
 992                 switch(sbus_slot) {
 993                 case 0:
 994                         iclr = reg_base + SYSIO_ICLR_SLOT0;
 995                         break;
 996                 case 1:
 997                         iclr = reg_base + SYSIO_ICLR_SLOT1;
 998                         break;
 999                 case 2:
1000                         iclr = reg_base + SYSIO_ICLR_SLOT2;
1001                         break;
1002                 default:
1003                 case 3:
1004                         iclr = reg_base + SYSIO_ICLR_SLOT3;
1005                         break;
1006                 };
1007
1008                 iclr += ((unsigned long)sbus_level - 1UL) * 8UL;
1009         }
1010         return build_irq(sbus_level, iclr, imap);
1011 }
1012
1013 static void __init sbus_irq_trans_init(struct device_node *dp)
1014 {
1015         const struct linux_prom64_registers *regs;
1016
1017         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
1018         dp->irq_trans->irq_build = sbus_of_build_irq;
1019
1020         regs = of_get_property(dp, "reg", NULL);
1021         dp->irq_trans->data = (void *) (unsigned long) regs->phys_addr;
1022 }
1023 #endif /* CONFIG_SBUS */
1024
1025
1026 static unsigned int central_build_irq(struct device_node *dp,
1027                                       unsigned int ino,
1028                                       void *_data)
1029 {
1030         struct device_node *central_dp = _data;
1031         struct of_device *central_op = of_find_device_by_node(central_dp);
1032         struct resource *res;
1033         unsigned long imap, iclr;
1034         u32 tmp;
1035
1036         if (!strcmp(dp->name, "eeprom")) {
1037                 res = &central_op->resource[5];
1038         } else if (!strcmp(dp->name, "zs")) {
1039                 res = &central_op->resource[4];
1040         } else if (!strcmp(dp->name, "clock-board")) {
1041                 res = &central_op->resource[3];
1042         } else {
1043                 return ino;
1044         }
1045
1046         imap = res->start + 0x00UL;
1047         iclr = res->start + 0x10UL;
1048
1049         /* Set the INO state to idle, and disable.  */
1050         upa_writel(0, iclr);
1051         upa_readl(iclr);
1052
1053         tmp = upa_readl(imap);
1054         tmp &= ~0x80000000;
1055         upa_writel(tmp, imap);
1056
1057         return build_irq(0, iclr, imap);
1058 }
1059
1060 static void __init central_irq_trans_init(struct device_node *dp)
1061 {
1062         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
1063         dp->irq_trans->irq_build = central_build_irq;
1064
1065         dp->irq_trans->data = dp;
1066 }
1067
1068 struct irq_trans {
1069         const char *name;
1070         void (*init)(struct device_node *);
1071 };
1072
1073 #ifdef CONFIG_PCI
1074 static struct irq_trans __initdata pci_irq_trans_table[] = {
1075         { "SUNW,sabre", sabre_irq_trans_init },
1076         { "pci108e,a000", sabre_irq_trans_init },
1077         { "pci108e,a001", sabre_irq_trans_init },
1078         { "SUNW,psycho", psycho_irq_trans_init },
1079         { "pci108e,8000", psycho_irq_trans_init },
1080         { "SUNW,schizo", schizo_irq_trans_init },
1081         { "pci108e,8001", schizo_irq_trans_init },
1082         { "SUNW,schizo+", schizo_irq_trans_init },
1083         { "pci108e,8002", schizo_irq_trans_init },
1084         { "SUNW,tomatillo", tomatillo_irq_trans_init },
1085         { "pci108e,a801", tomatillo_irq_trans_init },
1086         { "SUNW,sun4v-pci", pci_sun4v_irq_trans_init },
1087         { "pciex108e,80f0", fire_irq_trans_init },
1088 };
1089 #endif
1090
1091 static unsigned int sun4v_vdev_irq_build(struct device_node *dp,
1092                                          unsigned int devino,
1093                                          void *_data)
1094 {
1095         u32 devhandle = (u32) (unsigned long) _data;
1096
1097         return sun4v_build_irq(devhandle, devino);
1098 }
1099
1100 static void __init sun4v_vdev_irq_trans_init(struct device_node *dp)
1101 {
1102         const struct linux_prom64_registers *regs;
1103
1104         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
1105         dp->irq_trans->irq_build = sun4v_vdev_irq_build;
1106
1107         regs = of_get_property(dp, "reg", NULL);
1108         dp->irq_trans->data = (void *) (unsigned long)
1109                 ((regs->phys_addr >> 32UL) & 0x0fffffff);
1110 }
1111
1112 static void __init irq_trans_init(struct device_node *dp)
1113 {
1114 #ifdef CONFIG_PCI
1115         const char *model;
1116         int i;
1117 #endif
1118
1119 #ifdef CONFIG_PCI
1120         model = of_get_property(dp, "model", NULL);
1121         if (!model)
1122                 model = of_get_property(dp, "compatible", NULL);
1123         if (model) {
1124                 for (i = 0; i < ARRAY_SIZE(pci_irq_trans_table); i++) {
1125                         struct irq_trans *t = &pci_irq_trans_table[i];
1126
1127                         if (!strcmp(model, t->name))
1128                                 return t->init(dp);
1129                 }
1130         }
1131 #endif
1132 #ifdef CONFIG_SBUS
1133         if (!strcmp(dp->name, "sbus") ||
1134             !strcmp(dp->name, "sbi"))
1135                 return sbus_irq_trans_init(dp);
1136 #endif
1137         if (!strcmp(dp->name, "fhc") &&
1138             !strcmp(dp->parent->name, "central"))
1139                 return central_irq_trans_init(dp);
1140         if (!strcmp(dp->name, "virtual-devices"))
1141                 return sun4v_vdev_irq_trans_init(dp);
1142 }
1143
1144 static int is_root_node(const struct device_node *dp)
1145 {
1146         if (!dp)
1147                 return 0;
1148
1149         return (dp->parent == NULL);
1150 }
1151
1152 /* The following routines deal with the black magic of fully naming a
1153  * node.
1154  *
1155  * Certain well known named nodes are just the simple name string.
1156  *
1157  * Actual devices have an address specifier appended to the base name
1158  * string, like this "foo@addr".  The "addr" can be in any number of
1159  * formats, and the platform plus the type of the node determine the
1160  * format and how it is constructed.
1161  *
1162  * For children of the ROOT node, the naming convention is fixed and
1163  * determined by whether this is a sun4u or sun4v system.
1164  *
1165  * For children of other nodes, it is bus type specific.  So
1166  * we walk up the tree until we discover a "device_type" property
1167  * we recognize and we go from there.
1168  *
1169  * As an example, the boot device on my workstation has a full path:
1170  *
1171  *      /pci@1e,600000/ide@d/disk@0,0:c
1172  */
1173 static void __init sun4v_path_component(struct device_node *dp, char *tmp_buf)
1174 {
1175         struct linux_prom64_registers *regs;
1176         struct property *rprop;
1177         u32 high_bits, low_bits, type;
1178
1179         rprop = of_find_property(dp, "reg", NULL);
1180         if (!rprop)
1181                 return;
1182
1183         regs = rprop->value;
1184         if (!is_root_node(dp->parent)) {
1185                 sprintf(tmp_buf, "%s@%x,%x",
1186                         dp->name,
1187                         (unsigned int) (regs->phys_addr >> 32UL),
1188                         (unsigned int) (regs->phys_addr & 0xffffffffUL));
1189                 return;
1190         }
1191
1192         type = regs->phys_addr >> 60UL;
1193         high_bits = (regs->phys_addr >> 32UL) & 0x0fffffffUL;
1194         low_bits = (regs->phys_addr & 0xffffffffUL);
1195
1196         if (type == 0 || type == 8) {
1197                 const char *prefix = (type == 0) ? "m" : "i";
1198
1199                 if (low_bits)
1200                         sprintf(tmp_buf, "%s@%s%x,%x",
1201                                 dp->name, prefix,
1202                                 high_bits, low_bits);
1203                 else
1204                         sprintf(tmp_buf, "%s@%s%x",
1205                                 dp->name,
1206                                 prefix,
1207                                 high_bits);
1208         } else if (type == 12) {
1209                 sprintf(tmp_buf, "%s@%x",
1210                         dp->name, high_bits);
1211         }
1212 }
1213
1214 static void __init sun4u_path_component(struct device_node *dp, char *tmp_buf)
1215 {
1216         struct linux_prom64_registers *regs;
1217         struct property *prop;
1218
1219         prop = of_find_property(dp, "reg", NULL);
1220         if (!prop)
1221                 return;
1222
1223         regs = prop->value;
1224         if (!is_root_node(dp->parent)) {
1225                 sprintf(tmp_buf, "%s@%x,%x",
1226                         dp->name,
1227                         (unsigned int) (regs->phys_addr >> 32UL),
1228                         (unsigned int) (regs->phys_addr & 0xffffffffUL));
1229                 return;
1230         }
1231
1232         prop = of_find_property(dp, "upa-portid", NULL);
1233         if (!prop)
1234                 prop = of_find_property(dp, "portid", NULL);
1235         if (prop) {
1236                 unsigned long mask = 0xffffffffUL;
1237
1238                 if (tlb_type >= cheetah)
1239                         mask = 0x7fffff;
1240
1241                 sprintf(tmp_buf, "%s@%x,%x",
1242                         dp->name,
1243                         *(u32 *)prop->value,
1244                         (unsigned int) (regs->phys_addr & mask));
1245         }
1246 }
1247
1248 /* "name@slot,offset"  */
1249 static void __init sbus_path_component(struct device_node *dp, char *tmp_buf)
1250 {
1251         struct linux_prom_registers *regs;
1252         struct property *prop;
1253
1254         prop = of_find_property(dp, "reg", NULL);
1255         if (!prop)
1256                 return;
1257
1258         regs = prop->value;
1259         sprintf(tmp_buf, "%s@%x,%x",
1260                 dp->name,
1261                 regs->which_io,
1262                 regs->phys_addr);
1263 }
1264
1265 /* "name@devnum[,func]" */
1266 static void __init pci_path_component(struct device_node *dp, char *tmp_buf)
1267 {
1268         struct linux_prom_pci_registers *regs;
1269         struct property *prop;
1270         unsigned int devfn;
1271
1272         prop = of_find_property(dp, "reg", NULL);
1273         if (!prop)
1274                 return;
1275
1276         regs = prop->value;
1277         devfn = (regs->phys_hi >> 8) & 0xff;
1278         if (devfn & 0x07) {
1279                 sprintf(tmp_buf, "%s@%x,%x",
1280                         dp->name,
1281                         devfn >> 3,
1282                         devfn & 0x07);
1283         } else {
1284                 sprintf(tmp_buf, "%s@%x",
1285                         dp->name,
1286                         devfn >> 3);
1287         }
1288 }
1289
1290 /* "name@UPA_PORTID,offset" */
1291 static void __init upa_path_component(struct device_node *dp, char *tmp_buf)
1292 {
1293         struct linux_prom64_registers *regs;
1294         struct property *prop;
1295
1296         prop = of_find_property(dp, "reg", NULL);
1297         if (!prop)
1298                 return;
1299
1300         regs = prop->value;
1301
1302         prop = of_find_property(dp, "upa-portid", NULL);
1303         if (!prop)
1304                 return;
1305
1306         sprintf(tmp_buf, "%s@%x,%x",
1307                 dp->name,
1308                 *(u32 *) prop->value,
1309                 (unsigned int) (regs->phys_addr & 0xffffffffUL));
1310 }
1311
1312 /* "name@reg" */
1313 static void __init vdev_path_component(struct device_node *dp, char *tmp_buf)
1314 {
1315         struct property *prop;
1316         u32 *regs;
1317
1318         prop = of_find_property(dp, "reg", NULL);
1319         if (!prop)
1320                 return;
1321
1322         regs = prop->value;
1323
1324         sprintf(tmp_buf, "%s@%x", dp->name, *regs);
1325 }
1326
1327 /* "name@addrhi,addrlo" */
1328 static void __init ebus_path_component(struct device_node *dp, char *tmp_buf)
1329 {
1330         struct linux_prom64_registers *regs;
1331         struct property *prop;
1332
1333         prop = of_find_property(dp, "reg", NULL);
1334         if (!prop)
1335                 return;
1336
1337         regs = prop->value;
1338
1339         sprintf(tmp_buf, "%s@%x,%x",
1340                 dp->name,
1341                 (unsigned int) (regs->phys_addr >> 32UL),
1342                 (unsigned int) (regs->phys_addr & 0xffffffffUL));
1343 }
1344
1345 /* "name@bus,addr" */
1346 static void __init i2c_path_component(struct device_node *dp, char *tmp_buf)
1347 {
1348         struct property *prop;
1349         u32 *regs;
1350
1351         prop = of_find_property(dp, "reg", NULL);
1352         if (!prop)
1353                 return;
1354
1355         regs = prop->value;
1356
1357         /* This actually isn't right... should look at the #address-cells
1358          * property of the i2c bus node etc. etc.
1359          */
1360         sprintf(tmp_buf, "%s@%x,%x",
1361                 dp->name, regs[0], regs[1]);
1362 }
1363
1364 /* "name@reg0[,reg1]" */
1365 static void __init usb_path_component(struct device_node *dp, char *tmp_buf)
1366 {
1367         struct property *prop;
1368         u32 *regs;
1369
1370         prop = of_find_property(dp, "reg", NULL);
1371         if (!prop)
1372                 return;
1373
1374         regs = prop->value;
1375
1376         if (prop->length == sizeof(u32) || regs[1] == 1) {
1377                 sprintf(tmp_buf, "%s@%x",
1378                         dp->name, regs[0]);
1379         } else {
1380                 sprintf(tmp_buf, "%s@%x,%x",
1381                         dp->name, regs[0], regs[1]);
1382         }
1383 }
1384
1385 /* "name@reg0reg1[,reg2reg3]" */
1386 static void __init ieee1394_path_component(struct device_node *dp, char *tmp_buf)
1387 {
1388         struct property *prop;
1389         u32 *regs;
1390
1391         prop = of_find_property(dp, "reg", NULL);
1392         if (!prop)
1393                 return;
1394
1395         regs = prop->value;
1396
1397         if (regs[2] || regs[3]) {
1398                 sprintf(tmp_buf, "%s@%08x%08x,%04x%08x",
1399                         dp->name, regs[0], regs[1], regs[2], regs[3]);
1400         } else {
1401                 sprintf(tmp_buf, "%s@%08x%08x",
1402                         dp->name, regs[0], regs[1]);
1403         }
1404 }
1405
1406 static void __init __build_path_component(struct device_node *dp, char *tmp_buf)
1407 {
1408         struct device_node *parent = dp->parent;
1409
1410         if (parent != NULL) {
1411                 if (!strcmp(parent->type, "pci") ||
1412                     !strcmp(parent->type, "pciex"))
1413                         return pci_path_component(dp, tmp_buf);
1414                 if (!strcmp(parent->type, "sbus"))
1415                         return sbus_path_component(dp, tmp_buf);
1416                 if (!strcmp(parent->type, "upa"))
1417                         return upa_path_component(dp, tmp_buf);
1418                 if (!strcmp(parent->type, "ebus"))
1419                         return ebus_path_component(dp, tmp_buf);
1420                 if (!strcmp(parent->name, "usb") ||
1421                     !strcmp(parent->name, "hub"))
1422                         return usb_path_component(dp, tmp_buf);
1423                 if (!strcmp(parent->type, "i2c"))
1424                         return i2c_path_component(dp, tmp_buf);
1425                 if (!strcmp(parent->type, "firewire"))
1426                         return ieee1394_path_component(dp, tmp_buf);
1427                 if (!strcmp(parent->type, "virtual-devices"))
1428                         return vdev_path_component(dp, tmp_buf);
1429
1430                 /* "isa" is handled with platform naming */
1431         }
1432
1433         /* Use platform naming convention.  */
1434         if (tlb_type == hypervisor)
1435                 return sun4v_path_component(dp, tmp_buf);
1436         else
1437                 return sun4u_path_component(dp, tmp_buf);
1438 }
1439
1440 static char * __init build_path_component(struct device_node *dp)
1441 {
1442         char tmp_buf[64], *n;
1443
1444         tmp_buf[0] = '\0';
1445         __build_path_component(dp, tmp_buf);
1446         if (tmp_buf[0] == '\0')
1447                 strcpy(tmp_buf, dp->name);
1448
1449         n = prom_early_alloc(strlen(tmp_buf) + 1);
1450         strcpy(n, tmp_buf);
1451
1452         return n;
1453 }
1454
1455 static char * __init build_full_name(struct device_node *dp)
1456 {
1457         int len, ourlen, plen;
1458         char *n;
1459
1460         plen = strlen(dp->parent->full_name);
1461         ourlen = strlen(dp->path_component_name);
1462         len = ourlen + plen + 2;
1463
1464         n = prom_early_alloc(len);
1465         strcpy(n, dp->parent->full_name);
1466         if (!is_root_node(dp->parent)) {
1467                 strcpy(n + plen, "/");
1468                 plen++;
1469         }
1470         strcpy(n + plen, dp->path_component_name);
1471
1472         return n;
1473 }
1474
1475 static unsigned int unique_id;
1476
1477 static struct property * __init build_one_prop(phandle node, char *prev, char *special_name, void *special_val, int special_len)
1478 {
1479         static struct property *tmp = NULL;
1480         struct property *p;
1481
1482         if (tmp) {
1483                 p = tmp;
1484                 memset(p, 0, sizeof(*p) + 32);
1485                 tmp = NULL;
1486         } else {
1487                 p = prom_early_alloc(sizeof(struct property) + 32);
1488                 p->unique_id = unique_id++;
1489         }
1490
1491         p->name = (char *) (p + 1);
1492         if (special_name) {
1493                 strcpy(p->name, special_name);
1494                 p->length = special_len;
1495                 p->value = prom_early_alloc(special_len);
1496                 memcpy(p->value, special_val, special_len);
1497         } else {
1498                 if (prev == NULL) {
1499                         prom_firstprop(node, p->name);
1500                 } else {
1501                         prom_nextprop(node, prev, p->name);
1502                 }
1503                 if (strlen(p->name) == 0) {
1504                         tmp = p;
1505                         return NULL;
1506                 }
1507                 p->length = prom_getproplen(node, p->name);
1508                 if (p->length <= 0) {
1509                         p->length = 0;
1510                 } else {
1511                         p->value = prom_early_alloc(p->length + 1);
1512                         prom_getproperty(node, p->name, p->value, p->length);
1513                         ((unsigned char *)p->value)[p->length] = '\0';
1514                 }
1515         }
1516         return p;
1517 }
1518
1519 static struct property * __init build_prop_list(phandle node)
1520 {
1521         struct property *head, *tail;
1522
1523         head = tail = build_one_prop(node, NULL,
1524                                      ".node", &node, sizeof(node));
1525
1526         tail->next = build_one_prop(node, NULL, NULL, NULL, 0);
1527         tail = tail->next;
1528         while(tail) {
1529                 tail->next = build_one_prop(node, tail->name,
1530                                             NULL, NULL, 0);
1531                 tail = tail->next;
1532         }
1533
1534         return head;
1535 }
1536
1537 static char * __init get_one_property(phandle node, const char *name)
1538 {
1539         char *buf = "<NULL>";
1540         int len;
1541
1542         len = prom_getproplen(node, name);
1543         if (len > 0) {
1544                 buf = prom_early_alloc(len);
1545                 prom_getproperty(node, name, buf, len);
1546         }
1547
1548         return buf;
1549 }
1550
1551 static struct device_node * __init create_node(phandle node, struct device_node *parent)
1552 {
1553         struct device_node *dp;
1554
1555         if (!node)
1556                 return NULL;
1557
1558         dp = prom_early_alloc(sizeof(*dp));
1559         dp->unique_id = unique_id++;
1560         dp->parent = parent;
1561
1562         kref_init(&dp->kref);
1563
1564         dp->name = get_one_property(node, "name");
1565         dp->type = get_one_property(node, "device_type");
1566         dp->node = node;
1567
1568         dp->properties = build_prop_list(node);
1569
1570         irq_trans_init(dp);
1571
1572         return dp;
1573 }
1574
1575 static struct device_node * __init build_tree(struct device_node *parent, phandle node, struct device_node ***nextp)
1576 {
1577         struct device_node *ret = NULL, *prev_sibling = NULL;
1578         struct device_node *dp;
1579
1580         while (1) {
1581                 dp = create_node(node, parent);
1582                 if (!dp)
1583                         break;
1584
1585                 if (prev_sibling)
1586                         prev_sibling->sibling = dp;
1587
1588                 if (!ret)
1589                         ret = dp;
1590                 prev_sibling = dp;
1591
1592                 *(*nextp) = dp;
1593                 *nextp = &dp->allnext;
1594
1595                 dp->path_component_name = build_path_component(dp);
1596                 dp->full_name = build_full_name(dp);
1597
1598                 dp->child = build_tree(dp, prom_getchild(node), nextp);
1599
1600                 node = prom_getsibling(node);
1601         }
1602
1603         return ret;
1604 }
1605
1606 static const char *get_mid_prop(void)
1607 {
1608         return (tlb_type == spitfire ? "upa-portid" : "portid");
1609 }
1610
1611 struct device_node *of_find_node_by_cpuid(int cpuid)
1612 {
1613         struct device_node *dp;
1614         const char *mid_prop = get_mid_prop();
1615
1616         for_each_node_by_type(dp, "cpu") {
1617                 int id = of_getintprop_default(dp, mid_prop, -1);
1618                 const char *this_mid_prop = mid_prop;
1619
1620                 if (id < 0) {
1621                         this_mid_prop = "cpuid";
1622                         id = of_getintprop_default(dp, this_mid_prop, -1);
1623                 }
1624
1625                 if (id < 0) {
1626                         prom_printf("OF: Serious problem, cpu lacks "
1627                                     "%s property", this_mid_prop);
1628                         prom_halt();
1629                 }
1630                 if (cpuid == id)
1631                         return dp;
1632         }
1633         return NULL;
1634 }
1635
1636 static void __init of_fill_in_cpu_data(void)
1637 {
1638         struct device_node *dp;
1639         const char *mid_prop = get_mid_prop();
1640
1641         ncpus_probed = 0;
1642         for_each_node_by_type(dp, "cpu") {
1643                 int cpuid = of_getintprop_default(dp, mid_prop, -1);
1644                 const char *this_mid_prop = mid_prop;
1645                 struct device_node *portid_parent;
1646                 int portid = -1;
1647
1648                 portid_parent = NULL;
1649                 if (cpuid < 0) {
1650                         this_mid_prop = "cpuid";
1651                         cpuid = of_getintprop_default(dp, this_mid_prop, -1);
1652                         if (cpuid >= 0) {
1653                                 int limit = 2;
1654
1655                                 portid_parent = dp;
1656                                 while (limit--) {
1657                                         portid_parent = portid_parent->parent;
1658                                         if (!portid_parent)
1659                                                 break;
1660                                         portid = of_getintprop_default(portid_parent,
1661                                                                        "portid", -1);
1662                                         if (portid >= 0)
1663                                                 break;
1664                                 }
1665                         }
1666                 }
1667
1668                 if (cpuid < 0) {
1669                         prom_printf("OF: Serious problem, cpu lacks "
1670                                     "%s property", this_mid_prop);
1671                         prom_halt();
1672                 }
1673
1674                 ncpus_probed++;
1675
1676 #ifdef CONFIG_SMP
1677                 if (cpuid >= NR_CPUS)
1678                         continue;
1679 #else
1680                 /* On uniprocessor we only want the values for the
1681                  * real physical cpu the kernel booted onto, however
1682                  * cpu_data() only has one entry at index 0.
1683                  */
1684                 if (cpuid != real_hard_smp_processor_id())
1685                         continue;
1686                 cpuid = 0;
1687 #endif
1688
1689                 cpu_data(cpuid).clock_tick =
1690                         of_getintprop_default(dp, "clock-frequency", 0);
1691
1692                 if (portid_parent) {
1693                         cpu_data(cpuid).dcache_size =
1694                                 of_getintprop_default(dp, "l1-dcache-size",
1695                                                       16 * 1024);
1696                         cpu_data(cpuid).dcache_line_size =
1697                                 of_getintprop_default(dp, "l1-dcache-line-size",
1698                                                       32);
1699                         cpu_data(cpuid).icache_size =
1700                                 of_getintprop_default(dp, "l1-icache-size",
1701                                                       8 * 1024);
1702                         cpu_data(cpuid).icache_line_size =
1703                                 of_getintprop_default(dp, "l1-icache-line-size",
1704                                                       32);
1705                         cpu_data(cpuid).ecache_size =
1706                                 of_getintprop_default(dp, "l2-cache-size", 0);
1707                         cpu_data(cpuid).ecache_line_size =
1708                                 of_getintprop_default(dp, "l2-cache-line-size", 0);
1709                         if (!cpu_data(cpuid).ecache_size ||
1710                             !cpu_data(cpuid).ecache_line_size) {
1711                                 cpu_data(cpuid).ecache_size =
1712                                         of_getintprop_default(portid_parent,
1713                                                               "l2-cache-size",
1714                                                               (4 * 1024 * 1024));
1715                                 cpu_data(cpuid).ecache_line_size =
1716                                         of_getintprop_default(portid_parent,
1717                                                               "l2-cache-line-size", 64);
1718                         }
1719
1720                         cpu_data(cpuid).core_id = portid + 1;
1721                         cpu_data(cpuid).proc_id = portid;
1722 #ifdef CONFIG_SMP
1723                         sparc64_multi_core = 1;
1724 #endif
1725                 } else {
1726                         cpu_data(cpuid).dcache_size =
1727                                 of_getintprop_default(dp, "dcache-size", 16 * 1024);
1728                         cpu_data(cpuid).dcache_line_size =
1729                                 of_getintprop_default(dp, "dcache-line-size", 32);
1730
1731                         cpu_data(cpuid).icache_size =
1732                                 of_getintprop_default(dp, "icache-size", 16 * 1024);
1733                         cpu_data(cpuid).icache_line_size =
1734                                 of_getintprop_default(dp, "icache-line-size", 32);
1735
1736                         cpu_data(cpuid).ecache_size =
1737                                 of_getintprop_default(dp, "ecache-size",
1738                                                       (4 * 1024 * 1024));
1739                         cpu_data(cpuid).ecache_line_size =
1740                                 of_getintprop_default(dp, "ecache-line-size", 64);
1741
1742                         cpu_data(cpuid).core_id = 0;
1743                         cpu_data(cpuid).proc_id = -1;
1744                 }
1745
1746 #ifdef CONFIG_SMP
1747                 cpu_set(cpuid, cpu_present_map);
1748                 cpu_set(cpuid, cpu_possible_map);
1749 #endif
1750         }
1751
1752         smp_fill_in_sib_core_maps();
1753 }
1754
1755 void __init prom_build_devicetree(void)
1756 {
1757         struct device_node **nextp;
1758
1759         allnodes = create_node(prom_root_node, NULL);
1760         allnodes->path_component_name = "";
1761         allnodes->full_name = "/";
1762
1763         nextp = &allnodes->allnext;
1764         allnodes->child = build_tree(allnodes,
1765                                      prom_getchild(allnodes->node),
1766                                      &nextp);
1767         printk("PROM: Built device tree with %u bytes of memory.\n",
1768                prom_early_allocated);
1769
1770         if (tlb_type != hypervisor)
1771                 of_fill_in_cpu_data();
1772 }