arch/sparc64/kernel/prom.c

   1 /*
   2  * Procedures for creating, accessing and interpreting the device tree.
   3  *
   4  * Paul Mackerras       August 1996.
   5  * Copyright (C) 1996-2005 Paul Mackerras.
   6  *
   7  *  Adapted for 64bit PowerPC by Dave Engebretsen and Peter Bergner.
   8  *    {engebret|bergner}@us.ibm.com
   9  *
  10  *  Adapted for sparc64 by David S. Miller davem@davemloft.net
  11  *
  12  *      This program is free software; you can redistribute it and/or
  13  *      modify it under the terms of the GNU General Public License
  14  *      as published by the Free Software Foundation; either version
  15  *      2 of the License, or (at your option) any later version.
  16  */
  17
  18 #include <linux/kernel.h>
  19 #include <linux/types.h>
  20 #include <linux/string.h>
  21 #include <linux/mm.h>
  22 #include <linux/bootmem.h>
  23 #include <linux/module.h>
  24
  25 #include <asm/prom.h>
  26 #include <asm/of_device.h>
  27 #include <asm/oplib.h>
  28 #include <asm/irq.h>
  29 #include <asm/asi.h>
  30 #include <asm/upa.h>
  31 #include <asm/smp.h>
  32
  33 static struct device_node *allnodes;
  34
  35 extern rwlock_t devtree_lock;   /* temporary while merging */
  36
  37 struct device_node *of_find_node_by_path(const char *path)
  38 {
  39         struct device_node *np = allnodes;
  40
  41         for (; np != 0; np = np->allnext) {
  42                 if (np->full_name != 0 && strcmp(np->full_name, path) == 0)
  43                         break;
  44         }
  45
  46         return np;
  47 }
  48 EXPORT_SYMBOL(of_find_node_by_path);
  49
  50 struct device_node *of_find_node_by_phandle(phandle handle)
  51 {
  52         struct device_node *np;
  53
  54         for (np = allnodes; np != 0; np = np->allnext)
  55                 if (np->node == handle)
  56                         break;
  57
  58         return np;
  59 }
  60 EXPORT_SYMBOL(of_find_node_by_phandle);
  61
  62 struct device_node *of_find_node_by_name(struct device_node *from,
  63         const char *name)
  64 {
  65         struct device_node *np;
  66
  67         np = from ? from->allnext : allnodes;
  68         for (; np != NULL; np = np->allnext)
  69                 if (np->name != NULL && strcmp(np->name, name) == 0)
  70                         break;
  71
  72         return np;
  73 }
  74 EXPORT_SYMBOL(of_find_node_by_name);
  75
  76 struct device_node *of_find_node_by_type(struct device_node *from,
  77         const char *type)
  78 {
  79         struct device_node *np;
  80
  81         np = from ? from->allnext : allnodes;
  82         for (; np != 0; np = np->allnext)
  83                 if (np->type != 0 && strcmp(np->type, type) == 0)
  84                         break;
  85
  86         return np;
  87 }
  88 EXPORT_SYMBOL(of_find_node_by_type);
  89
  90 struct device_node *of_find_compatible_node(struct device_node *from,
  91         const char *type, const char *compatible)
  92 {
  93         struct device_node *np;
  94
  95         np = from ? from->allnext : allnodes;
  96         for (; np != 0; np = np->allnext) {
  97                 if (type != NULL
  98                     && !(np->type != 0 && strcmp(np->type, type) == 0))
  99                         continue;
 100                 if (of_device_is_compatible(np, compatible))
 101                         break;
 102         }
 103
 104         return np;
 105 }
 106 EXPORT_SYMBOL(of_find_compatible_node);
 107
 108 int of_getintprop_default(struct device_node *np, const char *name, int def)
 109 {
 110         struct property *prop;
 111         int len;
 112
 113         prop = of_find_property(np, name, &len);
 114         if (!prop || len != 4)
 115                 return def;
 116
 117         return *(int *) prop->value;
 118 }
 119 EXPORT_SYMBOL(of_getintprop_default);
 120
 121 int of_set_property(struct device_node *dp, const char *name, void *val, int len)
 122 {
 123         struct property **prevp;
 124         void *new_val;
 125         int err;
 126
 127         new_val = kmalloc(len, GFP_KERNEL);
 128         if (!new_val)
 129                 return -ENOMEM;
 130
 131         memcpy(new_val, val, len);
 132
 133         err = -ENODEV;
 134
 135         write_lock(&devtree_lock);
 136         prevp = &dp->properties;
 137         while (*prevp) {
 138                 struct property *prop = *prevp;
 139
 140                 if (!strcasecmp(prop->name, name)) {
 141                         void *old_val = prop->value;
 142                         int ret;
 143
 144                         ret = prom_setprop(dp->node, name, val, len);
 145                         err = -EINVAL;
 146                         if (ret >= 0) {
 147                                 prop->value = new_val;
 148                                 prop->length = len;
 149
 150                                 if (OF_IS_DYNAMIC(prop))
 151                                         kfree(old_val);
 152
 153                                 OF_MARK_DYNAMIC(prop);
 154
 155                                 err = 0;
 156                         }
 157                         break;
 158                 }
 159                 prevp = &(*prevp)->next;
 160         }
 161         write_unlock(&devtree_lock);
 162
 163         /* XXX Upate procfs if necessary... */
 164
 165         return err;
 166 }
 167 EXPORT_SYMBOL(of_set_property);
 168
 169 static unsigned int prom_early_allocated;
 170
 171 static void * __init prom_early_alloc(unsigned long size)
 172 {
 173         void *ret;
 174
 175         ret = __alloc_bootmem(size, SMP_CACHE_BYTES, 0UL);
 176         if (ret != NULL)
 177                 memset(ret, 0, size);
 178
 179         prom_early_allocated += size;
 180
 181         return ret;
 182 }
 183
 184 #ifdef CONFIG_PCI
 185 /* PSYCHO interrupt mapping support. */
 186 #define PSYCHO_IMAP_A_SLOT0     0x0c00UL
 187 #define PSYCHO_IMAP_B_SLOT0     0x0c20UL
 188 static unsigned long psycho_pcislot_imap_offset(unsigned long ino)
 189 {
 190         unsigned int bus =  (ino & 0x10) >> 4;
 191         unsigned int slot = (ino & 0x0c) >> 2;
 192
 193         if (bus == 0)
 194                 return PSYCHO_IMAP_A_SLOT0 + (slot * 8);
 195         else
 196                 return PSYCHO_IMAP_B_SLOT0 + (slot * 8);
 197 }
 198
 199 #define PSYCHO_IMAP_SCSI        0x1000UL
 200 #define PSYCHO_IMAP_ETH         0x1008UL
 201 #define PSYCHO_IMAP_BPP         0x1010UL
 202 #define PSYCHO_IMAP_AU_REC      0x1018UL
 203 #define PSYCHO_IMAP_AU_PLAY     0x1020UL
 204 #define PSYCHO_IMAP_PFAIL       0x1028UL
 205 #define PSYCHO_IMAP_KMS         0x1030UL
 206 #define PSYCHO_IMAP_FLPY        0x1038UL
 207 #define PSYCHO_IMAP_SHW         0x1040UL
 208 #define PSYCHO_IMAP_KBD         0x1048UL
 209 #define PSYCHO_IMAP_MS          0x1050UL
 210 #define PSYCHO_IMAP_SER         0x1058UL
 211 #define PSYCHO_IMAP_TIM0        0x1060UL
 212 #define PSYCHO_IMAP_TIM1        0x1068UL
 213 #define PSYCHO_IMAP_UE          0x1070UL
 214 #define PSYCHO_IMAP_CE          0x1078UL
 215 #define PSYCHO_IMAP_A_ERR       0x1080UL
 216 #define PSYCHO_IMAP_B_ERR       0x1088UL
 217 #define PSYCHO_IMAP_PMGMT       0x1090UL
 218 #define PSYCHO_IMAP_GFX         0x1098UL
 219 #define PSYCHO_IMAP_EUPA        0x10a0UL
 220
 221 static unsigned long __psycho_onboard_imap_off[] = {
 222 /*0x20*/        PSYCHO_IMAP_SCSI,
 223 /*0x21*/        PSYCHO_IMAP_ETH,
 224 /*0x22*/        PSYCHO_IMAP_BPP,
 225 /*0x23*/        PSYCHO_IMAP_AU_REC,
 226 /*0x24*/        PSYCHO_IMAP_AU_PLAY,
 227 /*0x25*/        PSYCHO_IMAP_PFAIL,
 228 /*0x26*/        PSYCHO_IMAP_KMS,
 229 /*0x27*/        PSYCHO_IMAP_FLPY,
 230 /*0x28*/        PSYCHO_IMAP_SHW,
 231 /*0x29*/        PSYCHO_IMAP_KBD,
 232 /*0x2a*/        PSYCHO_IMAP_MS,
 233 /*0x2b*/        PSYCHO_IMAP_SER,
 234 /*0x2c*/        PSYCHO_IMAP_TIM0,
 235 /*0x2d*/        PSYCHO_IMAP_TIM1,
 236 /*0x2e*/        PSYCHO_IMAP_UE,
 237 /*0x2f*/        PSYCHO_IMAP_CE,
 238 /*0x30*/        PSYCHO_IMAP_A_ERR,
 239 /*0x31*/        PSYCHO_IMAP_B_ERR,
 240 /*0x32*/        PSYCHO_IMAP_PMGMT,
 241 /*0x33*/        PSYCHO_IMAP_GFX,
 242 /*0x34*/        PSYCHO_IMAP_EUPA,
 243 };
 244 #define PSYCHO_ONBOARD_IRQ_BASE         0x20
 245 #define PSYCHO_ONBOARD_IRQ_LAST         0x34
 246 #define psycho_onboard_imap_offset(__ino) \
 247         __psycho_onboard_imap_off[(__ino) - PSYCHO_ONBOARD_IRQ_BASE]
 248
 249 #define PSYCHO_ICLR_A_SLOT0     0x1400UL
 250 #define PSYCHO_ICLR_SCSI        0x1800UL
 251
 252 #define psycho_iclr_offset(ino)                                       \
 253         ((ino & 0x20) ? (PSYCHO_ICLR_SCSI + (((ino) & 0x1f) << 3)) :  \
 254                         (PSYCHO_ICLR_A_SLOT0 + (((ino) & 0x1f)<<3)))
 255
 256 static unsigned int psycho_irq_build(struct device_node *dp,
 257                                      unsigned int ino,
 258                                      void *_data)
 259 {
 260         unsigned long controller_regs = (unsigned long) _data;
 261         unsigned long imap, iclr;
 262         unsigned long imap_off, iclr_off;
 263         int inofixup = 0;
 264
 265         ino &= 0x3f;
 266         if (ino < PSYCHO_ONBOARD_IRQ_BASE) {
 267                 /* PCI slot */
 268                 imap_off = psycho_pcislot_imap_offset(ino);
 269         } else {
 270                 /* Onboard device */
 271                 if (ino > PSYCHO_ONBOARD_IRQ_LAST) {
 272                         prom_printf("psycho_irq_build: Wacky INO [%x]\n", ino);
 273                         prom_halt();
 274                 }
 275                 imap_off = psycho_onboard_imap_offset(ino);
 276         }
 277
 278         /* Now build the IRQ bucket. */
 279         imap = controller_regs + imap_off;
 280
 281         iclr_off = psycho_iclr_offset(ino);
 282         iclr = controller_regs + iclr_off;
 283
 284         if ((ino & 0x20) == 0)
 285                 inofixup = ino & 0x03;
 286
 287         return build_irq(inofixup, iclr, imap);
 288 }
 289
 290 static void __init psycho_irq_trans_init(struct device_node *dp)
 291 {
 292         const struct linux_prom64_registers *regs;
 293
 294         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
 295         dp->irq_trans->irq_build = psycho_irq_build;
 296
 297         regs = of_get_property(dp, "reg", NULL);
 298         dp->irq_trans->data = (void *) regs[2].phys_addr;
 299 }
 300
 301 #define sabre_read(__reg) \
 302 ({      u64 __ret; \
 303         __asm__ __volatile__("ldxa [%1] %2, %0" \
 304                              : "=r" (__ret) \
 305                              : "r" (__reg), "i" (ASI_PHYS_BYPASS_EC_E) \
 306                              : "memory"); \
 307         __ret; \
 308 })
 309
 310 struct sabre_irq_data {
 311         unsigned long controller_regs;
 312         unsigned int pci_first_busno;
 313 };
 314 #define SABRE_CONFIGSPACE       0x001000000UL
 315 #define SABRE_WRSYNC            0x1c20UL
 316
 317 #define SABRE_CONFIG_BASE(CONFIG_SPACE) \
 318         (CONFIG_SPACE | (1UL << 24))
 319 #define SABRE_CONFIG_ENCODE(BUS, DEVFN, REG)    \
 320         (((unsigned long)(BUS)   << 16) |       \
 321          ((unsigned long)(DEVFN) << 8)  |       \
 322          ((unsigned long)(REG)))
 323
 324 /* When a device lives behind a bridge deeper in the PCI bus topology
 325  * than APB, a special sequence must run to make sure all pending DMA
 326  * transfers at the time of IRQ delivery are visible in the coherency
 327  * domain by the cpu.  This sequence is to perform a read on the far
 328  * side of the non-APB bridge, then perform a read of Sabre's DMA
 329  * write-sync register.
 330  */
 331 static void sabre_wsync_handler(unsigned int ino, void *_arg1, void *_arg2)
 332 {
 333         unsigned int phys_hi = (unsigned int) (unsigned long) _arg1;
 334         struct sabre_irq_data *irq_data = _arg2;
 335         unsigned long controller_regs = irq_data->controller_regs;
 336         unsigned long sync_reg = controller_regs + SABRE_WRSYNC;
 337         unsigned long config_space = controller_regs + SABRE_CONFIGSPACE;
 338         unsigned int bus, devfn;
 339         u16 _unused;
 340
 341         config_space = SABRE_CONFIG_BASE(config_space);
 342
 343         bus = (phys_hi >> 16) & 0xff;
 344         devfn = (phys_hi >> 8) & 0xff;
 345
 346         config_space |= SABRE_CONFIG_ENCODE(bus, devfn, 0x00);
 347
 348         __asm__ __volatile__("membar #Sync\n\t"
 349                              "lduha [%1] %2, %0\n\t"
 350                              "membar #Sync"
 351                              : "=r" (_unused)
 352                              : "r" ((u16 *) config_space),
 353                                "i" (ASI_PHYS_BYPASS_EC_E_L)
 354                              : "memory");
 355
 356         sabre_read(sync_reg);
 357 }
 358
 359 #define SABRE_IMAP_A_SLOT0      0x0c00UL
 360 #define SABRE_IMAP_B_SLOT0      0x0c20UL
 361 #define SABRE_IMAP_SCSI         0x1000UL
 362 #define SABRE_IMAP_ETH          0x1008UL
 363 #define SABRE_IMAP_BPP          0x1010UL
 364 #define SABRE_IMAP_AU_REC       0x1018UL
 365 #define SABRE_IMAP_AU_PLAY      0x1020UL
 366 #define SABRE_IMAP_PFAIL        0x1028UL
 367 #define SABRE_IMAP_KMS          0x1030UL
 368 #define SABRE_IMAP_FLPY         0x1038UL
 369 #define SABRE_IMAP_SHW          0x1040UL
 370 #define SABRE_IMAP_KBD          0x1048UL
 371 #define SABRE_IMAP_MS           0x1050UL
 372 #define SABRE_IMAP_SER          0x1058UL
 373 #define SABRE_IMAP_UE           0x1070UL
 374 #define SABRE_IMAP_CE           0x1078UL
 375 #define SABRE_IMAP_PCIERR       0x1080UL
 376 #define SABRE_IMAP_GFX          0x1098UL
 377 #define SABRE_IMAP_EUPA         0x10a0UL
 378 #define SABRE_ICLR_A_SLOT0      0x1400UL
 379 #define SABRE_ICLR_B_SLOT0      0x1480UL
 380 #define SABRE_ICLR_SCSI         0x1800UL
 381 #define SABRE_ICLR_ETH          0x1808UL
 382 #define SABRE_ICLR_BPP          0x1810UL
 383 #define SABRE_ICLR_AU_REC       0x1818UL
 384 #define SABRE_ICLR_AU_PLAY      0x1820UL
 385 #define SABRE_ICLR_PFAIL        0x1828UL
 386 #define SABRE_ICLR_KMS          0x1830UL
 387 #define SABRE_ICLR_FLPY         0x1838UL
 388 #define SABRE_ICLR_SHW          0x1840UL
 389 #define SABRE_ICLR_KBD          0x1848UL
 390 #define SABRE_ICLR_MS           0x1850UL
 391 #define SABRE_ICLR_SER          0x1858UL
 392 #define SABRE_ICLR_UE           0x1870UL
 393 #define SABRE_ICLR_CE           0x1878UL
 394 #define SABRE_ICLR_PCIERR       0x1880UL
 395
 396 static unsigned long sabre_pcislot_imap_offset(unsigned long ino)
 397 {
 398         unsigned int bus =  (ino & 0x10) >> 4;
 399         unsigned int slot = (ino & 0x0c) >> 2;
 400
 401         if (bus == 0)
 402                 return SABRE_IMAP_A_SLOT0 + (slot * 8);
 403         else
 404                 return SABRE_IMAP_B_SLOT0 + (slot * 8);
 405 }
 406
 407 static unsigned long __sabre_onboard_imap_off[] = {
 408 /*0x20*/        SABRE_IMAP_SCSI,
 409 /*0x21*/        SABRE_IMAP_ETH,
 410 /*0x22*/        SABRE_IMAP_BPP,
 411 /*0x23*/        SABRE_IMAP_AU_REC,
 412 /*0x24*/        SABRE_IMAP_AU_PLAY,
 413 /*0x25*/        SABRE_IMAP_PFAIL,
 414 /*0x26*/        SABRE_IMAP_KMS,
 415 /*0x27*/        SABRE_IMAP_FLPY,
 416 /*0x28*/        SABRE_IMAP_SHW,
 417 /*0x29*/        SABRE_IMAP_KBD,
 418 /*0x2a*/        SABRE_IMAP_MS,
 419 /*0x2b*/        SABRE_IMAP_SER,
 420 /*0x2c*/        0 /* reserved */,
 421 /*0x2d*/        0 /* reserved */,
 422 /*0x2e*/        SABRE_IMAP_UE,
 423 /*0x2f*/        SABRE_IMAP_CE,
 424 /*0x30*/        SABRE_IMAP_PCIERR,
 425 /*0x31*/        0 /* reserved */,
 426 /*0x32*/        0 /* reserved */,
 427 /*0x33*/        SABRE_IMAP_GFX,
 428 /*0x34*/        SABRE_IMAP_EUPA,
 429 };
 430 #define SABRE_ONBOARD_IRQ_BASE          0x20
 431 #define SABRE_ONBOARD_IRQ_LAST          0x30
 432 #define sabre_onboard_imap_offset(__ino) \
 433         __sabre_onboard_imap_off[(__ino) - SABRE_ONBOARD_IRQ_BASE]
 434
 435 #define sabre_iclr_offset(ino)                                        \
 436         ((ino & 0x20) ? (SABRE_ICLR_SCSI + (((ino) & 0x1f) << 3)) :  \
 437                         (SABRE_ICLR_A_SLOT0 + (((ino) & 0x1f)<<3)))
 438
 439 static int sabre_device_needs_wsync(struct device_node *dp)
 440 {
 441         struct device_node *parent = dp->parent;
 442         const char *parent_model, *parent_compat;
 443
 444         /* This traversal up towards the root is meant to
 445          * handle two cases:
 446          *
 447          * 1) non-PCI bus sitting under PCI, such as 'ebus'
 448          * 2) the PCI controller interrupts themselves, which
 449          *    will use the sabre_irq_build but do not need
 450          *    the DMA synchronization handling
 451          */
 452         while (parent) {
 453                 if (!strcmp(parent->type, "pci"))
 454                         break;
 455                 parent = parent->parent;
 456         }
 457
 458         if (!parent)
 459                 return 0;
 460
 461         parent_model = of_get_property(parent,
 462                                        "model", NULL);
 463         if (parent_model &&
 464             (!strcmp(parent_model, "SUNW,sabre") ||
 465              !strcmp(parent_model, "SUNW,simba")))
 466                 return 0;
 467
 468         parent_compat = of_get_property(parent,
 469                                         "compatible", NULL);
 470         if (parent_compat &&
 471             (!strcmp(parent_compat, "pci108e,a000") ||
 472              !strcmp(parent_compat, "pci108e,a001")))
 473                 return 0;
 474
 475         return 1;
 476 }
 477
 478 static unsigned int sabre_irq_build(struct device_node *dp,
 479                                     unsigned int ino,
 480                                     void *_data)
 481 {
 482         struct sabre_irq_data *irq_data = _data;
 483         unsigned long controller_regs = irq_data->controller_regs;
 484         const struct linux_prom_pci_registers *regs;
 485         unsigned long imap, iclr;
 486         unsigned long imap_off, iclr_off;
 487         int inofixup = 0;
 488         int virt_irq;
 489
 490         ino &= 0x3f;
 491         if (ino < SABRE_ONBOARD_IRQ_BASE) {
 492                 /* PCI slot */
 493                 imap_off = sabre_pcislot_imap_offset(ino);
 494         } else {
 495                 /* onboard device */
 496                 if (ino > SABRE_ONBOARD_IRQ_LAST) {
 497                         prom_printf("sabre_irq_build: Wacky INO [%x]\n", ino);
 498                         prom_halt();
 499                 }
 500                 imap_off = sabre_onboard_imap_offset(ino);
 501         }
 502
 503         /* Now build the IRQ bucket. */
 504         imap = controller_regs + imap_off;
 505
 506         iclr_off = sabre_iclr_offset(ino);
 507         iclr = controller_regs + iclr_off;
 508
 509         if ((ino & 0x20) == 0)
 510                 inofixup = ino & 0x03;
 511
 512         virt_irq = build_irq(inofixup, iclr, imap);
 513
 514         /* If the parent device is a PCI<->PCI bridge other than
 515          * APB, we have to install a pre-handler to ensure that
 516          * all pending DMA is drained before the interrupt handler
 517          * is run.
 518          */
 519         regs = of_get_property(dp, "reg", NULL);
 520         if (regs && sabre_device_needs_wsync(dp)) {
 521                 irq_install_pre_handler(virt_irq,
 522                                         sabre_wsync_handler,
 523                                         (void *) (long) regs->phys_hi,
 524                                         (void *) irq_data);
 525         }
 526
 527         return virt_irq;
 528 }
 529
 530 static void __init sabre_irq_trans_init(struct device_node *dp)
 531 {
 532         const struct linux_prom64_registers *regs;
 533         struct sabre_irq_data *irq_data;
 534         const u32 *busrange;
 535
 536         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
 537         dp->irq_trans->irq_build = sabre_irq_build;
 538
 539         irq_data = prom_early_alloc(sizeof(struct sabre_irq_data));
 540
 541         regs = of_get_property(dp, "reg", NULL);
 542         irq_data->controller_regs = regs[0].phys_addr;
 543
 544         busrange = of_get_property(dp, "bus-range", NULL);
 545         irq_data->pci_first_busno = busrange[0];
 546
 547         dp->irq_trans->data = irq_data;
 548 }
 549
 550 /* SCHIZO interrupt mapping support.  Unlike Psycho, for this controller the
 551  * imap/iclr registers are per-PBM.
 552  */
 553 #define SCHIZO_IMAP_BASE        0x1000UL
 554 #define SCHIZO_ICLR_BASE        0x1400UL
 555
 556 static unsigned long schizo_imap_offset(unsigned long ino)
 557 {
 558         return SCHIZO_IMAP_BASE + (ino * 8UL);
 559 }
 560
 561 static unsigned long schizo_iclr_offset(unsigned long ino)
 562 {
 563         return SCHIZO_ICLR_BASE + (ino * 8UL);
 564 }
 565
 566 static unsigned long schizo_ino_to_iclr(unsigned long pbm_regs,
 567                                         unsigned int ino)
 568 {
 569
 570         return pbm_regs + schizo_iclr_offset(ino);
 571 }
 572
 573 static unsigned long schizo_ino_to_imap(unsigned long pbm_regs,
 574                                         unsigned int ino)
 575 {
 576         return pbm_regs + schizo_imap_offset(ino);
 577 }
 578
 579 #define schizo_read(__reg) \
 580 ({      u64 __ret; \
 581         __asm__ __volatile__("ldxa [%1] %2, %0" \
 582                              : "=r" (__ret) \
 583                              : "r" (__reg), "i" (ASI_PHYS_BYPASS_EC_E) \
 584                              : "memory"); \
 585         __ret; \
 586 })
 587 #define schizo_write(__reg, __val) \
 588         __asm__ __volatile__("stxa %0, [%1] %2" \
 589                              : /* no outputs */ \
 590                              : "r" (__val), "r" (__reg), \
 591                                "i" (ASI_PHYS_BYPASS_EC_E) \
 592                              : "memory")
 593
 594 static void tomatillo_wsync_handler(unsigned int ino, void *_arg1, void *_arg2)
 595 {
 596         unsigned long sync_reg = (unsigned long) _arg2;
 597         u64 mask = 1UL << (ino & IMAP_INO);
 598         u64 val;
 599         int limit;
 600
 601         schizo_write(sync_reg, mask);
 602
 603         limit = 100000;
 604         val = 0;
 605         while (--limit) {
 606                 val = schizo_read(sync_reg);
 607                 if (!(val & mask))
 608                         break;
 609         }
 610         if (limit <= 0) {
 611                 printk("tomatillo_wsync_handler: DMA won't sync [%lx:%lx]\n",
 612                        val, mask);
 613         }
 614
 615         if (_arg1) {
 616                 static unsigned char cacheline[64]
 617                         __attribute__ ((aligned (64)));
 618
 619                 __asm__ __volatile__("rd %%fprs, %0\n\t"
 620                                      "or %0, %4, %1\n\t"
 621                                      "wr %1, 0x0, %%fprs\n\t"
 622                                      "stda %%f0, [%5] %6\n\t"
 623                                      "wr %0, 0x0, %%fprs\n\t"
 624                                      "membar #Sync"
 625                                      : "=&r" (mask), "=&r" (val)
 626                                      : "0" (mask), "1" (val),
 627                                      "i" (FPRS_FEF), "r" (&cacheline[0]),
 628                                      "i" (ASI_BLK_COMMIT_P));
 629         }
 630 }
 631
 632 struct schizo_irq_data {
 633         unsigned long pbm_regs;
 634         unsigned long sync_reg;
 635         u32 portid;
 636         int chip_version;
 637 };
 638
 639 static unsigned int schizo_irq_build(struct device_node *dp,
 640                                      unsigned int ino,
 641                                      void *_data)
 642 {
 643         struct schizo_irq_data *irq_data = _data;
 644         unsigned long pbm_regs = irq_data->pbm_regs;
 645         unsigned long imap, iclr;
 646         int ign_fixup;
 647         int virt_irq;
 648         int is_tomatillo;
 649
 650         ino &= 0x3f;
 651
 652         /* Now build the IRQ bucket. */
 653         imap = schizo_ino_to_imap(pbm_regs, ino);
 654         iclr = schizo_ino_to_iclr(pbm_regs, ino);
 655
 656         /* On Schizo, no inofixup occurs.  This is because each
 657          * INO has it's own IMAP register.  On Psycho and Sabre
 658          * there is only one IMAP register for each PCI slot even
 659          * though four different INOs can be generated by each
 660          * PCI slot.
 661          *
 662          * But, for JBUS variants (essentially, Tomatillo), we have
 663          * to fixup the lowest bit of the interrupt group number.
 664          */
 665         ign_fixup = 0;
 666
 667         is_tomatillo = (irq_data->sync_reg != 0UL);
 668
 669         if (is_tomatillo) {
 670                 if (irq_data->portid & 1)
 671                         ign_fixup = (1 << 6);
 672         }
 673
 674         virt_irq = build_irq(ign_fixup, iclr, imap);
 675
 676         if (is_tomatillo) {
 677                 irq_install_pre_handler(virt_irq,
 678                                         tomatillo_wsync_handler,
 679                                         ((irq_data->chip_version <= 4) ?
 680                                          (void *) 1 : (void *) 0),
 681                                         (void *) irq_data->sync_reg);
 682         }
 683
 684         return virt_irq;
 685 }
 686
 687 static void __init __schizo_irq_trans_init(struct device_node *dp,
 688                                            int is_tomatillo)
 689 {
 690         const struct linux_prom64_registers *regs;
 691         struct schizo_irq_data *irq_data;
 692
 693         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
 694         dp->irq_trans->irq_build = schizo_irq_build;
 695
 696         irq_data = prom_early_alloc(sizeof(struct schizo_irq_data));
 697
 698         regs = of_get_property(dp, "reg", NULL);
 699         dp->irq_trans->data = irq_data;
 700
 701         irq_data->pbm_regs = regs[0].phys_addr;
 702         if (is_tomatillo)
 703                 irq_data->sync_reg = regs[3].phys_addr + 0x1a18UL;
 704         else
 705                 irq_data->sync_reg = 0UL;
 706         irq_data->portid = of_getintprop_default(dp, "portid", 0);
 707         irq_data->chip_version = of_getintprop_default(dp, "version#", 0);
 708 }
 709
 710 static void __init schizo_irq_trans_init(struct device_node *dp)
 711 {
 712         __schizo_irq_trans_init(dp, 0);
 713 }
 714
 715 static void __init tomatillo_irq_trans_init(struct device_node *dp)
 716 {
 717         __schizo_irq_trans_init(dp, 1);
 718 }
 719
 720 static unsigned int pci_sun4v_irq_build(struct device_node *dp,
 721                                         unsigned int devino,
 722                                         void *_data)
 723 {
 724         u32 devhandle = (u32) (unsigned long) _data;
 725
 726         return sun4v_build_irq(devhandle, devino);
 727 }
 728
 729 static void __init pci_sun4v_irq_trans_init(struct device_node *dp)
 730 {
 731         const struct linux_prom64_registers *regs;
 732
 733         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
 734         dp->irq_trans->irq_build = pci_sun4v_irq_build;
 735
 736         regs = of_get_property(dp, "reg", NULL);
 737         dp->irq_trans->data = (void *) (unsigned long)
 738                 ((regs->phys_addr >> 32UL) & 0x0fffffff);
 739 }
 740
 741 struct fire_irq_data {
 742         unsigned long pbm_regs;
 743         u32 portid;
 744 };
 745
 746 #define FIRE_IMAP_BASE  0x001000
 747 #define FIRE_ICLR_BASE  0x001400
 748
 749 static unsigned long fire_imap_offset(unsigned long ino)
 750 {
 751         return FIRE_IMAP_BASE + (ino * 8UL);
 752 }
 753
 754 static unsigned long fire_iclr_offset(unsigned long ino)
 755 {
 756         return FIRE_ICLR_BASE + (ino * 8UL);
 757 }
 758
 759 static unsigned long fire_ino_to_iclr(unsigned long pbm_regs,
 760                                             unsigned int ino)
 761 {
 762         return pbm_regs + fire_iclr_offset(ino);
 763 }
 764
 765 static unsigned long fire_ino_to_imap(unsigned long pbm_regs,
 766                                             unsigned int ino)
 767 {
 768         return pbm_regs + fire_imap_offset(ino);
 769 }
 770
 771 static unsigned int fire_irq_build(struct device_node *dp,
 772                                          unsigned int ino,
 773                                          void *_data)
 774 {
 775         struct fire_irq_data *irq_data = _data;
 776         unsigned long pbm_regs = irq_data->pbm_regs;
 777         unsigned long imap, iclr;
 778         unsigned long int_ctrlr;
 779
 780         ino &= 0x3f;
 781
 782         /* Now build the IRQ bucket. */
 783         imap = fire_ino_to_imap(pbm_regs, ino);
 784         iclr = fire_ino_to_iclr(pbm_regs, ino);
 785
 786         /* Set the interrupt controller number.  */
 787         int_ctrlr = 1 << 6;
 788         upa_writeq(int_ctrlr, imap);
 789
 790         /* The interrupt map registers do not have an INO field
 791          * like other chips do.  They return zero in the INO
 792          * field, and the interrupt controller number is controlled
 793          * in bits 6 to 9.  So in order for build_irq() to get
 794          * the INO right we pass it in as part of the fixup
 795          * which will get added to the map register zero value
 796          * read by build_irq().
 797          */
 798         ino |= (irq_data->portid << 6);
 799         ino -= int_ctrlr;
 800         return build_irq(ino, iclr, imap);
 801 }
 802
 803 static void __init fire_irq_trans_init(struct device_node *dp)
 804 {
 805         const struct linux_prom64_registers *regs;
 806         struct fire_irq_data *irq_data;
 807
 808         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
 809         dp->irq_trans->irq_build = fire_irq_build;
 810
 811         irq_data = prom_early_alloc(sizeof(struct fire_irq_data));
 812
 813         regs = of_get_property(dp, "reg", NULL);
 814         dp->irq_trans->data = irq_data;
 815
 816         irq_data->pbm_regs = regs[0].phys_addr;
 817         irq_data->portid = of_getintprop_default(dp, "portid", 0);
 818 }
 819 #endif /* CONFIG_PCI */
 820
 821 #ifdef CONFIG_SBUS
 822 /* INO number to IMAP register offset for SYSIO external IRQ's.
 823  * This should conform to both Sunfire/Wildfire server and Fusion
 824  * desktop designs.
 825  */
 826 #define SYSIO_IMAP_SLOT0        0x2c00UL
 827 #define SYSIO_IMAP_SLOT1        0x2c08UL
 828 #define SYSIO_IMAP_SLOT2        0x2c10UL
 829 #define SYSIO_IMAP_SLOT3        0x2c18UL
 830 #define SYSIO_IMAP_SCSI         0x3000UL
 831 #define SYSIO_IMAP_ETH          0x3008UL
 832 #define SYSIO_IMAP_BPP          0x3010UL
 833 #define SYSIO_IMAP_AUDIO        0x3018UL
 834 #define SYSIO_IMAP_PFAIL        0x3020UL
 835 #define SYSIO_IMAP_KMS          0x3028UL
 836 #define SYSIO_IMAP_FLPY         0x3030UL
 837 #define SYSIO_IMAP_SHW          0x3038UL
 838 #define SYSIO_IMAP_KBD          0x3040UL
 839 #define SYSIO_IMAP_MS           0x3048UL
 840 #define SYSIO_IMAP_SER          0x3050UL
 841 #define SYSIO_IMAP_TIM0         0x3060UL
 842 #define SYSIO_IMAP_TIM1         0x3068UL
 843 #define SYSIO_IMAP_UE           0x3070UL
 844 #define SYSIO_IMAP_CE           0x3078UL
 845 #define SYSIO_IMAP_SBERR        0x3080UL
 846 #define SYSIO_IMAP_PMGMT        0x3088UL
 847 #define SYSIO_IMAP_GFX          0x3090UL
 848 #define SYSIO_IMAP_EUPA         0x3098UL
 849
 850 #define bogon     ((unsigned long) -1)
 851 static unsigned long sysio_irq_offsets[] = {
 852         /* SBUS Slot 0 --> 3, level 1 --> 7 */
 853         SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0,
 854         SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0,
 855         SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1,
 856         SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1,
 857         SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2,
 858         SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2,
 859         SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3,
 860         SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3,
 861
 862         /* Onboard devices (not relevant/used on SunFire). */
 863         SYSIO_IMAP_SCSI,
 864         SYSIO_IMAP_ETH,
 865         SYSIO_IMAP_BPP,
 866         bogon,
 867         SYSIO_IMAP_AUDIO,
 868         SYSIO_IMAP_PFAIL,
 869         bogon,
 870         bogon,
 871         SYSIO_IMAP_KMS,
 872         SYSIO_IMAP_FLPY,
 873         SYSIO_IMAP_SHW,
 874         SYSIO_IMAP_KBD,
 875         SYSIO_IMAP_MS,
 876         SYSIO_IMAP_SER,
 877         bogon,
 878         bogon,
 879         SYSIO_IMAP_TIM0,
 880         SYSIO_IMAP_TIM1,
 881         bogon,
 882         bogon,
 883         SYSIO_IMAP_UE,
 884         SYSIO_IMAP_CE,
 885         SYSIO_IMAP_SBERR,
 886         SYSIO_IMAP_PMGMT,
 887         SYSIO_IMAP_GFX,
 888         SYSIO_IMAP_EUPA,
 889 };
 890
 891 #undef bogon
 892
 893 #define NUM_SYSIO_OFFSETS ARRAY_SIZE(sysio_irq_offsets)
 894
 895 /* Convert Interrupt Mapping register pointer to associated
 896  * Interrupt Clear register pointer, SYSIO specific version.
 897  */
 898 #define SYSIO_ICLR_UNUSED0      0x3400UL
 899 #define SYSIO_ICLR_SLOT0        0x3408UL
 900 #define SYSIO_ICLR_SLOT1        0x3448UL
 901 #define SYSIO_ICLR_SLOT2        0x3488UL
 902 #define SYSIO_ICLR_SLOT3        0x34c8UL
 903 static unsigned long sysio_imap_to_iclr(unsigned long imap)
 904 {
 905         unsigned long diff = SYSIO_ICLR_UNUSED0 - SYSIO_IMAP_SLOT0;
 906         return imap + diff;
 907 }
 908
 909 static unsigned int sbus_of_build_irq(struct device_node *dp,
 910                                       unsigned int ino,
 911                                       void *_data)
 912 {
 913         unsigned long reg_base = (unsigned long) _data;
 914         const struct linux_prom_registers *regs;
 915         unsigned long imap, iclr;
 916         int sbus_slot = 0;
 917         int sbus_level = 0;
 918
 919         ino &= 0x3f;
 920
 921         regs = of_get_property(dp, "reg", NULL);
 922         if (regs)
 923                 sbus_slot = regs->which_io;
 924
 925         if (ino < 0x20)
 926                 ino += (sbus_slot * 8);
 927
 928         imap = sysio_irq_offsets[ino];
 929         if (imap == ((unsigned long)-1)) {
 930                 prom_printf("get_irq_translations: Bad SYSIO INO[%x]\n",
 931                             ino);
 932                 prom_halt();
 933         }
 934         imap += reg_base;
 935
 936         /* SYSIO inconsistency.  For external SLOTS, we have to select
 937          * the right ICLR register based upon the lower SBUS irq level
 938          * bits.
 939          */
 940         if (ino >= 0x20) {
 941                 iclr = sysio_imap_to_iclr(imap);
 942         } else {
 943                 sbus_level = ino & 0x7;
 944
 945                 switch(sbus_slot) {
 946                 case 0:
 947                         iclr = reg_base + SYSIO_ICLR_SLOT0;
 948                         break;
 949                 case 1:
 950                         iclr = reg_base + SYSIO_ICLR_SLOT1;
 951                         break;
 952                 case 2:
 953                         iclr = reg_base + SYSIO_ICLR_SLOT2;
 954                         break;
 955                 default:
 956                 case 3:
 957                         iclr = reg_base + SYSIO_ICLR_SLOT3;
 958                         break;
 959                 };
 960
 961                 iclr += ((unsigned long)sbus_level - 1UL) * 8UL;
 962         }
 963         return build_irq(sbus_level, iclr, imap);
 964 }
 965
 966 static void __init sbus_irq_trans_init(struct device_node *dp)
 967 {
 968         const struct linux_prom64_registers *regs;
 969
 970         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
 971         dp->irq_trans->irq_build = sbus_of_build_irq;
 972
 973         regs = of_get_property(dp, "reg", NULL);
 974         dp->irq_trans->data = (void *) (unsigned long) regs->phys_addr;
 975 }
 976 #endif /* CONFIG_SBUS */
 977
 978
 979 static unsigned int central_build_irq(struct device_node *dp,
 980                                       unsigned int ino,
 981                                       void *_data)
 982 {
 983         struct device_node *central_dp = _data;
 984         struct of_device *central_op = of_find_device_by_node(central_dp);
 985         struct resource *res;
 986         unsigned long imap, iclr;
 987         u32 tmp;
 988
 989         if (!strcmp(dp->name, "eeprom")) {
 990                 res = &central_op->resource[5];
 991         } else if (!strcmp(dp->name, "zs")) {
 992                 res = &central_op->resource[4];
 993         } else if (!strcmp(dp->name, "clock-board")) {
 994                 res = &central_op->resource[3];
 995         } else {
 996                 return ino;
 997         }
 998
 999         imap = res->start + 0x00UL;
1000         iclr = res->start + 0x10UL;
1001
1002         /* Set the INO state to idle, and disable.  */
1003         upa_writel(0, iclr);
1004         upa_readl(iclr);
1005
1006         tmp = upa_readl(imap);
1007         tmp &= ~0x80000000;
1008         upa_writel(tmp, imap);
1009
1010         return build_irq(0, iclr, imap);
1011 }
1012
1013 static void __init central_irq_trans_init(struct device_node *dp)
1014 {
1015         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
1016         dp->irq_trans->irq_build = central_build_irq;
1017
1018         dp->irq_trans->data = dp;
1019 }
1020
1021 struct irq_trans {
1022         const char *name;
1023         void (*init)(struct device_node *);
1024 };
1025
1026 #ifdef CONFIG_PCI
1027 static struct irq_trans __initdata pci_irq_trans_table[] = {
1028         { "SUNW,sabre", sabre_irq_trans_init },
1029         { "pci108e,a000", sabre_irq_trans_init },
1030         { "pci108e,a001", sabre_irq_trans_init },
1031         { "SUNW,psycho", psycho_irq_trans_init },
1032         { "pci108e,8000", psycho_irq_trans_init },
1033         { "SUNW,schizo", schizo_irq_trans_init },
1034         { "pci108e,8001", schizo_irq_trans_init },
1035         { "SUNW,schizo+", schizo_irq_trans_init },
1036         { "pci108e,8002", schizo_irq_trans_init },
1037         { "SUNW,tomatillo", tomatillo_irq_trans_init },
1038         { "pci108e,a801", tomatillo_irq_trans_init },
1039         { "SUNW,sun4v-pci", pci_sun4v_irq_trans_init },
1040         { "pciex108e,80f0", fire_irq_trans_init },
1041 };
1042 #endif
1043
1044 static unsigned int sun4v_vdev_irq_build(struct device_node *dp,
1045                                          unsigned int devino,
1046                                          void *_data)
1047 {
1048         u32 devhandle = (u32) (unsigned long) _data;
1049
1050         return sun4v_build_irq(devhandle, devino);
1051 }
1052
1053 static void __init sun4v_vdev_irq_trans_init(struct device_node *dp)
1054 {
1055         const struct linux_prom64_registers *regs;
1056
1057         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
1058         dp->irq_trans->irq_build = sun4v_vdev_irq_build;
1059
1060         regs = of_get_property(dp, "reg", NULL);
1061         dp->irq_trans->data = (void *) (unsigned long)
1062                 ((regs->phys_addr >> 32UL) & 0x0fffffff);
1063 }
1064
1065 static void __init irq_trans_init(struct device_node *dp)
1066 {
1067 #ifdef CONFIG_PCI
1068         const char *model;
1069         int i;
1070 #endif
1071
1072 #ifdef CONFIG_PCI
1073         model = of_get_property(dp, "model", NULL);
1074         if (!model)
1075                 model = of_get_property(dp, "compatible", NULL);
1076         if (model) {
1077                 for (i = 0; i < ARRAY_SIZE(pci_irq_trans_table); i++) {
1078                         struct irq_trans *t = &pci_irq_trans_table[i];
1079
1080                         if (!strcmp(model, t->name))
1081                                 return t->init(dp);
1082                 }
1083         }
1084 #endif
1085 #ifdef CONFIG_SBUS
1086         if (!strcmp(dp->name, "sbus") ||
1087             !strcmp(dp->name, "sbi"))
1088                 return sbus_irq_trans_init(dp);
1089 #endif
1090         if (!strcmp(dp->name, "fhc") &&
1091             !strcmp(dp->parent->name, "central"))
1092                 return central_irq_trans_init(dp);
1093         if (!strcmp(dp->name, "virtual-devices"))
1094                 return sun4v_vdev_irq_trans_init(dp);
1095 }
1096
1097 static int is_root_node(const struct device_node *dp)
1098 {
1099         if (!dp)
1100                 return 0;
1101
1102         return (dp->parent == NULL);
1103 }
1104
1105 /* The following routines deal with the black magic of fully naming a
1106  * node.
1107  *
1108  * Certain well known named nodes are just the simple name string.
1109  *
1110  * Actual devices have an address specifier appended to the base name
1111  * string, like this "foo@addr".  The "addr" can be in any number of
1112  * formats, and the platform plus the type of the node determine the
1113  * format and how it is constructed.
1114  *
1115  * For children of the ROOT node, the naming convention is fixed and
1116  * determined by whether this is a sun4u or sun4v system.
1117  *
1118  * For children of other nodes, it is bus type specific.  So
1119  * we walk up the tree until we discover a "device_type" property
1120  * we recognize and we go from there.
1121  *
1122  * As an example, the boot device on my workstation has a full path:
1123  *
1124  *      /pci@1e,600000/ide@d/disk@0,0:c
1125  */
1126 static void __init sun4v_path_component(struct device_node *dp, char *tmp_buf)
1127 {
1128         struct linux_prom64_registers *regs;
1129         struct property *rprop;
1130         u32 high_bits, low_bits, type;
1131
1132         rprop = of_find_property(dp, "reg", NULL);
1133         if (!rprop)
1134                 return;
1135
1136         regs = rprop->value;
1137         if (!is_root_node(dp->parent)) {
1138                 sprintf(tmp_buf, "%s@%x,%x",
1139                         dp->name,
1140                         (unsigned int) (regs->phys_addr >> 32UL),
1141                         (unsigned int) (regs->phys_addr & 0xffffffffUL));
1142                 return;
1143         }
1144
1145         type = regs->phys_addr >> 60UL;
1146         high_bits = (regs->phys_addr >> 32UL) & 0x0fffffffUL;
1147         low_bits = (regs->phys_addr & 0xffffffffUL);
1148
1149         if (type == 0 || type == 8) {
1150                 const char *prefix = (type == 0) ? "m" : "i";
1151
1152                 if (low_bits)
1153                         sprintf(tmp_buf, "%s@%s%x,%x",
1154                                 dp->name, prefix,
1155                                 high_bits, low_bits);
1156                 else
1157                         sprintf(tmp_buf, "%s@%s%x",
1158                                 dp->name,
1159                                 prefix,
1160                                 high_bits);
1161         } else if (type == 12) {
1162                 sprintf(tmp_buf, "%s@%x",
1163                         dp->name, high_bits);
1164         }
1165 }
1166
1167 static void __init sun4u_path_component(struct device_node *dp, char *tmp_buf)
1168 {
1169         struct linux_prom64_registers *regs;
1170         struct property *prop;
1171
1172         prop = of_find_property(dp, "reg", NULL);
1173         if (!prop)
1174                 return;
1175
1176         regs = prop->value;
1177         if (!is_root_node(dp->parent)) {
1178                 sprintf(tmp_buf, "%s@%x,%x",
1179                         dp->name,
1180                         (unsigned int) (regs->phys_addr >> 32UL),
1181                         (unsigned int) (regs->phys_addr & 0xffffffffUL));
1182                 return;
1183         }
1184
1185         prop = of_find_property(dp, "upa-portid", NULL);
1186         if (!prop)
1187                 prop = of_find_property(dp, "portid", NULL);
1188         if (prop) {
1189                 unsigned long mask = 0xffffffffUL;
1190
1191                 if (tlb_type >= cheetah)
1192                         mask = 0x7fffff;
1193
1194                 sprintf(tmp_buf, "%s@%x,%x",
1195                         dp->name,
1196                         *(u32 *)prop->value,
1197                         (unsigned int) (regs->phys_addr & mask));
1198         }
1199 }
1200
1201 /* "name@slot,offset"  */
1202 static void __init sbus_path_component(struct device_node *dp, char *tmp_buf)
1203 {
1204         struct linux_prom_registers *regs;
1205         struct property *prop;
1206
1207         prop = of_find_property(dp, "reg", NULL);
1208         if (!prop)
1209                 return;
1210
1211         regs = prop->value;
1212         sprintf(tmp_buf, "%s@%x,%x",
1213                 dp->name,
1214                 regs->which_io,
1215                 regs->phys_addr);
1216 }
1217
1218 /* "name@devnum[,func]" */
1219 static void __init pci_path_component(struct device_node *dp, char *tmp_buf)
1220 {
1221         struct linux_prom_pci_registers *regs;
1222         struct property *prop;
1223         unsigned int devfn;
1224
1225         prop = of_find_property(dp, "reg", NULL);
1226         if (!prop)
1227                 return;
1228
1229         regs = prop->value;
1230         devfn = (regs->phys_hi >> 8) & 0xff;
1231         if (devfn & 0x07) {
1232                 sprintf(tmp_buf, "%s@%x,%x",
1233                         dp->name,
1234                         devfn >> 3,
1235                         devfn & 0x07);
1236         } else {
1237                 sprintf(tmp_buf, "%s@%x",
1238                         dp->name,
1239                         devfn >> 3);
1240         }
1241 }
1242
1243 /* "name@UPA_PORTID,offset" */
1244 static void __init upa_path_component(struct device_node *dp, char *tmp_buf)
1245 {
1246         struct linux_prom64_registers *regs;
1247         struct property *prop;
1248
1249         prop = of_find_property(dp, "reg", NULL);
1250         if (!prop)
1251                 return;
1252
1253         regs = prop->value;
1254
1255         prop = of_find_property(dp, "upa-portid", NULL);
1256         if (!prop)
1257                 return;
1258
1259         sprintf(tmp_buf, "%s@%x,%x",
1260                 dp->name,
1261                 *(u32 *) prop->value,
1262                 (unsigned int) (regs->phys_addr & 0xffffffffUL));
1263 }
1264
1265 /* "name@reg" */
1266 static void __init vdev_path_component(struct device_node *dp, char *tmp_buf)
1267 {
1268         struct property *prop;
1269         u32 *regs;
1270
1271         prop = of_find_property(dp, "reg", NULL);
1272         if (!prop)
1273                 return;
1274
1275         regs = prop->value;
1276
1277         sprintf(tmp_buf, "%s@%x", dp->name, *regs);
1278 }
1279
1280 /* "name@addrhi,addrlo" */
1281 static void __init ebus_path_component(struct device_node *dp, char *tmp_buf)
1282 {
1283         struct linux_prom64_registers *regs;
1284         struct property *prop;
1285
1286         prop = of_find_property(dp, "reg", NULL);
1287         if (!prop)
1288                 return;
1289
1290         regs = prop->value;
1291
1292         sprintf(tmp_buf, "%s@%x,%x",
1293                 dp->name,
1294                 (unsigned int) (regs->phys_addr >> 32UL),
1295                 (unsigned int) (regs->phys_addr & 0xffffffffUL));
1296 }
1297
1298 /* "name@bus,addr" */
1299 static void __init i2c_path_component(struct device_node *dp, char *tmp_buf)
1300 {
1301         struct property *prop;
1302         u32 *regs;
1303
1304         prop = of_find_property(dp, "reg", NULL);
1305         if (!prop)
1306                 return;
1307
1308         regs = prop->value;
1309
1310         /* This actually isn't right... should look at the #address-cells
1311          * property of the i2c bus node etc. etc.
1312          */
1313         sprintf(tmp_buf, "%s@%x,%x",
1314                 dp->name, regs[0], regs[1]);
1315 }
1316
1317 /* "name@reg0[,reg1]" */
1318 static void __init usb_path_component(struct device_node *dp, char *tmp_buf)
1319 {
1320         struct property *prop;
1321         u32 *regs;
1322
1323         prop = of_find_property(dp, "reg", NULL);
1324         if (!prop)
1325                 return;
1326
1327         regs = prop->value;
1328
1329         if (prop->length == sizeof(u32) || regs[1] == 1) {
1330                 sprintf(tmp_buf, "%s@%x",
1331                         dp->name, regs[0]);
1332         } else {
1333                 sprintf(tmp_buf, "%s@%x,%x",
1334                         dp->name, regs[0], regs[1]);
1335         }
1336 }
1337
1338 /* "name@reg0reg1[,reg2reg3]" */
1339 static void __init ieee1394_path_component(struct device_node *dp, char *tmp_buf)
1340 {
1341         struct property *prop;
1342         u32 *regs;
1343
1344         prop = of_find_property(dp, "reg", NULL);
1345         if (!prop)
1346                 return;
1347
1348         regs = prop->value;
1349
1350         if (regs[2] || regs[3]) {
1351                 sprintf(tmp_buf, "%s@%08x%08x,%04x%08x",
1352                         dp->name, regs[0], regs[1], regs[2], regs[3]);
1353         } else {
1354                 sprintf(tmp_buf, "%s@%08x%08x",
1355                         dp->name, regs[0], regs[1]);
1356         }
1357 }
1358
1359 static void __init __build_path_component(struct device_node *dp, char *tmp_buf)
1360 {
1361         struct device_node *parent = dp->parent;
1362
1363         if (parent != NULL) {
1364                 if (!strcmp(parent->type, "pci") ||
1365                     !strcmp(parent->type, "pciex"))
1366                         return pci_path_component(dp, tmp_buf);
1367                 if (!strcmp(parent->type, "sbus"))
1368                         return sbus_path_component(dp, tmp_buf);
1369                 if (!strcmp(parent->type, "upa"))
1370                         return upa_path_component(dp, tmp_buf);
1371                 if (!strcmp(parent->type, "ebus"))
1372                         return ebus_path_component(dp, tmp_buf);
1373                 if (!strcmp(parent->name, "usb") ||
1374                     !strcmp(parent->name, "hub"))
1375                         return usb_path_component(dp, tmp_buf);
1376                 if (!strcmp(parent->type, "i2c"))
1377                         return i2c_path_component(dp, tmp_buf);
1378                 if (!strcmp(parent->type, "firewire"))
1379                         return ieee1394_path_component(dp, tmp_buf);
1380                 if (!strcmp(parent->type, "virtual-devices"))
1381                         return vdev_path_component(dp, tmp_buf);
1382
1383                 /* "isa" is handled with platform naming */
1384         }
1385
1386         /* Use platform naming convention.  */
1387         if (tlb_type == hypervisor)
1388                 return sun4v_path_component(dp, tmp_buf);
1389         else
1390                 return sun4u_path_component(dp, tmp_buf);
1391 }
1392
1393 static char * __init build_path_component(struct device_node *dp)
1394 {
1395         char tmp_buf[64], *n;
1396
1397         tmp_buf[0] = '\0';
1398         __build_path_component(dp, tmp_buf);
1399         if (tmp_buf[0] == '\0')
1400                 strcpy(tmp_buf, dp->name);
1401
1402         n = prom_early_alloc(strlen(tmp_buf) + 1);
1403         strcpy(n, tmp_buf);
1404
1405         return n;
1406 }
1407
1408 static char * __init build_full_name(struct device_node *dp)
1409 {
1410         int len, ourlen, plen;
1411         char *n;
1412
1413         plen = strlen(dp->parent->full_name);
1414         ourlen = strlen(dp->path_component_name);
1415         len = ourlen + plen + 2;
1416
1417         n = prom_early_alloc(len);
1418         strcpy(n, dp->parent->full_name);
1419         if (!is_root_node(dp->parent)) {
1420                 strcpy(n + plen, "/");
1421                 plen++;
1422         }
1423         strcpy(n + plen, dp->path_component_name);
1424
1425         return n;
1426 }
1427
1428 static unsigned int unique_id;
1429
1430 static struct property * __init build_one_prop(phandle node, char *prev, char *special_name, void *special_val, int special_len)
1431 {
1432         static struct property *tmp = NULL;
1433         struct property *p;
1434
1435         if (tmp) {
1436                 p = tmp;
1437                 memset(p, 0, sizeof(*p) + 32);
1438                 tmp = NULL;
1439         } else {
1440                 p = prom_early_alloc(sizeof(struct property) + 32);
1441                 p->unique_id = unique_id++;
1442         }
1443
1444         p->name = (char *) (p + 1);
1445         if (special_name) {
1446                 strcpy(p->name, special_name);
1447                 p->length = special_len;
1448                 p->value = prom_early_alloc(special_len);
1449                 memcpy(p->value, special_val, special_len);
1450         } else {
1451                 if (prev == NULL) {
1452                         prom_firstprop(node, p->name);
1453                 } else {
1454                         prom_nextprop(node, prev, p->name);
1455                 }
1456                 if (strlen(p->name) == 0) {
1457                         tmp = p;
1458                         return NULL;
1459                 }
1460                 p->length = prom_getproplen(node, p->name);
1461                 if (p->length <= 0) {
1462                         p->length = 0;
1463                 } else {
1464                         p->value = prom_early_alloc(p->length + 1);
1465                         prom_getproperty(node, p->name, p->value, p->length);
1466                         ((unsigned char *)p->value)[p->length] = '\0';
1467                 }
1468         }
1469         return p;
1470 }
1471
1472 static struct property * __init build_prop_list(phandle node)
1473 {
1474         struct property *head, *tail;
1475
1476         head = tail = build_one_prop(node, NULL,
1477                                      ".node", &node, sizeof(node));
1478
1479         tail->next = build_one_prop(node, NULL, NULL, NULL, 0);
1480         tail = tail->next;
1481         while(tail) {
1482                 tail->next = build_one_prop(node, tail->name,
1483                                             NULL, NULL, 0);
1484                 tail = tail->next;
1485         }
1486
1487         return head;
1488 }
1489
1490 static char * __init get_one_property(phandle node, const char *name)
1491 {
1492         char *buf = "<NULL>";
1493         int len;
1494
1495         len = prom_getproplen(node, name);
1496         if (len > 0) {
1497                 buf = prom_early_alloc(len);
1498                 prom_getproperty(node, name, buf, len);
1499         }
1500
1501         return buf;
1502 }
1503
1504 static struct device_node * __init create_node(phandle node, struct device_node *parent)
1505 {
1506         struct device_node *dp;
1507
1508         if (!node)
1509                 return NULL;
1510
1511         dp = prom_early_alloc(sizeof(*dp));
1512         dp->unique_id = unique_id++;
1513         dp->parent = parent;
1514
1515         kref_init(&dp->kref);
1516
1517         dp->name = get_one_property(node, "name");
1518         dp->type = get_one_property(node, "device_type");
1519         dp->node = node;
1520
1521         dp->properties = build_prop_list(node);
1522
1523         irq_trans_init(dp);
1524
1525         return dp;
1526 }
1527
1528 static struct device_node * __init build_tree(struct device_node *parent, phandle node, struct device_node ***nextp)
1529 {
1530         struct device_node *ret = NULL, *prev_sibling = NULL;
1531         struct device_node *dp;
1532
1533         while (1) {
1534                 dp = create_node(node, parent);
1535                 if (!dp)
1536                         break;
1537
1538                 if (prev_sibling)
1539                         prev_sibling->sibling = dp;
1540
1541                 if (!ret)
1542                         ret = dp;
1543                 prev_sibling = dp;
1544
1545                 *(*nextp) = dp;
1546                 *nextp = &dp->allnext;
1547
1548                 dp->path_component_name = build_path_component(dp);
1549                 dp->full_name = build_full_name(dp);
1550
1551                 dp->child = build_tree(dp, prom_getchild(node), nextp);
1552
1553                 node = prom_getsibling(node);
1554         }
1555
1556         return ret;
1557 }
1558
1559 static const char *get_mid_prop(void)
1560 {
1561         return (tlb_type == spitfire ? "upa-portid" : "portid");
1562 }
1563
1564 struct device_node *of_find_node_by_cpuid(int cpuid)
1565 {
1566         struct device_node *dp;
1567         const char *mid_prop = get_mid_prop();
1568
1569         for_each_node_by_type(dp, "cpu") {
1570                 int id = of_getintprop_default(dp, mid_prop, -1);
1571                 const char *this_mid_prop = mid_prop;
1572
1573                 if (id < 0) {
1574                         this_mid_prop = "cpuid";
1575                         id = of_getintprop_default(dp, this_mid_prop, -1);
1576                 }
1577
1578                 if (id < 0) {
1579                         prom_printf("OF: Serious problem, cpu lacks "
1580                                     "%s property", this_mid_prop);
1581                         prom_halt();
1582                 }
1583                 if (cpuid == id)
1584                         return dp;
1585         }
1586         return NULL;
1587 }
1588
1589 static void __init of_fill_in_cpu_data(void)
1590 {
1591         struct device_node *dp;
1592         const char *mid_prop = get_mid_prop();
1593
1594         ncpus_probed = 0;
1595         for_each_node_by_type(dp, "cpu") {
1596                 int cpuid = of_getintprop_default(dp, mid_prop, -1);
1597                 const char *this_mid_prop = mid_prop;
1598                 struct device_node *portid_parent;
1599                 int portid = -1;
1600
1601                 portid_parent = NULL;
1602                 if (cpuid < 0) {
1603                         this_mid_prop = "cpuid";
1604                         cpuid = of_getintprop_default(dp, this_mid_prop, -1);
1605                         if (cpuid >= 0) {
1606                                 int limit = 2;
1607
1608                                 portid_parent = dp;
1609                                 while (limit--) {
1610                                         portid_parent = portid_parent->parent;
1611                                         if (!portid_parent)
1612                                                 break;
1613                                         portid = of_getintprop_default(portid_parent,
1614                                                                        "portid", -1);
1615                                         if (portid >= 0)
1616                                                 break;
1617                                 }
1618                         }
1619                 }
1620
1621                 if (cpuid < 0) {
1622                         prom_printf("OF: Serious problem, cpu lacks "
1623                                     "%s property", this_mid_prop);
1624                         prom_halt();
1625                 }
1626
1627                 ncpus_probed++;
1628
1629 #ifdef CONFIG_SMP
1630                 if (cpuid >= NR_CPUS)
1631                         continue;
1632 #else
1633                 /* On uniprocessor we only want the values for the
1634                  * real physical cpu the kernel booted onto, however
1635                  * cpu_data() only has one entry at index 0.
1636                  */
1637                 if (cpuid != real_hard_smp_processor_id())
1638                         continue;
1639                 cpuid = 0;
1640 #endif
1641
1642                 cpu_data(cpuid).clock_tick =
1643                         of_getintprop_default(dp, "clock-frequency", 0);
1644
1645                 if (portid_parent) {
1646                         cpu_data(cpuid).dcache_size =
1647                                 of_getintprop_default(dp, "l1-dcache-size",
1648                                                       16 * 1024);
1649                         cpu_data(cpuid).dcache_line_size =
1650                                 of_getintprop_default(dp, "l1-dcache-line-size",
1651                                                       32);
1652                         cpu_data(cpuid).icache_size =
1653                                 of_getintprop_default(dp, "l1-icache-size",
1654                                                       8 * 1024);
1655                         cpu_data(cpuid).icache_line_size =
1656                                 of_getintprop_default(dp, "l1-icache-line-size",
1657                                                       32);
1658                         cpu_data(cpuid).ecache_size =
1659                                 of_getintprop_default(dp, "l2-cache-size", 0);
1660                         cpu_data(cpuid).ecache_line_size =
1661                                 of_getintprop_default(dp, "l2-cache-line-size", 0);
1662                         if (!cpu_data(cpuid).ecache_size ||
1663                             !cpu_data(cpuid).ecache_line_size) {
1664                                 cpu_data(cpuid).ecache_size =
1665                                         of_getintprop_default(portid_parent,
1666                                                               "l2-cache-size",
1667                                                               (4 * 1024 * 1024));
1668                                 cpu_data(cpuid).ecache_line_size =
1669                                         of_getintprop_default(portid_parent,
1670                                                               "l2-cache-line-size", 64);
1671                         }
1672
1673                         cpu_data(cpuid).core_id = portid + 1;
1674                         cpu_data(cpuid).proc_id = portid;
1675 #ifdef CONFIG_SMP
1676                         sparc64_multi_core = 1;
1677 #endif
1678                 } else {
1679                         cpu_data(cpuid).dcache_size =
1680                                 of_getintprop_default(dp, "dcache-size", 16 * 1024);
1681                         cpu_data(cpuid).dcache_line_size =
1682                                 of_getintprop_default(dp, "dcache-line-size", 32);
1683
1684                         cpu_data(cpuid).icache_size =
1685                                 of_getintprop_default(dp, "icache-size", 16 * 1024);
1686                         cpu_data(cpuid).icache_line_size =
1687                                 of_getintprop_default(dp, "icache-line-size", 32);
1688
1689                         cpu_data(cpuid).ecache_size =
1690                                 of_getintprop_default(dp, "ecache-size",
1691                                                       (4 * 1024 * 1024));
1692                         cpu_data(cpuid).ecache_line_size =
1693                                 of_getintprop_default(dp, "ecache-line-size", 64);
1694
1695                         cpu_data(cpuid).core_id = 0;
1696                         cpu_data(cpuid).proc_id = -1;
1697                 }
1698
1699 #ifdef CONFIG_SMP
1700                 cpu_set(cpuid, cpu_present_map);
1701                 cpu_set(cpuid, cpu_possible_map);
1702 #endif
1703         }
1704
1705         smp_fill_in_sib_core_maps();
1706 }
1707
1708 void __init prom_build_devicetree(void)
1709 {
1710         struct device_node **nextp;
1711
1712         allnodes = create_node(prom_root_node, NULL);
1713         allnodes->path_component_name = "";
1714         allnodes->full_name = "/";
1715
1716         nextp = &allnodes->allnext;
1717         allnodes->child = build_tree(allnodes,
1718                                      prom_getchild(allnodes->node),
1719                                      &nextp);
1720         printk("PROM: Built device tree with %u bytes of memory.\n",
1721                prom_early_allocated);
1722
1723         if (tlb_type != hypervisor)
1724                 of_fill_in_cpu_data();
1725 }