arch/sparc64/kernel/prom.c

   1 /*
   2  * Procedures for creating, accessing and interpreting the device tree.
   3  *
   4  * Paul Mackerras       August 1996.
   5  * Copyright (C) 1996-2005 Paul Mackerras.
   6  *
   7  *  Adapted for 64bit PowerPC by Dave Engebretsen and Peter Bergner.
   8  *    {engebret|bergner}@us.ibm.com
   9  *
  10  *  Adapted for sparc64 by David S. Miller davem@davemloft.net
  11  *
  12  *      This program is free software; you can redistribute it and/or
  13  *      modify it under the terms of the GNU General Public License
  14  *      as published by the Free Software Foundation; either version
  15  *      2 of the License, or (at your option) any later version.
  16  */
  17
  18 #include <linux/kernel.h>
  19 #include <linux/types.h>
  20 #include <linux/string.h>
  21 #include <linux/mm.h>
  22 #include <linux/bootmem.h>
  23 #include <linux/module.h>
  24
  25 #include <asm/prom.h>
  26 #include <asm/of_device.h>
  27 #include <asm/oplib.h>
  28 #include <asm/irq.h>
  29 #include <asm/asi.h>
  30 #include <asm/upa.h>
  31
  32 static struct device_node *allnodes;
  33
  34 /* use when traversing tree through the allnext, child, sibling,
  35  * or parent members of struct device_node.
  36  */
  37 static DEFINE_RWLOCK(devtree_lock);
  38
  39 int of_device_is_compatible(const struct device_node *device,
  40                             const char *compat)
  41 {
  42         const char* cp;
  43         int cplen, l;
  44
  45         cp = of_get_property(device, "compatible", &cplen);
  46         if (cp == NULL)
  47                 return 0;
  48         while (cplen > 0) {
  49                 if (strncmp(cp, compat, strlen(compat)) == 0)
  50                         return 1;
  51                 l = strlen(cp) + 1;
  52                 cp += l;
  53                 cplen -= l;
  54         }
  55
  56         return 0;
  57 }
  58 EXPORT_SYMBOL(of_device_is_compatible);
  59
  60 struct device_node *of_get_parent(const struct device_node *node)
  61 {
  62         struct device_node *np;
  63
  64         if (!node)
  65                 return NULL;
  66
  67         np = node->parent;
  68
  69         return np;
  70 }
  71 EXPORT_SYMBOL(of_get_parent);
  72
  73 struct device_node *of_get_next_child(const struct device_node *node,
  74         struct device_node *prev)
  75 {
  76         struct device_node *next;
  77
  78         next = prev ? prev->sibling : node->child;
  79         for (; next != 0; next = next->sibling) {
  80                 break;
  81         }
  82
  83         return next;
  84 }
  85 EXPORT_SYMBOL(of_get_next_child);
  86
  87 struct device_node *of_find_node_by_path(const char *path)
  88 {
  89         struct device_node *np = allnodes;
  90
  91         for (; np != 0; np = np->allnext) {
  92                 if (np->full_name != 0 && strcmp(np->full_name, path) == 0)
  93                         break;
  94         }
  95
  96         return np;
  97 }
  98 EXPORT_SYMBOL(of_find_node_by_path);
  99
 100 struct device_node *of_find_node_by_phandle(phandle handle)
 101 {
 102         struct device_node *np;
 103
 104         for (np = allnodes; np != 0; np = np->allnext)
 105                 if (np->node == handle)
 106                         break;
 107
 108         return np;
 109 }
 110 EXPORT_SYMBOL(of_find_node_by_phandle);
 111
 112 struct device_node *of_find_node_by_name(struct device_node *from,
 113         const char *name)
 114 {
 115         struct device_node *np;
 116
 117         np = from ? from->allnext : allnodes;
 118         for (; np != NULL; np = np->allnext)
 119                 if (np->name != NULL && strcmp(np->name, name) == 0)
 120                         break;
 121
 122         return np;
 123 }
 124 EXPORT_SYMBOL(of_find_node_by_name);
 125
 126 struct device_node *of_find_node_by_type(struct device_node *from,
 127         const char *type)
 128 {
 129         struct device_node *np;
 130
 131         np = from ? from->allnext : allnodes;
 132         for (; np != 0; np = np->allnext)
 133                 if (np->type != 0 && strcmp(np->type, type) == 0)
 134                         break;
 135
 136         return np;
 137 }
 138 EXPORT_SYMBOL(of_find_node_by_type);
 139
 140 struct device_node *of_find_compatible_node(struct device_node *from,
 141         const char *type, const char *compatible)
 142 {
 143         struct device_node *np;
 144
 145         np = from ? from->allnext : allnodes;
 146         for (; np != 0; np = np->allnext) {
 147                 if (type != NULL
 148                     && !(np->type != 0 && strcmp(np->type, type) == 0))
 149                         continue;
 150                 if (of_device_is_compatible(np, compatible))
 151                         break;
 152         }
 153
 154         return np;
 155 }
 156 EXPORT_SYMBOL(of_find_compatible_node);
 157
 158 struct property *of_find_property(const struct device_node *np,
 159                                   const char *name,
 160                                   int *lenp)
 161 {
 162         struct property *pp;
 163
 164         for (pp = np->properties; pp != 0; pp = pp->next) {
 165                 if (strcasecmp(pp->name, name) == 0) {
 166                         if (lenp != 0)
 167                                 *lenp = pp->length;
 168                         break;
 169                 }
 170         }
 171         return pp;
 172 }
 173 EXPORT_SYMBOL(of_find_property);
 174
 175 /*
 176  * Find a property with a given name for a given node
 177  * and return the value.
 178  */
 179 const void *of_get_property(const struct device_node *np, const char *name,
 180                       int *lenp)
 181 {
 182         struct property *pp = of_find_property(np,name,lenp);
 183         return pp ? pp->value : NULL;
 184 }
 185 EXPORT_SYMBOL(of_get_property);
 186
 187 int of_getintprop_default(struct device_node *np, const char *name, int def)
 188 {
 189         struct property *prop;
 190         int len;
 191
 192         prop = of_find_property(np, name, &len);
 193         if (!prop || len != 4)
 194                 return def;
 195
 196         return *(int *) prop->value;
 197 }
 198 EXPORT_SYMBOL(of_getintprop_default);
 199
 200 int of_n_addr_cells(struct device_node *np)
 201 {
 202         const int* ip;
 203         do {
 204                 if (np->parent)
 205                         np = np->parent;
 206                 ip = of_get_property(np, "#address-cells", NULL);
 207                 if (ip != NULL)
 208                         return *ip;
 209         } while (np->parent);
 210         /* No #address-cells property for the root node, default to 2 */
 211         return 2;
 212 }
 213 EXPORT_SYMBOL(of_n_addr_cells);
 214
 215 int of_n_size_cells(struct device_node *np)
 216 {
 217         const int* ip;
 218         do {
 219                 if (np->parent)
 220                         np = np->parent;
 221                 ip = of_get_property(np, "#size-cells", NULL);
 222                 if (ip != NULL)
 223                         return *ip;
 224         } while (np->parent);
 225         /* No #size-cells property for the root node, default to 1 */
 226         return 1;
 227 }
 228 EXPORT_SYMBOL(of_n_size_cells);
 229
 230 int of_set_property(struct device_node *dp, const char *name, void *val, int len)
 231 {
 232         struct property **prevp;
 233         void *new_val;
 234         int err;
 235
 236         new_val = kmalloc(len, GFP_KERNEL);
 237         if (!new_val)
 238                 return -ENOMEM;
 239
 240         memcpy(new_val, val, len);
 241
 242         err = -ENODEV;
 243
 244         write_lock(&devtree_lock);
 245         prevp = &dp->properties;
 246         while (*prevp) {
 247                 struct property *prop = *prevp;
 248
 249                 if (!strcasecmp(prop->name, name)) {
 250                         void *old_val = prop->value;
 251                         int ret;
 252
 253                         ret = prom_setprop(dp->node, name, val, len);
 254                         err = -EINVAL;
 255                         if (ret >= 0) {
 256                                 prop->value = new_val;
 257                                 prop->length = len;
 258
 259                                 if (OF_IS_DYNAMIC(prop))
 260                                         kfree(old_val);
 261
 262                                 OF_MARK_DYNAMIC(prop);
 263
 264                                 err = 0;
 265                         }
 266                         break;
 267                 }
 268                 prevp = &(*prevp)->next;
 269         }
 270         write_unlock(&devtree_lock);
 271
 272         /* XXX Upate procfs if necessary... */
 273
 274         return err;
 275 }
 276 EXPORT_SYMBOL(of_set_property);
 277
 278 static unsigned int prom_early_allocated;
 279
 280 static void * __init prom_early_alloc(unsigned long size)
 281 {
 282         void *ret;
 283
 284         ret = __alloc_bootmem(size, SMP_CACHE_BYTES, 0UL);
 285         if (ret != NULL)
 286                 memset(ret, 0, size);
 287
 288         prom_early_allocated += size;
 289
 290         return ret;
 291 }
 292
 293 #ifdef CONFIG_PCI
 294 /* PSYCHO interrupt mapping support. */
 295 #define PSYCHO_IMAP_A_SLOT0     0x0c00UL
 296 #define PSYCHO_IMAP_B_SLOT0     0x0c20UL
 297 static unsigned long psycho_pcislot_imap_offset(unsigned long ino)
 298 {
 299         unsigned int bus =  (ino & 0x10) >> 4;
 300         unsigned int slot = (ino & 0x0c) >> 2;
 301
 302         if (bus == 0)
 303                 return PSYCHO_IMAP_A_SLOT0 + (slot * 8);
 304         else
 305                 return PSYCHO_IMAP_B_SLOT0 + (slot * 8);
 306 }
 307
 308 #define PSYCHO_IMAP_SCSI        0x1000UL
 309 #define PSYCHO_IMAP_ETH         0x1008UL
 310 #define PSYCHO_IMAP_BPP         0x1010UL
 311 #define PSYCHO_IMAP_AU_REC      0x1018UL
 312 #define PSYCHO_IMAP_AU_PLAY     0x1020UL
 313 #define PSYCHO_IMAP_PFAIL       0x1028UL
 314 #define PSYCHO_IMAP_KMS         0x1030UL
 315 #define PSYCHO_IMAP_FLPY        0x1038UL
 316 #define PSYCHO_IMAP_SHW         0x1040UL
 317 #define PSYCHO_IMAP_KBD         0x1048UL
 318 #define PSYCHO_IMAP_MS          0x1050UL
 319 #define PSYCHO_IMAP_SER         0x1058UL
 320 #define PSYCHO_IMAP_TIM0        0x1060UL
 321 #define PSYCHO_IMAP_TIM1        0x1068UL
 322 #define PSYCHO_IMAP_UE          0x1070UL
 323 #define PSYCHO_IMAP_CE          0x1078UL
 324 #define PSYCHO_IMAP_A_ERR       0x1080UL
 325 #define PSYCHO_IMAP_B_ERR       0x1088UL
 326 #define PSYCHO_IMAP_PMGMT       0x1090UL
 327 #define PSYCHO_IMAP_GFX         0x1098UL
 328 #define PSYCHO_IMAP_EUPA        0x10a0UL
 329
 330 static unsigned long __psycho_onboard_imap_off[] = {
 331 /*0x20*/        PSYCHO_IMAP_SCSI,
 332 /*0x21*/        PSYCHO_IMAP_ETH,
 333 /*0x22*/        PSYCHO_IMAP_BPP,
 334 /*0x23*/        PSYCHO_IMAP_AU_REC,
 335 /*0x24*/        PSYCHO_IMAP_AU_PLAY,
 336 /*0x25*/        PSYCHO_IMAP_PFAIL,
 337 /*0x26*/        PSYCHO_IMAP_KMS,
 338 /*0x27*/        PSYCHO_IMAP_FLPY,
 339 /*0x28*/        PSYCHO_IMAP_SHW,
 340 /*0x29*/        PSYCHO_IMAP_KBD,
 341 /*0x2a*/        PSYCHO_IMAP_MS,
 342 /*0x2b*/        PSYCHO_IMAP_SER,
 343 /*0x2c*/        PSYCHO_IMAP_TIM0,
 344 /*0x2d*/        PSYCHO_IMAP_TIM1,
 345 /*0x2e*/        PSYCHO_IMAP_UE,
 346 /*0x2f*/        PSYCHO_IMAP_CE,
 347 /*0x30*/        PSYCHO_IMAP_A_ERR,
 348 /*0x31*/        PSYCHO_IMAP_B_ERR,
 349 /*0x32*/        PSYCHO_IMAP_PMGMT,
 350 /*0x33*/        PSYCHO_IMAP_GFX,
 351 /*0x34*/        PSYCHO_IMAP_EUPA,
 352 };
 353 #define PSYCHO_ONBOARD_IRQ_BASE         0x20
 354 #define PSYCHO_ONBOARD_IRQ_LAST         0x34
 355 #define psycho_onboard_imap_offset(__ino) \
 356         __psycho_onboard_imap_off[(__ino) - PSYCHO_ONBOARD_IRQ_BASE]
 357
 358 #define PSYCHO_ICLR_A_SLOT0     0x1400UL
 359 #define PSYCHO_ICLR_SCSI        0x1800UL
 360
 361 #define psycho_iclr_offset(ino)                                       \
 362         ((ino & 0x20) ? (PSYCHO_ICLR_SCSI + (((ino) & 0x1f) << 3)) :  \
 363                         (PSYCHO_ICLR_A_SLOT0 + (((ino) & 0x1f)<<3)))
 364
 365 static unsigned int psycho_irq_build(struct device_node *dp,
 366                                      unsigned int ino,
 367                                      void *_data)
 368 {
 369         unsigned long controller_regs = (unsigned long) _data;
 370         unsigned long imap, iclr;
 371         unsigned long imap_off, iclr_off;
 372         int inofixup = 0;
 373
 374         ino &= 0x3f;
 375         if (ino < PSYCHO_ONBOARD_IRQ_BASE) {
 376                 /* PCI slot */
 377                 imap_off = psycho_pcislot_imap_offset(ino);
 378         } else {
 379                 /* Onboard device */
 380                 if (ino > PSYCHO_ONBOARD_IRQ_LAST) {
 381                         prom_printf("psycho_irq_build: Wacky INO [%x]\n", ino);
 382                         prom_halt();
 383                 }
 384                 imap_off = psycho_onboard_imap_offset(ino);
 385         }
 386
 387         /* Now build the IRQ bucket. */
 388         imap = controller_regs + imap_off;
 389         imap += 4;
 390
 391         iclr_off = psycho_iclr_offset(ino);
 392         iclr = controller_regs + iclr_off;
 393         iclr += 4;
 394
 395         if ((ino & 0x20) == 0)
 396                 inofixup = ino & 0x03;
 397
 398         return build_irq(inofixup, iclr, imap);
 399 }
 400
 401 static void psycho_irq_trans_init(struct device_node *dp)
 402 {
 403         const struct linux_prom64_registers *regs;
 404
 405         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
 406         dp->irq_trans->irq_build = psycho_irq_build;
 407
 408         regs = of_get_property(dp, "reg", NULL);
 409         dp->irq_trans->data = (void *) regs[2].phys_addr;
 410 }
 411
 412 #define sabre_read(__reg) \
 413 ({      u64 __ret; \
 414         __asm__ __volatile__("ldxa [%1] %2, %0" \
 415                              : "=r" (__ret) \
 416                              : "r" (__reg), "i" (ASI_PHYS_BYPASS_EC_E) \
 417                              : "memory"); \
 418         __ret; \
 419 })
 420
 421 struct sabre_irq_data {
 422         unsigned long controller_regs;
 423         unsigned int pci_first_busno;
 424 };
 425 #define SABRE_CONFIGSPACE       0x001000000UL
 426 #define SABRE_WRSYNC            0x1c20UL
 427
 428 #define SABRE_CONFIG_BASE(CONFIG_SPACE) \
 429         (CONFIG_SPACE | (1UL << 24))
 430 #define SABRE_CONFIG_ENCODE(BUS, DEVFN, REG)    \
 431         (((unsigned long)(BUS)   << 16) |       \
 432          ((unsigned long)(DEVFN) << 8)  |       \
 433          ((unsigned long)(REG)))
 434
 435 /* When a device lives behind a bridge deeper in the PCI bus topology
 436  * than APB, a special sequence must run to make sure all pending DMA
 437  * transfers at the time of IRQ delivery are visible in the coherency
 438  * domain by the cpu.  This sequence is to perform a read on the far
 439  * side of the non-APB bridge, then perform a read of Sabre's DMA
 440  * write-sync register.
 441  */
 442 static void sabre_wsync_handler(unsigned int ino, void *_arg1, void *_arg2)
 443 {
 444         unsigned int phys_hi = (unsigned int) (unsigned long) _arg1;
 445         struct sabre_irq_data *irq_data = _arg2;
 446         unsigned long controller_regs = irq_data->controller_regs;
 447         unsigned long sync_reg = controller_regs + SABRE_WRSYNC;
 448         unsigned long config_space = controller_regs + SABRE_CONFIGSPACE;
 449         unsigned int bus, devfn;
 450         u16 _unused;
 451
 452         config_space = SABRE_CONFIG_BASE(config_space);
 453
 454         bus = (phys_hi >> 16) & 0xff;
 455         devfn = (phys_hi >> 8) & 0xff;
 456
 457         config_space |= SABRE_CONFIG_ENCODE(bus, devfn, 0x00);
 458
 459         __asm__ __volatile__("membar #Sync\n\t"
 460                              "lduha [%1] %2, %0\n\t"
 461                              "membar #Sync"
 462                              : "=r" (_unused)
 463                              : "r" ((u16 *) config_space),
 464                                "i" (ASI_PHYS_BYPASS_EC_E_L)
 465                              : "memory");
 466
 467         sabre_read(sync_reg);
 468 }
 469
 470 #define SABRE_IMAP_A_SLOT0      0x0c00UL
 471 #define SABRE_IMAP_B_SLOT0      0x0c20UL
 472 #define SABRE_IMAP_SCSI         0x1000UL
 473 #define SABRE_IMAP_ETH          0x1008UL
 474 #define SABRE_IMAP_BPP          0x1010UL
 475 #define SABRE_IMAP_AU_REC       0x1018UL
 476 #define SABRE_IMAP_AU_PLAY      0x1020UL
 477 #define SABRE_IMAP_PFAIL        0x1028UL
 478 #define SABRE_IMAP_KMS          0x1030UL
 479 #define SABRE_IMAP_FLPY         0x1038UL
 480 #define SABRE_IMAP_SHW          0x1040UL
 481 #define SABRE_IMAP_KBD          0x1048UL
 482 #define SABRE_IMAP_MS           0x1050UL
 483 #define SABRE_IMAP_SER          0x1058UL
 484 #define SABRE_IMAP_UE           0x1070UL
 485 #define SABRE_IMAP_CE           0x1078UL
 486 #define SABRE_IMAP_PCIERR       0x1080UL
 487 #define SABRE_IMAP_GFX          0x1098UL
 488 #define SABRE_IMAP_EUPA         0x10a0UL
 489 #define SABRE_ICLR_A_SLOT0      0x1400UL
 490 #define SABRE_ICLR_B_SLOT0      0x1480UL
 491 #define SABRE_ICLR_SCSI         0x1800UL
 492 #define SABRE_ICLR_ETH          0x1808UL
 493 #define SABRE_ICLR_BPP          0x1810UL
 494 #define SABRE_ICLR_AU_REC       0x1818UL
 495 #define SABRE_ICLR_AU_PLAY      0x1820UL
 496 #define SABRE_ICLR_PFAIL        0x1828UL
 497 #define SABRE_ICLR_KMS          0x1830UL
 498 #define SABRE_ICLR_FLPY         0x1838UL
 499 #define SABRE_ICLR_SHW          0x1840UL
 500 #define SABRE_ICLR_KBD          0x1848UL
 501 #define SABRE_ICLR_MS           0x1850UL
 502 #define SABRE_ICLR_SER          0x1858UL
 503 #define SABRE_ICLR_UE           0x1870UL
 504 #define SABRE_ICLR_CE           0x1878UL
 505 #define SABRE_ICLR_PCIERR       0x1880UL
 506
 507 static unsigned long sabre_pcislot_imap_offset(unsigned long ino)
 508 {
 509         unsigned int bus =  (ino & 0x10) >> 4;
 510         unsigned int slot = (ino & 0x0c) >> 2;
 511
 512         if (bus == 0)
 513                 return SABRE_IMAP_A_SLOT0 + (slot * 8);
 514         else
 515                 return SABRE_IMAP_B_SLOT0 + (slot * 8);
 516 }
 517
 518 static unsigned long __sabre_onboard_imap_off[] = {
 519 /*0x20*/        SABRE_IMAP_SCSI,
 520 /*0x21*/        SABRE_IMAP_ETH,
 521 /*0x22*/        SABRE_IMAP_BPP,
 522 /*0x23*/        SABRE_IMAP_AU_REC,
 523 /*0x24*/        SABRE_IMAP_AU_PLAY,
 524 /*0x25*/        SABRE_IMAP_PFAIL,
 525 /*0x26*/        SABRE_IMAP_KMS,
 526 /*0x27*/        SABRE_IMAP_FLPY,
 527 /*0x28*/        SABRE_IMAP_SHW,
 528 /*0x29*/        SABRE_IMAP_KBD,
 529 /*0x2a*/        SABRE_IMAP_MS,
 530 /*0x2b*/        SABRE_IMAP_SER,
 531 /*0x2c*/        0 /* reserved */,
 532 /*0x2d*/        0 /* reserved */,
 533 /*0x2e*/        SABRE_IMAP_UE,
 534 /*0x2f*/        SABRE_IMAP_CE,
 535 /*0x30*/        SABRE_IMAP_PCIERR,
 536 /*0x31*/        0 /* reserved */,
 537 /*0x32*/        0 /* reserved */,
 538 /*0x33*/        SABRE_IMAP_GFX,
 539 /*0x34*/        SABRE_IMAP_EUPA,
 540 };
 541 #define SABRE_ONBOARD_IRQ_BASE          0x20
 542 #define SABRE_ONBOARD_IRQ_LAST          0x30
 543 #define sabre_onboard_imap_offset(__ino) \
 544         __sabre_onboard_imap_off[(__ino) - SABRE_ONBOARD_IRQ_BASE]
 545
 546 #define sabre_iclr_offset(ino)                                        \
 547         ((ino & 0x20) ? (SABRE_ICLR_SCSI + (((ino) & 0x1f) << 3)) :  \
 548                         (SABRE_ICLR_A_SLOT0 + (((ino) & 0x1f)<<3)))
 549
 550 static int sabre_device_needs_wsync(struct device_node *dp)
 551 {
 552         struct device_node *parent = dp->parent;
 553         const char *parent_model, *parent_compat;
 554
 555         /* This traversal up towards the root is meant to
 556          * handle two cases:
 557          *
 558          * 1) non-PCI bus sitting under PCI, such as 'ebus'
 559          * 2) the PCI controller interrupts themselves, which
 560          *    will use the sabre_irq_build but do not need
 561          *    the DMA synchronization handling
 562          */
 563         while (parent) {
 564                 if (!strcmp(parent->type, "pci"))
 565                         break;
 566                 parent = parent->parent;
 567         }
 568
 569         if (!parent)
 570                 return 0;
 571
 572         parent_model = of_get_property(parent,
 573                                        "model", NULL);
 574         if (parent_model &&
 575             (!strcmp(parent_model, "SUNW,sabre") ||
 576              !strcmp(parent_model, "SUNW,simba")))
 577                 return 0;
 578
 579         parent_compat = of_get_property(parent,
 580                                         "compatible", NULL);
 581         if (parent_compat &&
 582             (!strcmp(parent_compat, "pci108e,a000") ||
 583              !strcmp(parent_compat, "pci108e,a001")))
 584                 return 0;
 585
 586         return 1;
 587 }
 588
 589 static unsigned int sabre_irq_build(struct device_node *dp,
 590                                     unsigned int ino,
 591                                     void *_data)
 592 {
 593         struct sabre_irq_data *irq_data = _data;
 594         unsigned long controller_regs = irq_data->controller_regs;
 595         const struct linux_prom_pci_registers *regs;
 596         unsigned long imap, iclr;
 597         unsigned long imap_off, iclr_off;
 598         int inofixup = 0;
 599         int virt_irq;
 600
 601         ino &= 0x3f;
 602         if (ino < SABRE_ONBOARD_IRQ_BASE) {
 603                 /* PCI slot */
 604                 imap_off = sabre_pcislot_imap_offset(ino);
 605         } else {
 606                 /* onboard device */
 607                 if (ino > SABRE_ONBOARD_IRQ_LAST) {
 608                         prom_printf("sabre_irq_build: Wacky INO [%x]\n", ino);
 609                         prom_halt();
 610                 }
 611                 imap_off = sabre_onboard_imap_offset(ino);
 612         }
 613
 614         /* Now build the IRQ bucket. */
 615         imap = controller_regs + imap_off;
 616         imap += 4;
 617
 618         iclr_off = sabre_iclr_offset(ino);
 619         iclr = controller_regs + iclr_off;
 620         iclr += 4;
 621
 622         if ((ino & 0x20) == 0)
 623                 inofixup = ino & 0x03;
 624
 625         virt_irq = build_irq(inofixup, iclr, imap);
 626
 627         /* If the parent device is a PCI<->PCI bridge other than
 628          * APB, we have to install a pre-handler to ensure that
 629          * all pending DMA is drained before the interrupt handler
 630          * is run.
 631          */
 632         regs = of_get_property(dp, "reg", NULL);
 633         if (regs && sabre_device_needs_wsync(dp)) {
 634                 irq_install_pre_handler(virt_irq,
 635                                         sabre_wsync_handler,
 636                                         (void *) (long) regs->phys_hi,
 637                                         (void *) irq_data);
 638         }
 639
 640         return virt_irq;
 641 }
 642
 643 static void sabre_irq_trans_init(struct device_node *dp)
 644 {
 645         const struct linux_prom64_registers *regs;
 646         struct sabre_irq_data *irq_data;
 647         const u32 *busrange;
 648
 649         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
 650         dp->irq_trans->irq_build = sabre_irq_build;
 651
 652         irq_data = prom_early_alloc(sizeof(struct sabre_irq_data));
 653
 654         regs = of_get_property(dp, "reg", NULL);
 655         irq_data->controller_regs = regs[0].phys_addr;
 656
 657         busrange = of_get_property(dp, "bus-range", NULL);
 658         irq_data->pci_first_busno = busrange[0];
 659
 660         dp->irq_trans->data = irq_data;
 661 }
 662
 663 /* SCHIZO interrupt mapping support.  Unlike Psycho, for this controller the
 664  * imap/iclr registers are per-PBM.
 665  */
 666 #define SCHIZO_IMAP_BASE        0x1000UL
 667 #define SCHIZO_ICLR_BASE        0x1400UL
 668
 669 static unsigned long schizo_imap_offset(unsigned long ino)
 670 {
 671         return SCHIZO_IMAP_BASE + (ino * 8UL);
 672 }
 673
 674 static unsigned long schizo_iclr_offset(unsigned long ino)
 675 {
 676         return SCHIZO_ICLR_BASE + (ino * 8UL);
 677 }
 678
 679 static unsigned long schizo_ino_to_iclr(unsigned long pbm_regs,
 680                                         unsigned int ino)
 681 {
 682         return pbm_regs + schizo_iclr_offset(ino) + 4;
 683 }
 684
 685 static unsigned long schizo_ino_to_imap(unsigned long pbm_regs,
 686                                         unsigned int ino)
 687 {
 688         return pbm_regs + schizo_imap_offset(ino) + 4;
 689 }
 690
 691 #define schizo_read(__reg) \
 692 ({      u64 __ret; \
 693         __asm__ __volatile__("ldxa [%1] %2, %0" \
 694                              : "=r" (__ret) \
 695                              : "r" (__reg), "i" (ASI_PHYS_BYPASS_EC_E) \
 696                              : "memory"); \
 697         __ret; \
 698 })
 699 #define schizo_write(__reg, __val) \
 700         __asm__ __volatile__("stxa %0, [%1] %2" \
 701                              : /* no outputs */ \
 702                              : "r" (__val), "r" (__reg), \
 703                                "i" (ASI_PHYS_BYPASS_EC_E) \
 704                              : "memory")
 705
 706 static void tomatillo_wsync_handler(unsigned int ino, void *_arg1, void *_arg2)
 707 {
 708         unsigned long sync_reg = (unsigned long) _arg2;
 709         u64 mask = 1UL << (ino & IMAP_INO);
 710         u64 val;
 711         int limit;
 712
 713         schizo_write(sync_reg, mask);
 714
 715         limit = 100000;
 716         val = 0;
 717         while (--limit) {
 718                 val = schizo_read(sync_reg);
 719                 if (!(val & mask))
 720                         break;
 721         }
 722         if (limit <= 0) {
 723                 printk("tomatillo_wsync_handler: DMA won't sync [%lx:%lx]\n",
 724                        val, mask);
 725         }
 726
 727         if (_arg1) {
 728                 static unsigned char cacheline[64]
 729                         __attribute__ ((aligned (64)));
 730
 731                 __asm__ __volatile__("rd %%fprs, %0\n\t"
 732                                      "or %0, %4, %1\n\t"
 733                                      "wr %1, 0x0, %%fprs\n\t"
 734                                      "stda %%f0, [%5] %6\n\t"
 735                                      "wr %0, 0x0, %%fprs\n\t"
 736                                      "membar #Sync"
 737                                      : "=&r" (mask), "=&r" (val)
 738                                      : "0" (mask), "1" (val),
 739                                      "i" (FPRS_FEF), "r" (&cacheline[0]),
 740                                      "i" (ASI_BLK_COMMIT_P));
 741         }
 742 }
 743
 744 struct schizo_irq_data {
 745         unsigned long pbm_regs;
 746         unsigned long sync_reg;
 747         u32 portid;
 748         int chip_version;
 749 };
 750
 751 static unsigned int schizo_irq_build(struct device_node *dp,
 752                                      unsigned int ino,
 753                                      void *_data)
 754 {
 755         struct schizo_irq_data *irq_data = _data;
 756         unsigned long pbm_regs = irq_data->pbm_regs;
 757         unsigned long imap, iclr;
 758         int ign_fixup;
 759         int virt_irq;
 760         int is_tomatillo;
 761
 762         ino &= 0x3f;
 763
 764         /* Now build the IRQ bucket. */
 765         imap = schizo_ino_to_imap(pbm_regs, ino);
 766         iclr = schizo_ino_to_iclr(pbm_regs, ino);
 767
 768         /* On Schizo, no inofixup occurs.  This is because each
 769          * INO has it's own IMAP register.  On Psycho and Sabre
 770          * there is only one IMAP register for each PCI slot even
 771          * though four different INOs can be generated by each
 772          * PCI slot.
 773          *
 774          * But, for JBUS variants (essentially, Tomatillo), we have
 775          * to fixup the lowest bit of the interrupt group number.
 776          */
 777         ign_fixup = 0;
 778
 779         is_tomatillo = (irq_data->sync_reg != 0UL);
 780
 781         if (is_tomatillo) {
 782                 if (irq_data->portid & 1)
 783                         ign_fixup = (1 << 6);
 784         }
 785
 786         virt_irq = build_irq(ign_fixup, iclr, imap);
 787
 788         if (is_tomatillo) {
 789                 irq_install_pre_handler(virt_irq,
 790                                         tomatillo_wsync_handler,
 791                                         ((irq_data->chip_version <= 4) ?
 792                                          (void *) 1 : (void *) 0),
 793                                         (void *) irq_data->sync_reg);
 794         }
 795
 796         return virt_irq;
 797 }
 798
 799 static void __schizo_irq_trans_init(struct device_node *dp, int is_tomatillo)
 800 {
 801         const struct linux_prom64_registers *regs;
 802         struct schizo_irq_data *irq_data;
 803
 804         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
 805         dp->irq_trans->irq_build = schizo_irq_build;
 806
 807         irq_data = prom_early_alloc(sizeof(struct schizo_irq_data));
 808
 809         regs = of_get_property(dp, "reg", NULL);
 810         dp->irq_trans->data = irq_data;
 811
 812         irq_data->pbm_regs = regs[0].phys_addr;
 813         if (is_tomatillo)
 814                 irq_data->sync_reg = regs[3].phys_addr + 0x1a18UL;
 815         else
 816                 irq_data->sync_reg = 0UL;
 817         irq_data->portid = of_getintprop_default(dp, "portid", 0);
 818         irq_data->chip_version = of_getintprop_default(dp, "version#", 0);
 819 }
 820
 821 static void schizo_irq_trans_init(struct device_node *dp)
 822 {
 823         __schizo_irq_trans_init(dp, 0);
 824 }
 825
 826 static void tomatillo_irq_trans_init(struct device_node *dp)
 827 {
 828         __schizo_irq_trans_init(dp, 1);
 829 }
 830
 831 static unsigned int pci_sun4v_irq_build(struct device_node *dp,
 832                                         unsigned int devino,
 833                                         void *_data)
 834 {
 835         u32 devhandle = (u32) (unsigned long) _data;
 836
 837         return sun4v_build_irq(devhandle, devino);
 838 }
 839
 840 static void pci_sun4v_irq_trans_init(struct device_node *dp)
 841 {
 842         const struct linux_prom64_registers *regs;
 843
 844         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
 845         dp->irq_trans->irq_build = pci_sun4v_irq_build;
 846
 847         regs = of_get_property(dp, "reg", NULL);
 848         dp->irq_trans->data = (void *) (unsigned long)
 849                 ((regs->phys_addr >> 32UL) & 0x0fffffff);
 850 }
 851 #endif /* CONFIG_PCI */
 852
 853 #ifdef CONFIG_SBUS
 854 /* INO number to IMAP register offset for SYSIO external IRQ's.
 855  * This should conform to both Sunfire/Wildfire server and Fusion
 856  * desktop designs.
 857  */
 858 #define SYSIO_IMAP_SLOT0        0x2c04UL
 859 #define SYSIO_IMAP_SLOT1        0x2c0cUL
 860 #define SYSIO_IMAP_SLOT2        0x2c14UL
 861 #define SYSIO_IMAP_SLOT3        0x2c1cUL
 862 #define SYSIO_IMAP_SCSI         0x3004UL
 863 #define SYSIO_IMAP_ETH          0x300cUL
 864 #define SYSIO_IMAP_BPP          0x3014UL
 865 #define SYSIO_IMAP_AUDIO        0x301cUL
 866 #define SYSIO_IMAP_PFAIL        0x3024UL
 867 #define SYSIO_IMAP_KMS          0x302cUL
 868 #define SYSIO_IMAP_FLPY         0x3034UL
 869 #define SYSIO_IMAP_SHW          0x303cUL
 870 #define SYSIO_IMAP_KBD          0x3044UL
 871 #define SYSIO_IMAP_MS           0x304cUL
 872 #define SYSIO_IMAP_SER          0x3054UL
 873 #define SYSIO_IMAP_TIM0         0x3064UL
 874 #define SYSIO_IMAP_TIM1         0x306cUL
 875 #define SYSIO_IMAP_UE           0x3074UL
 876 #define SYSIO_IMAP_CE           0x307cUL
 877 #define SYSIO_IMAP_SBERR        0x3084UL
 878 #define SYSIO_IMAP_PMGMT        0x308cUL
 879 #define SYSIO_IMAP_GFX          0x3094UL
 880 #define SYSIO_IMAP_EUPA         0x309cUL
 881
 882 #define bogon     ((unsigned long) -1)
 883 static unsigned long sysio_irq_offsets[] = {
 884         /* SBUS Slot 0 --> 3, level 1 --> 7 */
 885         SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0,
 886         SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0,
 887         SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1,
 888         SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1,
 889         SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2,
 890         SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2,
 891         SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3,
 892         SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3,
 893
 894         /* Onboard devices (not relevant/used on SunFire). */
 895         SYSIO_IMAP_SCSI,
 896         SYSIO_IMAP_ETH,
 897         SYSIO_IMAP_BPP,
 898         bogon,
 899         SYSIO_IMAP_AUDIO,
 900         SYSIO_IMAP_PFAIL,
 901         bogon,
 902         bogon,
 903         SYSIO_IMAP_KMS,
 904         SYSIO_IMAP_FLPY,
 905         SYSIO_IMAP_SHW,
 906         SYSIO_IMAP_KBD,
 907         SYSIO_IMAP_MS,
 908         SYSIO_IMAP_SER,
 909         bogon,
 910         bogon,
 911         SYSIO_IMAP_TIM0,
 912         SYSIO_IMAP_TIM1,
 913         bogon,
 914         bogon,
 915         SYSIO_IMAP_UE,
 916         SYSIO_IMAP_CE,
 917         SYSIO_IMAP_SBERR,
 918         SYSIO_IMAP_PMGMT,
 919         SYSIO_IMAP_GFX,
 920         SYSIO_IMAP_EUPA,
 921 };
 922
 923 #undef bogon
 924
 925 #define NUM_SYSIO_OFFSETS ARRAY_SIZE(sysio_irq_offsets)
 926
 927 /* Convert Interrupt Mapping register pointer to associated
 928  * Interrupt Clear register pointer, SYSIO specific version.
 929  */
 930 #define SYSIO_ICLR_UNUSED0      0x3400UL
 931 #define SYSIO_ICLR_SLOT0        0x340cUL
 932 #define SYSIO_ICLR_SLOT1        0x344cUL
 933 #define SYSIO_ICLR_SLOT2        0x348cUL
 934 #define SYSIO_ICLR_SLOT3        0x34ccUL
 935 static unsigned long sysio_imap_to_iclr(unsigned long imap)
 936 {
 937         unsigned long diff = SYSIO_ICLR_UNUSED0 - SYSIO_IMAP_SLOT0;
 938         return imap + diff;
 939 }
 940
 941 static unsigned int sbus_of_build_irq(struct device_node *dp,
 942                                       unsigned int ino,
 943                                       void *_data)
 944 {
 945         unsigned long reg_base = (unsigned long) _data;
 946         const struct linux_prom_registers *regs;
 947         unsigned long imap, iclr;
 948         int sbus_slot = 0;
 949         int sbus_level = 0;
 950
 951         ino &= 0x3f;
 952
 953         regs = of_get_property(dp, "reg", NULL);
 954         if (regs)
 955                 sbus_slot = regs->which_io;
 956
 957         if (ino < 0x20)
 958                 ino += (sbus_slot * 8);
 959
 960         imap = sysio_irq_offsets[ino];
 961         if (imap == ((unsigned long)-1)) {
 962                 prom_printf("get_irq_translations: Bad SYSIO INO[%x]\n",
 963                             ino);
 964                 prom_halt();
 965         }
 966         imap += reg_base;
 967
 968         /* SYSIO inconsistency.  For external SLOTS, we have to select
 969          * the right ICLR register based upon the lower SBUS irq level
 970          * bits.
 971          */
 972         if (ino >= 0x20) {
 973                 iclr = sysio_imap_to_iclr(imap);
 974         } else {
 975                 sbus_level = ino & 0x7;
 976
 977                 switch(sbus_slot) {
 978                 case 0:
 979                         iclr = reg_base + SYSIO_ICLR_SLOT0;
 980                         break;
 981                 case 1:
 982                         iclr = reg_base + SYSIO_ICLR_SLOT1;
 983                         break;
 984                 case 2:
 985                         iclr = reg_base + SYSIO_ICLR_SLOT2;
 986                         break;
 987                 default:
 988                 case 3:
 989                         iclr = reg_base + SYSIO_ICLR_SLOT3;
 990                         break;
 991                 };
 992
 993                 iclr += ((unsigned long)sbus_level - 1UL) * 8UL;
 994         }
 995         return build_irq(sbus_level, iclr, imap);
 996 }
 997
 998 static void sbus_irq_trans_init(struct device_node *dp)
 999 {
1000         const struct linux_prom64_registers *regs;
1001
1002         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
1003         dp->irq_trans->irq_build = sbus_of_build_irq;
1004
1005         regs = of_get_property(dp, "reg", NULL);
1006         dp->irq_trans->data = (void *) (unsigned long) regs->phys_addr;
1007 }
1008 #endif /* CONFIG_SBUS */
1009
1010
1011 static unsigned int central_build_irq(struct device_node *dp,
1012                                       unsigned int ino,
1013                                       void *_data)
1014 {
1015         struct device_node *central_dp = _data;
1016         struct of_device *central_op = of_find_device_by_node(central_dp);
1017         struct resource *res;
1018         unsigned long imap, iclr;
1019         u32 tmp;
1020
1021         if (!strcmp(dp->name, "eeprom")) {
1022                 res = &central_op->resource[5];
1023         } else if (!strcmp(dp->name, "zs")) {
1024                 res = &central_op->resource[4];
1025         } else if (!strcmp(dp->name, "clock-board")) {
1026                 res = &central_op->resource[3];
1027         } else {
1028                 return ino;
1029         }
1030
1031         imap = res->start + 0x00UL;
1032         iclr = res->start + 0x10UL;
1033
1034         /* Set the INO state to idle, and disable.  */
1035         upa_writel(0, iclr);
1036         upa_readl(iclr);
1037
1038         tmp = upa_readl(imap);
1039         tmp &= ~0x80000000;
1040         upa_writel(tmp, imap);
1041
1042         return build_irq(0, iclr, imap);
1043 }
1044
1045 static void central_irq_trans_init(struct device_node *dp)
1046 {
1047         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
1048         dp->irq_trans->irq_build = central_build_irq;
1049
1050         dp->irq_trans->data = dp;
1051 }
1052
1053 struct irq_trans {
1054         const char *name;
1055         void (*init)(struct device_node *);
1056 };
1057
1058 #ifdef CONFIG_PCI
1059 static struct irq_trans pci_irq_trans_table[] = {
1060         { "SUNW,sabre", sabre_irq_trans_init },
1061         { "pci108e,a000", sabre_irq_trans_init },
1062         { "pci108e,a001", sabre_irq_trans_init },
1063         { "SUNW,psycho", psycho_irq_trans_init },
1064         { "pci108e,8000", psycho_irq_trans_init },
1065         { "SUNW,schizo", schizo_irq_trans_init },
1066         { "pci108e,8001", schizo_irq_trans_init },
1067         { "SUNW,schizo+", schizo_irq_trans_init },
1068         { "pci108e,8002", schizo_irq_trans_init },
1069         { "SUNW,tomatillo", tomatillo_irq_trans_init },
1070         { "pci108e,a801", tomatillo_irq_trans_init },
1071         { "SUNW,sun4v-pci", pci_sun4v_irq_trans_init },
1072 };
1073 #endif
1074
1075 static unsigned int sun4v_vdev_irq_build(struct device_node *dp,
1076                                          unsigned int devino,
1077                                          void *_data)
1078 {
1079         u32 devhandle = (u32) (unsigned long) _data;
1080
1081         return sun4v_build_irq(devhandle, devino);
1082 }
1083
1084 static void sun4v_vdev_irq_trans_init(struct device_node *dp)
1085 {
1086         const struct linux_prom64_registers *regs;
1087
1088         dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
1089         dp->irq_trans->irq_build = sun4v_vdev_irq_build;
1090
1091         regs = of_get_property(dp, "reg", NULL);
1092         dp->irq_trans->data = (void *) (unsigned long)
1093                 ((regs->phys_addr >> 32UL) & 0x0fffffff);
1094 }
1095
1096 static void irq_trans_init(struct device_node *dp)
1097 {
1098 #ifdef CONFIG_PCI
1099         const char *model;
1100         int i;
1101 #endif
1102
1103 #ifdef CONFIG_PCI
1104         model = of_get_property(dp, "model", NULL);
1105         if (!model)
1106                 model = of_get_property(dp, "compatible", NULL);
1107         if (model) {
1108                 for (i = 0; i < ARRAY_SIZE(pci_irq_trans_table); i++) {
1109                         struct irq_trans *t = &pci_irq_trans_table[i];
1110
1111                         if (!strcmp(model, t->name))
1112                                 return t->init(dp);
1113                 }
1114         }
1115 #endif
1116 #ifdef CONFIG_SBUS
1117         if (!strcmp(dp->name, "sbus") ||
1118             !strcmp(dp->name, "sbi"))
1119                 return sbus_irq_trans_init(dp);
1120 #endif
1121         if (!strcmp(dp->name, "fhc") &&
1122             !strcmp(dp->parent->name, "central"))
1123                 return central_irq_trans_init(dp);
1124         if (!strcmp(dp->name, "virtual-devices"))
1125                 return sun4v_vdev_irq_trans_init(dp);
1126 }
1127
1128 static int is_root_node(const struct device_node *dp)
1129 {
1130         if (!dp)
1131                 return 0;
1132
1133         return (dp->parent == NULL);
1134 }
1135
1136 /* The following routines deal with the black magic of fully naming a
1137  * node.
1138  *
1139  * Certain well known named nodes are just the simple name string.
1140  *
1141  * Actual devices have an address specifier appended to the base name
1142  * string, like this "foo@addr".  The "addr" can be in any number of
1143  * formats, and the platform plus the type of the node determine the
1144  * format and how it is constructed.
1145  *
1146  * For children of the ROOT node, the naming convention is fixed and
1147  * determined by whether this is a sun4u or sun4v system.
1148  *
1149  * For children of other nodes, it is bus type specific.  So
1150  * we walk up the tree until we discover a "device_type" property
1151  * we recognize and we go from there.
1152  *
1153  * As an example, the boot device on my workstation has a full path:
1154  *
1155  *      /pci@1e,600000/ide@d/disk@0,0:c
1156  */
1157 static void __init sun4v_path_component(struct device_node *dp, char *tmp_buf)
1158 {
1159         struct linux_prom64_registers *regs;
1160         struct property *rprop;
1161         u32 high_bits, low_bits, type;
1162
1163         rprop = of_find_property(dp, "reg", NULL);
1164         if (!rprop)
1165                 return;
1166
1167         regs = rprop->value;
1168         if (!is_root_node(dp->parent)) {
1169                 sprintf(tmp_buf, "%s@%x,%x",
1170                         dp->name,
1171                         (unsigned int) (regs->phys_addr >> 32UL),
1172                         (unsigned int) (regs->phys_addr & 0xffffffffUL));
1173                 return;
1174         }
1175
1176         type = regs->phys_addr >> 60UL;
1177         high_bits = (regs->phys_addr >> 32UL) & 0x0fffffffUL;
1178         low_bits = (regs->phys_addr & 0xffffffffUL);
1179
1180         if (type == 0 || type == 8) {
1181                 const char *prefix = (type == 0) ? "m" : "i";
1182
1183                 if (low_bits)
1184                         sprintf(tmp_buf, "%s@%s%x,%x",
1185                                 dp->name, prefix,
1186                                 high_bits, low_bits);
1187                 else
1188                         sprintf(tmp_buf, "%s@%s%x",
1189                                 dp->name,
1190                                 prefix,
1191                                 high_bits);
1192         } else if (type == 12) {
1193                 sprintf(tmp_buf, "%s@%x",
1194                         dp->name, high_bits);
1195         }
1196 }
1197
1198 static void __init sun4u_path_component(struct device_node *dp, char *tmp_buf)
1199 {
1200         struct linux_prom64_registers *regs;
1201         struct property *prop;
1202
1203         prop = of_find_property(dp, "reg", NULL);
1204         if (!prop)
1205                 return;
1206
1207         regs = prop->value;
1208         if (!is_root_node(dp->parent)) {
1209                 sprintf(tmp_buf, "%s@%x,%x",
1210                         dp->name,
1211                         (unsigned int) (regs->phys_addr >> 32UL),
1212                         (unsigned int) (regs->phys_addr & 0xffffffffUL));
1213                 return;
1214         }
1215
1216         prop = of_find_property(dp, "upa-portid", NULL);
1217         if (!prop)
1218                 prop = of_find_property(dp, "portid", NULL);
1219         if (prop) {
1220                 unsigned long mask = 0xffffffffUL;
1221
1222                 if (tlb_type >= cheetah)
1223                         mask = 0x7fffff;
1224
1225                 sprintf(tmp_buf, "%s@%x,%x",
1226                         dp->name,
1227                         *(u32 *)prop->value,
1228                         (unsigned int) (regs->phys_addr & mask));
1229         }
1230 }
1231
1232 /* "name@slot,offset"  */
1233 static void __init sbus_path_component(struct device_node *dp, char *tmp_buf)
1234 {
1235         struct linux_prom_registers *regs;
1236         struct property *prop;
1237
1238         prop = of_find_property(dp, "reg", NULL);
1239         if (!prop)
1240                 return;
1241
1242         regs = prop->value;
1243         sprintf(tmp_buf, "%s@%x,%x",
1244                 dp->name,
1245                 regs->which_io,
1246                 regs->phys_addr);
1247 }
1248
1249 /* "name@devnum[,func]" */
1250 static void __init pci_path_component(struct device_node *dp, char *tmp_buf)
1251 {
1252         struct linux_prom_pci_registers *regs;
1253         struct property *prop;
1254         unsigned int devfn;
1255
1256         prop = of_find_property(dp, "reg", NULL);
1257         if (!prop)
1258                 return;
1259
1260         regs = prop->value;
1261         devfn = (regs->phys_hi >> 8) & 0xff;
1262         if (devfn & 0x07) {
1263                 sprintf(tmp_buf, "%s@%x,%x",
1264                         dp->name,
1265                         devfn >> 3,
1266                         devfn & 0x07);
1267         } else {
1268                 sprintf(tmp_buf, "%s@%x",
1269                         dp->name,
1270                         devfn >> 3);
1271         }
1272 }
1273
1274 /* "name@UPA_PORTID,offset" */
1275 static void __init upa_path_component(struct device_node *dp, char *tmp_buf)
1276 {
1277         struct linux_prom64_registers *regs;
1278         struct property *prop;
1279
1280         prop = of_find_property(dp, "reg", NULL);
1281         if (!prop)
1282                 return;
1283
1284         regs = prop->value;
1285
1286         prop = of_find_property(dp, "upa-portid", NULL);
1287         if (!prop)
1288                 return;
1289
1290         sprintf(tmp_buf, "%s@%x,%x",
1291                 dp->name,
1292                 *(u32 *) prop->value,
1293                 (unsigned int) (regs->phys_addr & 0xffffffffUL));
1294 }
1295
1296 /* "name@reg" */
1297 static void __init vdev_path_component(struct device_node *dp, char *tmp_buf)
1298 {
1299         struct property *prop;
1300         u32 *regs;
1301
1302         prop = of_find_property(dp, "reg", NULL);
1303         if (!prop)
1304                 return;
1305
1306         regs = prop->value;
1307
1308         sprintf(tmp_buf, "%s@%x", dp->name, *regs);
1309 }
1310
1311 /* "name@addrhi,addrlo" */
1312 static void __init ebus_path_component(struct device_node *dp, char *tmp_buf)
1313 {
1314         struct linux_prom64_registers *regs;
1315         struct property *prop;
1316
1317         prop = of_find_property(dp, "reg", NULL);
1318         if (!prop)
1319                 return;
1320
1321         regs = prop->value;
1322
1323         sprintf(tmp_buf, "%s@%x,%x",
1324                 dp->name,
1325                 (unsigned int) (regs->phys_addr >> 32UL),
1326                 (unsigned int) (regs->phys_addr & 0xffffffffUL));
1327 }
1328
1329 /* "name@bus,addr" */
1330 static void __init i2c_path_component(struct device_node *dp, char *tmp_buf)
1331 {
1332         struct property *prop;
1333         u32 *regs;
1334
1335         prop = of_find_property(dp, "reg", NULL);
1336         if (!prop)
1337                 return;
1338
1339         regs = prop->value;
1340
1341         /* This actually isn't right... should look at the #address-cells
1342          * property of the i2c bus node etc. etc.
1343          */
1344         sprintf(tmp_buf, "%s@%x,%x",
1345                 dp->name, regs[0], regs[1]);
1346 }
1347
1348 /* "name@reg0[,reg1]" */
1349 static void __init usb_path_component(struct device_node *dp, char *tmp_buf)
1350 {
1351         struct property *prop;
1352         u32 *regs;
1353
1354         prop = of_find_property(dp, "reg", NULL);
1355         if (!prop)
1356                 return;
1357
1358         regs = prop->value;
1359
1360         if (prop->length == sizeof(u32) || regs[1] == 1) {
1361                 sprintf(tmp_buf, "%s@%x",
1362                         dp->name, regs[0]);
1363         } else {
1364                 sprintf(tmp_buf, "%s@%x,%x",
1365                         dp->name, regs[0], regs[1]);
1366         }
1367 }
1368
1369 /* "name@reg0reg1[,reg2reg3]" */
1370 static void __init ieee1394_path_component(struct device_node *dp, char *tmp_buf)
1371 {
1372         struct property *prop;
1373         u32 *regs;
1374
1375         prop = of_find_property(dp, "reg", NULL);
1376         if (!prop)
1377                 return;
1378
1379         regs = prop->value;
1380
1381         if (regs[2] || regs[3]) {
1382                 sprintf(tmp_buf, "%s@%08x%08x,%04x%08x",
1383                         dp->name, regs[0], regs[1], regs[2], regs[3]);
1384         } else {
1385                 sprintf(tmp_buf, "%s@%08x%08x",
1386                         dp->name, regs[0], regs[1]);
1387         }
1388 }
1389
1390 static void __init __build_path_component(struct device_node *dp, char *tmp_buf)
1391 {
1392         struct device_node *parent = dp->parent;
1393
1394         if (parent != NULL) {
1395                 if (!strcmp(parent->type, "pci") ||
1396                     !strcmp(parent->type, "pciex"))
1397                         return pci_path_component(dp, tmp_buf);
1398                 if (!strcmp(parent->type, "sbus"))
1399                         return sbus_path_component(dp, tmp_buf);
1400                 if (!strcmp(parent->type, "upa"))
1401                         return upa_path_component(dp, tmp_buf);
1402                 if (!strcmp(parent->type, "ebus"))
1403                         return ebus_path_component(dp, tmp_buf);
1404                 if (!strcmp(parent->name, "usb") ||
1405                     !strcmp(parent->name, "hub"))
1406                         return usb_path_component(dp, tmp_buf);
1407                 if (!strcmp(parent->type, "i2c"))
1408                         return i2c_path_component(dp, tmp_buf);
1409                 if (!strcmp(parent->type, "firewire"))
1410                         return ieee1394_path_component(dp, tmp_buf);
1411                 if (!strcmp(parent->type, "virtual-devices"))
1412                         return vdev_path_component(dp, tmp_buf);
1413
1414                 /* "isa" is handled with platform naming */
1415         }
1416
1417         /* Use platform naming convention.  */
1418         if (tlb_type == hypervisor)
1419                 return sun4v_path_component(dp, tmp_buf);
1420         else
1421                 return sun4u_path_component(dp, tmp_buf);
1422 }
1423
1424 static char * __init build_path_component(struct device_node *dp)
1425 {
1426         char tmp_buf[64], *n;
1427
1428         tmp_buf[0] = '\0';
1429         __build_path_component(dp, tmp_buf);
1430         if (tmp_buf[0] == '\0')
1431                 strcpy(tmp_buf, dp->name);
1432
1433         n = prom_early_alloc(strlen(tmp_buf) + 1);
1434         strcpy(n, tmp_buf);
1435
1436         return n;
1437 }
1438
1439 static char * __init build_full_name(struct device_node *dp)
1440 {
1441         int len, ourlen, plen;
1442         char *n;
1443
1444         plen = strlen(dp->parent->full_name);
1445         ourlen = strlen(dp->path_component_name);
1446         len = ourlen + plen + 2;
1447
1448         n = prom_early_alloc(len);
1449         strcpy(n, dp->parent->full_name);
1450         if (!is_root_node(dp->parent)) {
1451                 strcpy(n + plen, "/");
1452                 plen++;
1453         }
1454         strcpy(n + plen, dp->path_component_name);
1455
1456         return n;
1457 }
1458
1459 static unsigned int unique_id;
1460
1461 static struct property * __init build_one_prop(phandle node, char *prev, char *special_name, void *special_val, int special_len)
1462 {
1463         static struct property *tmp = NULL;
1464         struct property *p;
1465
1466         if (tmp) {
1467                 p = tmp;
1468                 memset(p, 0, sizeof(*p) + 32);
1469                 tmp = NULL;
1470         } else {
1471                 p = prom_early_alloc(sizeof(struct property) + 32);
1472                 p->unique_id = unique_id++;
1473         }
1474
1475         p->name = (char *) (p + 1);
1476         if (special_name) {
1477                 strcpy(p->name, special_name);
1478                 p->length = special_len;
1479                 p->value = prom_early_alloc(special_len);
1480                 memcpy(p->value, special_val, special_len);
1481         } else {
1482                 if (prev == NULL) {
1483                         prom_firstprop(node, p->name);
1484                 } else {
1485                         prom_nextprop(node, prev, p->name);
1486                 }
1487                 if (strlen(p->name) == 0) {
1488                         tmp = p;
1489                         return NULL;
1490                 }
1491                 p->length = prom_getproplen(node, p->name);
1492                 if (p->length <= 0) {
1493                         p->length = 0;
1494                 } else {
1495                         p->value = prom_early_alloc(p->length + 1);
1496                         prom_getproperty(node, p->name, p->value, p->length);
1497                         ((unsigned char *)p->value)[p->length] = '\0';
1498                 }
1499         }
1500         return p;
1501 }
1502
1503 static struct property * __init build_prop_list(phandle node)
1504 {
1505         struct property *head, *tail;
1506
1507         head = tail = build_one_prop(node, NULL,
1508                                      ".node", &node, sizeof(node));
1509
1510         tail->next = build_one_prop(node, NULL, NULL, NULL, 0);
1511         tail = tail->next;
1512         while(tail) {
1513                 tail->next = build_one_prop(node, tail->name,
1514                                             NULL, NULL, 0);
1515                 tail = tail->next;
1516         }
1517
1518         return head;
1519 }
1520
1521 static char * __init get_one_property(phandle node, const char *name)
1522 {
1523         char *buf = "<NULL>";
1524         int len;
1525
1526         len = prom_getproplen(node, name);
1527         if (len > 0) {
1528                 buf = prom_early_alloc(len);
1529                 prom_getproperty(node, name, buf, len);
1530         }
1531
1532         return buf;
1533 }
1534
1535 static struct device_node * __init create_node(phandle node, struct device_node *parent)
1536 {
1537         struct device_node *dp;
1538
1539         if (!node)
1540                 return NULL;
1541
1542         dp = prom_early_alloc(sizeof(*dp));
1543         dp->unique_id = unique_id++;
1544         dp->parent = parent;
1545
1546         kref_init(&dp->kref);
1547
1548         dp->name = get_one_property(node, "name");
1549         dp->type = get_one_property(node, "device_type");
1550         dp->node = node;
1551
1552         dp->properties = build_prop_list(node);
1553
1554         irq_trans_init(dp);
1555
1556         return dp;
1557 }
1558
1559 static struct device_node * __init build_tree(struct device_node *parent, phandle node, struct device_node ***nextp)
1560 {
1561         struct device_node *dp;
1562
1563         dp = create_node(node, parent);
1564         if (dp) {
1565                 *(*nextp) = dp;
1566                 *nextp = &dp->allnext;
1567
1568                 dp->path_component_name = build_path_component(dp);
1569                 dp->full_name = build_full_name(dp);
1570
1571                 dp->child = build_tree(dp, prom_getchild(node), nextp);
1572
1573                 dp->sibling = build_tree(parent, prom_getsibling(node), nextp);
1574         }
1575
1576         return dp;
1577 }
1578
1579 void __init prom_build_devicetree(void)
1580 {
1581         struct device_node **nextp;
1582
1583         allnodes = create_node(prom_root_node, NULL);
1584         allnodes->path_component_name = "";
1585         allnodes->full_name = "/";
1586
1587         nextp = &allnodes->allnext;
1588         allnodes->child = build_tree(allnodes,
1589                                      prom_getchild(allnodes->node),
1590                                      &nextp);
1591         printk("PROM: Built device tree with %u bytes of memory.\n",
1592                prom_early_allocated);
1593 }