1 # IOMMU_API always gets selected by whoever wants it.
5 menuconfig IOMMU_SUPPORT
6 bool "IOMMU Hardware Support"
10 Say Y here if you want to compile device drivers for IO Memory
11 Management Units into the kernel. These devices usually allow to
12 remap DMA requests and/or remap interrupts from other devices on the
17 menu "Generic IOMMU Pagetable Support"
19 # Selected by the actual pagetable implementations
20 config IOMMU_IO_PGTABLE
23 config IOMMU_IO_PGTABLE_LPAE
24 bool "ARMv7/v8 Long Descriptor Format"
25 select IOMMU_IO_PGTABLE
26 # SWIOTLB guarantees a dma_to_phys() implementation
27 depends on ARM || ARM64 || (COMPILE_TEST && SWIOTLB)
29 Enable support for the ARM long descriptor pagetable format.
30 This allocator supports 4K/2M/1G, 16K/32M and 64K/512M page
31 sizes at both stage-1 and stage-2, as well as address spaces
32 up to 48-bits in size.
34 config IOMMU_IO_PGTABLE_LPAE_SELFTEST
36 depends on IOMMU_IO_PGTABLE_LPAE
38 Enable self-tests for LPAE page table allocator. This performs
39 a series of page-table consistency checks during boot.
41 If unsure, say N here.
50 depends on OF && IOMMU_API
53 bool "Freescale IOMMU support"
55 depends on PPC_E500MC || COMPILE_TEST
57 select GENERIC_ALLOCATOR
59 Freescale PAMU support. PAMU is the IOMMU present on Freescale QorIQ platforms.
60 PAMU can authorize memory access, remap the memory address, and remap I/O
65 bool "MSM IOMMU Support"
67 depends on ARCH_MSM8X60 || ARCH_MSM8960 || COMPILE_TEST
71 Support for the IOMMUs found on certain Qualcomm SOCs.
72 These IOMMUs allow virtualization of the address space used by most
73 cores within the multimedia subsystem.
75 If unsure, say N here.
77 config IOMMU_PGTABLES_L2
79 depends on MSM_IOMMU && MMU && SMP && CPU_DCACHE_DISABLE=n
83 bool "AMD IOMMU support"
90 depends on X86_64 && PCI && ACPI
92 With this option you can enable support for AMD IOMMU hardware in
93 your system. An IOMMU is a hardware component which provides
94 remapping of DMA memory accesses from devices. With an AMD IOMMU you
95 can isolate the DMA memory of different devices and protect the
96 system from misbehaving device drivers or hardware.
98 You can find out if your system has an AMD IOMMU if you look into
99 your BIOS for an option to enable it or if you have an IVRS ACPI
102 config AMD_IOMMU_STATS
103 bool "Export AMD IOMMU statistics to debugfs"
107 This option enables code in the AMD IOMMU driver to collect various
108 statistics about whats happening in the driver and exports that
109 information to userspace via debugfs.
113 tristate "AMD IOMMU Version 2 driver"
117 This option enables support for the AMD IOMMUv2 features of the IOMMU
118 hardware. Select this option if you want to use devices that support
119 the PCI PRI and PASID interface.
121 # Intel IOMMU support
126 bool "Support for Intel IOMMU using DMA Remapping Devices"
127 depends on PCI_MSI && ACPI && (X86 || IA64_GENERIC)
132 DMA remapping (DMAR) devices support enables independent address
133 translations for Direct Memory Access (DMA) from devices.
134 These DMA remapping devices are reported via ACPI tables
135 and include PCI device scope covered by these DMA
138 config INTEL_IOMMU_SVM
139 bool "Support for Shared Virtual Memory with Intel IOMMU"
140 depends on INTEL_IOMMU && X86
144 Shared Virtual Memory (SVM) provides a facility for devices
145 to access DMA resources through process address space by
146 means of a Process Address Space ID (PASID).
148 config INTEL_IOMMU_DEFAULT_ON
150 prompt "Enable Intel DMA Remapping Devices by default"
151 depends on INTEL_IOMMU
153 Selecting this option will enable a DMAR device at boot time if
154 one is found. If this option is not selected, DMAR support can
155 be enabled by passing intel_iommu=on to the kernel.
157 config INTEL_IOMMU_BROKEN_GFX_WA
158 bool "Workaround broken graphics drivers (going away soon)"
159 depends on INTEL_IOMMU && BROKEN && X86
161 Current Graphics drivers tend to use physical address
162 for DMA and avoid using DMA APIs. Setting this config
163 option permits the IOMMU driver to set a unity map for
164 all the OS-visible memory. Hence the driver can continue
165 to use physical addresses for DMA, at least until this
166 option is removed in the 2.6.32 kernel.
168 config INTEL_IOMMU_FLOPPY_WA
170 depends on INTEL_IOMMU && X86
172 Floppy disk drivers are known to bypass DMA API calls
173 thereby failing to work when IOMMU is enabled. This
174 workaround will setup a 1:1 mapping for the first
175 16MiB to make floppy (an ISA device) work.
178 bool "Support for Interrupt Remapping"
179 depends on X86_64 && X86_IO_APIC && PCI_MSI && ACPI
182 Supports Interrupt remapping for IO-APIC and MSI devices.
183 To use x2apic mode in the CPU's which support x2APIC enhancements or
184 to support platforms with CPU's having > 8 bit APIC ID, say Y.
188 bool "OMAP IOMMU Support"
189 depends on ARM && MMU
190 depends on ARCH_OMAP2PLUS || COMPILE_TEST
193 The OMAP3 media platform drivers depend on iommu support,
194 if you need them say Y here.
196 config OMAP_IOMMU_DEBUG
197 bool "Export OMAP IOMMU internals in DebugFS"
198 depends on OMAP_IOMMU && DEBUG_FS
200 Select this to see extensive information about
201 the internal state of OMAP IOMMU in debugfs.
203 Say N unless you know you need this.
205 config ROCKCHIP_IOMMU
206 bool "Rockchip IOMMU Support"
208 depends on ARCH_ROCKCHIP || COMPILE_TEST
210 select ARM_DMA_USE_IOMMU
212 Support for IOMMUs found on Rockchip rk32xx SOCs.
213 These IOMMUs allow virtualization of the address space used by most
214 cores within the multimedia subsystem.
215 Say Y here if you are using a Rockchip SoC that includes an IOMMU
218 config TEGRA_IOMMU_GART
219 bool "Tegra GART IOMMU Support"
220 depends on ARCH_TEGRA_2x_SOC
223 Enables support for remapping discontiguous physical memory
224 shared with the operating system into contiguous I/O virtual
225 space through the GART (Graphics Address Relocation Table)
226 hardware included on Tegra SoCs.
228 config TEGRA_IOMMU_SMMU
229 bool "NVIDIA Tegra SMMU Support"
230 depends on ARCH_TEGRA
235 This driver supports the IOMMU hardware (SMMU) found on NVIDIA Tegra
236 SoCs (Tegra30 up to Tegra210).
239 bool "Exynos IOMMU Support"
240 depends on ARCH_EXYNOS && ARM && MMU
242 select ARM_DMA_USE_IOMMU
244 Support for the IOMMU (System MMU) of Samsung Exynos application
245 processor family. This enables H/W multimedia accelerators to see
246 non-linear physical memory chunks as linear memory in their
249 If unsure, say N here.
251 config EXYNOS_IOMMU_DEBUG
252 bool "Debugging log for Exynos IOMMU"
253 depends on EXYNOS_IOMMU
255 Select this to see the detailed log message that shows what
256 happens in the IOMMU driver.
258 Say N unless you need kernel log message for IOMMU debugging.
260 config SHMOBILE_IPMMU
263 config SHMOBILE_IPMMU_TLB
266 config SHMOBILE_IOMMU
267 bool "IOMMU for Renesas IPMMU/IPMMUI"
269 depends on ARM && MMU
270 depends on ARCH_SHMOBILE || COMPILE_TEST
272 select ARM_DMA_USE_IOMMU
273 select SHMOBILE_IPMMU
274 select SHMOBILE_IPMMU_TLB
276 Support for Renesas IPMMU/IPMMUI. This option enables
277 remapping of DMA memory accesses from all of the IP blocks
280 Warning: Drivers (including userspace drivers of UIO
281 devices) of the IP blocks on the ICB *must* use addresses
282 allocated from the IPMMU (iova) for DMA with this option
288 prompt "IPMMU/IPMMUI address space size"
289 default SHMOBILE_IOMMU_ADDRSIZE_2048MB
290 depends on SHMOBILE_IOMMU
292 This option sets IPMMU/IPMMUI address space size by
293 adjusting the 1st level page table size. The page table size
294 is calculated as follows:
296 page table size = number of page table entries * 4 bytes
297 number of page table entries = address space size / 1 MiB
299 For example, when the address space size is 2048 MiB, the
300 1st level page table size is 8192 bytes.
302 config SHMOBILE_IOMMU_ADDRSIZE_2048MB
305 config SHMOBILE_IOMMU_ADDRSIZE_1024MB
308 config SHMOBILE_IOMMU_ADDRSIZE_512MB
311 config SHMOBILE_IOMMU_ADDRSIZE_256MB
314 config SHMOBILE_IOMMU_ADDRSIZE_128MB
317 config SHMOBILE_IOMMU_ADDRSIZE_64MB
320 config SHMOBILE_IOMMU_ADDRSIZE_32MB
325 config SHMOBILE_IOMMU_L1SIZE
327 default 8192 if SHMOBILE_IOMMU_ADDRSIZE_2048MB
328 default 4096 if SHMOBILE_IOMMU_ADDRSIZE_1024MB
329 default 2048 if SHMOBILE_IOMMU_ADDRSIZE_512MB
330 default 1024 if SHMOBILE_IOMMU_ADDRSIZE_256MB
331 default 512 if SHMOBILE_IOMMU_ADDRSIZE_128MB
332 default 256 if SHMOBILE_IOMMU_ADDRSIZE_64MB
333 default 128 if SHMOBILE_IOMMU_ADDRSIZE_32MB
336 bool "Renesas VMSA-compatible IPMMU"
338 depends on ARCH_SHMOBILE || COMPILE_TEST
340 select IOMMU_IO_PGTABLE_LPAE
341 select ARM_DMA_USE_IOMMU
343 Support for the Renesas VMSA-compatible IPMMU Renesas found in the
344 R-Mobile APE6 and R-Car H2/M2 SoCs.
348 config SPAPR_TCE_IOMMU
349 bool "sPAPR TCE IOMMU Support"
350 depends on PPC_POWERNV || PPC_PSERIES
353 Enables bits of IOMMU API required by VFIO. The iommu_ops
354 is not implemented as it is not necessary for VFIO.
358 bool "ARM Ltd. System MMU (SMMU) Support"
359 depends on (ARM64 || ARM) && MMU
361 select IOMMU_IO_PGTABLE_LPAE
362 select ARM_DMA_USE_IOMMU if ARM
364 Support for implementations of the ARM System MMU architecture
367 Say Y here if your SoC includes an IOMMU device implementing
368 the ARM SMMU architecture.
371 bool "ARM Ltd. System MMU Version 3 (SMMUv3) Support"
372 depends on ARM64 && PCI
374 select IOMMU_IO_PGTABLE_LPAE
376 Support for implementations of the ARM System MMU architecture
377 version 3 providing translation support to a PCIe root complex.
379 Say Y here if your system includes an IOMMU device implementing
380 the ARM SMMUv3 architecture.
382 endif # IOMMU_SUPPORT