drivers/media/dvb-frontends/m88ds3103.c

   1 /*
   2  * Montage Technology M88DS3103/M88RS6000 demodulator driver
   3  *
   4  * Copyright (C) 2013 Antti Palosaari <crope@iki.fi>
   5  *
   6  *    This program is free software; you can redistribute it and/or modify
   7  *    it under the terms of the GNU General Public License as published by
   8  *    the Free Software Foundation; either version 2 of the License, or
   9  *    (at your option) any later version.
  10  *
  11  *    This program is distributed in the hope that it will be useful,
  12  *    but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  *    GNU General Public License for more details.
  15  */
  16
  17 #include "m88ds3103_priv.h"
  18
  19 static struct dvb_frontend_ops m88ds3103_ops;
  20
  21 /* write reg val table using reg addr auto increment */
  22 static int m88ds3103_wr_reg_val_tab(struct m88ds3103_dev *dev,
  23                 const struct m88ds3103_reg_val *tab, int tab_len)
  24 {
  25         struct i2c_client *client = dev->client;
  26         int ret, i, j;
  27         u8 buf[83];
  28
  29         dev_dbg(&client->dev, "tab_len=%d\n", tab_len);
  30
  31         if (tab_len > 86) {
  32                 ret = -EINVAL;
  33                 goto err;
  34         }
  35
  36         for (i = 0, j = 0; i < tab_len; i++, j++) {
  37                 buf[j] = tab[i].val;
  38
  39                 if (i == tab_len - 1 || tab[i].reg != tab[i + 1].reg - 1 ||
  40                                 !((j + 1) % (dev->cfg->i2c_wr_max - 1))) {
  41                         ret = regmap_bulk_write(dev->regmap, tab[i].reg - j, buf, j + 1);
  42                         if (ret)
  43                                 goto err;
  44
  45                         j = -1;
  46                 }
  47         }
  48
  49         return 0;
  50 err:
  51         dev_dbg(&client->dev, "failed=%d\n", ret);
  52         return ret;
  53 }
  54
  55 /*
  56  * Get the demodulator AGC PWM voltage setting supplied to the tuner.
  57  */
  58 int m88ds3103_get_agc_pwm(struct dvb_frontend *fe, u8 *_agc_pwm)
  59 {
  60         struct m88ds3103_dev *dev = fe->demodulator_priv;
  61         unsigned tmp;
  62         int ret;
  63
  64         ret = regmap_read(dev->regmap, 0x3f, &tmp);
  65         if (ret == 0)
  66                 *_agc_pwm = tmp;
  67         return ret;
  68 }
  69 EXPORT_SYMBOL(m88ds3103_get_agc_pwm);
  70
  71 static int m88ds3103_read_status(struct dvb_frontend *fe,
  72                                  enum fe_status *status)
  73 {
  74         struct m88ds3103_dev *dev = fe->demodulator_priv;
  75         struct i2c_client *client = dev->client;
  76         struct dtv_frontend_properties *c = &fe->dtv_property_cache;
  77         int ret, i, itmp;
  78         unsigned int utmp;
  79         u8 buf[3];
  80
  81         *status = 0;
  82
  83         if (!dev->warm) {
  84                 ret = -EAGAIN;
  85                 goto err;
  86         }
  87
  88         switch (c->delivery_system) {
  89         case SYS_DVBS:
  90                 ret = regmap_read(dev->regmap, 0xd1, &utmp);
  91                 if (ret)
  92                         goto err;
  93
  94                 if ((utmp & 0x07) == 0x07)
  95                         *status = FE_HAS_SIGNAL | FE_HAS_CARRIER |
  96                                         FE_HAS_VITERBI | FE_HAS_SYNC |
  97                                         FE_HAS_LOCK;
  98                 break;
  99         case SYS_DVBS2:
 100                 ret = regmap_read(dev->regmap, 0x0d, &utmp);
 101                 if (ret)
 102                         goto err;
 103
 104                 if ((utmp & 0x8f) == 0x8f)
 105                         *status = FE_HAS_SIGNAL | FE_HAS_CARRIER |
 106                                         FE_HAS_VITERBI | FE_HAS_SYNC |
 107                                         FE_HAS_LOCK;
 108                 break;
 109         default:
 110                 dev_dbg(&client->dev, "invalid delivery_system\n");
 111                 ret = -EINVAL;
 112                 goto err;
 113         }
 114
 115         dev->fe_status = *status;
 116         dev_dbg(&client->dev, "lock=%02x status=%02x\n", utmp, *status);
 117
 118         /* CNR */
 119         if (dev->fe_status & FE_HAS_VITERBI) {
 120                 unsigned int cnr, noise, signal, noise_tot, signal_tot;
 121
 122                 cnr = 0;
 123                 /* more iterations for more accurate estimation */
 124                 #define M88DS3103_SNR_ITERATIONS 3
 125
 126                 switch (c->delivery_system) {
 127                 case SYS_DVBS:
 128                         itmp = 0;
 129
 130                         for (i = 0; i < M88DS3103_SNR_ITERATIONS; i++) {
 131                                 ret = regmap_read(dev->regmap, 0xff, &utmp);
 132                                 if (ret)
 133                                         goto err;
 134
 135                                 itmp += utmp;
 136                         }
 137
 138                         /* use of single register limits max value to 15 dB */
 139                         /* SNR(X) dB = 10 * ln(X) / ln(10) dB */
 140                         itmp = DIV_ROUND_CLOSEST(itmp, 8 * M88DS3103_SNR_ITERATIONS);
 141                         if (itmp)
 142                                 cnr = div_u64((u64) 10000 * intlog2(itmp), intlog2(10));
 143                         break;
 144                 case SYS_DVBS2:
 145                         noise_tot = 0;
 146                         signal_tot = 0;
 147
 148                         for (i = 0; i < M88DS3103_SNR_ITERATIONS; i++) {
 149                                 ret = regmap_bulk_read(dev->regmap, 0x8c, buf, 3);
 150                                 if (ret)
 151                                         goto err;
 152
 153                                 noise = buf[1] << 6;    /* [13:6] */
 154                                 noise |= buf[0] & 0x3f; /*  [5:0] */
 155                                 noise >>= 2;
 156                                 signal = buf[2] * buf[2];
 157                                 signal >>= 1;
 158
 159                                 noise_tot += noise;
 160                                 signal_tot += signal;
 161                         }
 162
 163                         noise = noise_tot / M88DS3103_SNR_ITERATIONS;
 164                         signal = signal_tot / M88DS3103_SNR_ITERATIONS;
 165
 166                         /* SNR(X) dB = 10 * log10(X) dB */
 167                         if (signal > noise) {
 168                                 itmp = signal / noise;
 169                                 cnr = div_u64((u64) 10000 * intlog10(itmp), (1 << 24));
 170                         }
 171                         break;
 172                 default:
 173                         dev_dbg(&client->dev, "invalid delivery_system\n");
 174                         ret = -EINVAL;
 175                         goto err;
 176                 }
 177
 178                 if (cnr) {
 179                         c->cnr.stat[0].scale = FE_SCALE_DECIBEL;
 180                         c->cnr.stat[0].svalue = cnr;
 181                 } else {
 182                         c->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
 183                 }
 184         } else {
 185                 c->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
 186         }
 187
 188         /* BER */
 189         if (dev->fe_status & FE_HAS_LOCK) {
 190                 unsigned int utmp, post_bit_error, post_bit_count;
 191
 192                 switch (c->delivery_system) {
 193                 case SYS_DVBS:
 194                         ret = regmap_write(dev->regmap, 0xf9, 0x04);
 195                         if (ret)
 196                                 goto err;
 197
 198                         ret = regmap_read(dev->regmap, 0xf8, &utmp);
 199                         if (ret)
 200                                 goto err;
 201
 202                         /* measurement ready? */
 203                         if (!(utmp & 0x10)) {
 204                                 ret = regmap_bulk_read(dev->regmap, 0xf6, buf, 2);
 205                                 if (ret)
 206                                         goto err;
 207
 208                                 post_bit_error = buf[1] << 8 | buf[0] << 0;
 209                                 post_bit_count = 0x800000;
 210                                 dev->post_bit_error += post_bit_error;
 211                                 dev->post_bit_count += post_bit_count;
 212                                 dev->dvbv3_ber = post_bit_error;
 213
 214                                 /* restart measurement */
 215                                 utmp |= 0x10;
 216                                 ret = regmap_write(dev->regmap, 0xf8, utmp);
 217                                 if (ret)
 218                                         goto err;
 219                         }
 220                         break;
 221                 case SYS_DVBS2:
 222                         ret = regmap_bulk_read(dev->regmap, 0xd5, buf, 3);
 223                         if (ret)
 224                                 goto err;
 225
 226                         utmp = buf[2] << 16 | buf[1] << 8 | buf[0] << 0;
 227
 228                         /* enough data? */
 229                         if (utmp > 4000) {
 230                                 ret = regmap_bulk_read(dev->regmap, 0xf7, buf, 2);
 231                                 if (ret)
 232                                         goto err;
 233
 234                                 post_bit_error = buf[1] << 8 | buf[0] << 0;
 235                                 post_bit_count = 32 * utmp; /* TODO: FEC */
 236                                 dev->post_bit_error += post_bit_error;
 237                                 dev->post_bit_count += post_bit_count;
 238                                 dev->dvbv3_ber = post_bit_error;
 239
 240                                 /* restart measurement */
 241                                 ret = regmap_write(dev->regmap, 0xd1, 0x01);
 242                                 if (ret)
 243                                         goto err;
 244
 245                                 ret = regmap_write(dev->regmap, 0xf9, 0x01);
 246                                 if (ret)
 247                                         goto err;
 248
 249                                 ret = regmap_write(dev->regmap, 0xf9, 0x00);
 250                                 if (ret)
 251                                         goto err;
 252
 253                                 ret = regmap_write(dev->regmap, 0xd1, 0x00);
 254                                 if (ret)
 255                                         goto err;
 256                         }
 257                         break;
 258                 default:
 259                         dev_dbg(&client->dev, "invalid delivery_system\n");
 260                         ret = -EINVAL;
 261                         goto err;
 262                 }
 263
 264                 c->post_bit_error.stat[0].scale = FE_SCALE_COUNTER;
 265                 c->post_bit_error.stat[0].uvalue = dev->post_bit_error;
 266                 c->post_bit_count.stat[0].scale = FE_SCALE_COUNTER;
 267                 c->post_bit_count.stat[0].uvalue = dev->post_bit_count;
 268         } else {
 269                 c->post_bit_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
 270                 c->post_bit_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
 271         }
 272
 273         return 0;
 274 err:
 275         dev_dbg(&client->dev, "failed=%d\n", ret);
 276         return ret;
 277 }
 278
 279 static int m88ds3103_set_frontend(struct dvb_frontend *fe)
 280 {
 281         struct m88ds3103_dev *dev = fe->demodulator_priv;
 282         struct i2c_client *client = dev->client;
 283         struct dtv_frontend_properties *c = &fe->dtv_property_cache;
 284         int ret, len;
 285         const struct m88ds3103_reg_val *init;
 286         u8 u8tmp, u8tmp1 = 0, u8tmp2 = 0; /* silence compiler warning */
 287         u8 buf[3];
 288         u16 u16tmp, divide_ratio = 0;
 289         u32 tuner_frequency, target_mclk;
 290         s32 s32tmp;
 291
 292         dev_dbg(&client->dev,
 293                 "delivery_system=%d modulation=%d frequency=%u symbol_rate=%d inversion=%d pilot=%d rolloff=%d\n",
 294                 c->delivery_system, c->modulation, c->frequency, c->symbol_rate,
 295                 c->inversion, c->pilot, c->rolloff);
 296
 297         if (!dev->warm) {
 298                 ret = -EAGAIN;
 299                 goto err;
 300         }
 301
 302         /* reset */
 303         ret = regmap_write(dev->regmap, 0x07, 0x80);
 304         if (ret)
 305                 goto err;
 306
 307         ret = regmap_write(dev->regmap, 0x07, 0x00);
 308         if (ret)
 309                 goto err;
 310
 311         /* Disable demod clock path */
 312         if (dev->chip_id == M88RS6000_CHIP_ID) {
 313                 ret = regmap_write(dev->regmap, 0x06, 0xe0);
 314                 if (ret)
 315                         goto err;
 316         }
 317
 318         /* program tuner */
 319         if (fe->ops.tuner_ops.set_params) {
 320                 ret = fe->ops.tuner_ops.set_params(fe);
 321                 if (ret)
 322                         goto err;
 323         }
 324
 325         if (fe->ops.tuner_ops.get_frequency) {
 326                 ret = fe->ops.tuner_ops.get_frequency(fe, &tuner_frequency);
 327                 if (ret)
 328                         goto err;
 329         } else {
 330                 /*
 331                  * Use nominal target frequency as tuner driver does not provide
 332                  * actual frequency used. Carrier offset calculation is not
 333                  * valid.
 334                  */
 335                 tuner_frequency = c->frequency;
 336         }
 337
 338         /* select M88RS6000 demod main mclk and ts mclk from tuner die. */
 339         if (dev->chip_id == M88RS6000_CHIP_ID) {
 340                 if (c->symbol_rate > 45010000)
 341                         dev->mclk_khz = 110250;
 342                 else
 343                         dev->mclk_khz = 96000;
 344
 345                 if (c->delivery_system == SYS_DVBS)
 346                         target_mclk = 96000;
 347                 else
 348                         target_mclk = 144000;
 349
 350                 /* Enable demod clock path */
 351                 ret = regmap_write(dev->regmap, 0x06, 0x00);
 352                 if (ret)
 353                         goto err;
 354                 usleep_range(10000, 20000);
 355         } else {
 356         /* set M88DS3103 mclk and ts mclk. */
 357                 dev->mclk_khz = 96000;
 358
 359                 switch (dev->cfg->ts_mode) {
 360                 case M88DS3103_TS_SERIAL:
 361                 case M88DS3103_TS_SERIAL_D7:
 362                         target_mclk = dev->cfg->ts_clk;
 363                         break;
 364                 case M88DS3103_TS_PARALLEL:
 365                 case M88DS3103_TS_CI:
 366                         if (c->delivery_system == SYS_DVBS)
 367                                 target_mclk = 96000;
 368                         else {
 369                                 if (c->symbol_rate < 18000000)
 370                                         target_mclk = 96000;
 371                                 else if (c->symbol_rate < 28000000)
 372                                         target_mclk = 144000;
 373                                 else
 374                                         target_mclk = 192000;
 375                         }
 376                         break;
 377                 default:
 378                         dev_dbg(&client->dev, "invalid ts_mode\n");
 379                         ret = -EINVAL;
 380                         goto err;
 381                 }
 382
 383                 switch (target_mclk) {
 384                 case 96000:
 385                         u8tmp1 = 0x02; /* 0b10 */
 386                         u8tmp2 = 0x01; /* 0b01 */
 387                         break;
 388                 case 144000:
 389                         u8tmp1 = 0x00; /* 0b00 */
 390                         u8tmp2 = 0x01; /* 0b01 */
 391                         break;
 392                 case 192000:
 393                         u8tmp1 = 0x03; /* 0b11 */
 394                         u8tmp2 = 0x00; /* 0b00 */
 395                         break;
 396                 }
 397                 ret = regmap_update_bits(dev->regmap, 0x22, 0xc0, u8tmp1 << 6);
 398                 if (ret)
 399                         goto err;
 400                 ret = regmap_update_bits(dev->regmap, 0x24, 0xc0, u8tmp2 << 6);
 401                 if (ret)
 402                         goto err;
 403         }
 404
 405         ret = regmap_write(dev->regmap, 0xb2, 0x01);
 406         if (ret)
 407                 goto err;
 408
 409         ret = regmap_write(dev->regmap, 0x00, 0x01);
 410         if (ret)
 411                 goto err;
 412
 413         switch (c->delivery_system) {
 414         case SYS_DVBS:
 415                 if (dev->chip_id == M88RS6000_CHIP_ID) {
 416                         len = ARRAY_SIZE(m88rs6000_dvbs_init_reg_vals);
 417                         init = m88rs6000_dvbs_init_reg_vals;
 418                 } else {
 419                         len = ARRAY_SIZE(m88ds3103_dvbs_init_reg_vals);
 420                         init = m88ds3103_dvbs_init_reg_vals;
 421                 }
 422                 break;
 423         case SYS_DVBS2:
 424                 if (dev->chip_id == M88RS6000_CHIP_ID) {
 425                         len = ARRAY_SIZE(m88rs6000_dvbs2_init_reg_vals);
 426                         init = m88rs6000_dvbs2_init_reg_vals;
 427                 } else {
 428                         len = ARRAY_SIZE(m88ds3103_dvbs2_init_reg_vals);
 429                         init = m88ds3103_dvbs2_init_reg_vals;
 430                 }
 431                 break;
 432         default:
 433                 dev_dbg(&client->dev, "invalid delivery_system\n");
 434                 ret = -EINVAL;
 435                 goto err;
 436         }
 437
 438         /* program init table */
 439         if (c->delivery_system != dev->delivery_system) {
 440                 ret = m88ds3103_wr_reg_val_tab(dev, init, len);
 441                 if (ret)
 442                         goto err;
 443         }
 444
 445         if (dev->chip_id == M88RS6000_CHIP_ID) {
 446                 if ((c->delivery_system == SYS_DVBS2)
 447                         && ((c->symbol_rate / 1000) <= 5000)) {
 448                         ret = regmap_write(dev->regmap, 0xc0, 0x04);
 449                         if (ret)
 450                                 goto err;
 451                         buf[0] = 0x09;
 452                         buf[1] = 0x22;
 453                         buf[2] = 0x88;
 454                         ret = regmap_bulk_write(dev->regmap, 0x8a, buf, 3);
 455                         if (ret)
 456                                 goto err;
 457                 }
 458                 ret = regmap_update_bits(dev->regmap, 0x9d, 0x08, 0x08);
 459                 if (ret)
 460                         goto err;
 461                 ret = regmap_write(dev->regmap, 0xf1, 0x01);
 462                 if (ret)
 463                         goto err;
 464                 ret = regmap_update_bits(dev->regmap, 0x30, 0x80, 0x80);
 465                 if (ret)
 466                         goto err;
 467         }
 468
 469         switch (dev->cfg->ts_mode) {
 470         case M88DS3103_TS_SERIAL:
 471                 u8tmp1 = 0x00;
 472                 u8tmp = 0x06;
 473                 break;
 474         case M88DS3103_TS_SERIAL_D7:
 475                 u8tmp1 = 0x20;
 476                 u8tmp = 0x06;
 477                 break;
 478         case M88DS3103_TS_PARALLEL:
 479                 u8tmp = 0x02;
 480                 break;
 481         case M88DS3103_TS_CI:
 482                 u8tmp = 0x03;
 483                 break;
 484         default:
 485                 dev_dbg(&client->dev, "invalid ts_mode\n");
 486                 ret = -EINVAL;
 487                 goto err;
 488         }
 489
 490         if (dev->cfg->ts_clk_pol)
 491                 u8tmp |= 0x40;
 492
 493         /* TS mode */
 494         ret = regmap_write(dev->regmap, 0xfd, u8tmp);
 495         if (ret)
 496                 goto err;
 497
 498         switch (dev->cfg->ts_mode) {
 499         case M88DS3103_TS_SERIAL:
 500         case M88DS3103_TS_SERIAL_D7:
 501                 ret = regmap_update_bits(dev->regmap, 0x29, 0x20, u8tmp1);
 502                 if (ret)
 503                         goto err;
 504                 u8tmp1 = 0;
 505                 u8tmp2 = 0;
 506                 break;
 507         default:
 508                 if (dev->cfg->ts_clk) {
 509                         divide_ratio = DIV_ROUND_UP(target_mclk, dev->cfg->ts_clk);
 510                         u8tmp1 = divide_ratio / 2;
 511                         u8tmp2 = DIV_ROUND_UP(divide_ratio, 2);
 512                 }
 513         }
 514
 515         dev_dbg(&client->dev,
 516                 "target_mclk=%d ts_clk=%d divide_ratio=%d\n",
 517                 target_mclk, dev->cfg->ts_clk, divide_ratio);
 518
 519         u8tmp1--;
 520         u8tmp2--;
 521         /* u8tmp1[5:2] => fe[3:0], u8tmp1[1:0] => ea[7:6] */
 522         u8tmp1 &= 0x3f;
 523         /* u8tmp2[5:0] => ea[5:0] */
 524         u8tmp2 &= 0x3f;
 525
 526         ret = regmap_bulk_read(dev->regmap, 0xfe, &u8tmp, 1);
 527         if (ret)
 528                 goto err;
 529
 530         u8tmp = ((u8tmp  & 0xf0) << 0) | u8tmp1 >> 2;
 531         ret = regmap_write(dev->regmap, 0xfe, u8tmp);
 532         if (ret)
 533                 goto err;
 534
 535         u8tmp = ((u8tmp1 & 0x03) << 6) | u8tmp2 >> 0;
 536         ret = regmap_write(dev->regmap, 0xea, u8tmp);
 537         if (ret)
 538                 goto err;
 539
 540         if (c->symbol_rate <= 3000000)
 541                 u8tmp = 0x20;
 542         else if (c->symbol_rate <= 10000000)
 543                 u8tmp = 0x10;
 544         else
 545                 u8tmp = 0x06;
 546
 547         ret = regmap_write(dev->regmap, 0xc3, 0x08);
 548         if (ret)
 549                 goto err;
 550
 551         ret = regmap_write(dev->regmap, 0xc8, u8tmp);
 552         if (ret)
 553                 goto err;
 554
 555         ret = regmap_write(dev->regmap, 0xc4, 0x08);
 556         if (ret)
 557                 goto err;
 558
 559         ret = regmap_write(dev->regmap, 0xc7, 0x00);
 560         if (ret)
 561                 goto err;
 562
 563         u16tmp = DIV_ROUND_CLOSEST((c->symbol_rate / 1000) << 15, dev->mclk_khz / 2);
 564         buf[0] = (u16tmp >> 0) & 0xff;
 565         buf[1] = (u16tmp >> 8) & 0xff;
 566         ret = regmap_bulk_write(dev->regmap, 0x61, buf, 2);
 567         if (ret)
 568                 goto err;
 569
 570         ret = regmap_update_bits(dev->regmap, 0x4d, 0x02, dev->cfg->spec_inv << 1);
 571         if (ret)
 572                 goto err;
 573
 574         ret = regmap_update_bits(dev->regmap, 0x30, 0x10, dev->cfg->agc_inv << 4);
 575         if (ret)
 576                 goto err;
 577
 578         ret = regmap_write(dev->regmap, 0x33, dev->cfg->agc);
 579         if (ret)
 580                 goto err;
 581
 582         dev_dbg(&client->dev, "carrier offset=%d\n",
 583                 (tuner_frequency - c->frequency));
 584
 585         s32tmp = 0x10000 * (tuner_frequency - c->frequency);
 586         s32tmp = DIV_ROUND_CLOSEST(s32tmp, dev->mclk_khz);
 587         if (s32tmp < 0)
 588                 s32tmp += 0x10000;
 589
 590         buf[0] = (s32tmp >> 0) & 0xff;
 591         buf[1] = (s32tmp >> 8) & 0xff;
 592         ret = regmap_bulk_write(dev->regmap, 0x5e, buf, 2);
 593         if (ret)
 594                 goto err;
 595
 596         ret = regmap_write(dev->regmap, 0x00, 0x00);
 597         if (ret)
 598                 goto err;
 599
 600         ret = regmap_write(dev->regmap, 0xb2, 0x00);
 601         if (ret)
 602                 goto err;
 603
 604         dev->delivery_system = c->delivery_system;
 605
 606         return 0;
 607 err:
 608         dev_dbg(&client->dev, "failed=%d\n", ret);
 609         return ret;
 610 }
 611
 612 static int m88ds3103_init(struct dvb_frontend *fe)
 613 {
 614         struct m88ds3103_dev *dev = fe->demodulator_priv;
 615         struct i2c_client *client = dev->client;
 616         struct dtv_frontend_properties *c = &fe->dtv_property_cache;
 617         int ret, len, remaining;
 618         unsigned int utmp;
 619         const struct firmware *fw = NULL;
 620         u8 *fw_file;
 621
 622         dev_dbg(&client->dev, "\n");
 623
 624         /* set cold state by default */
 625         dev->warm = false;
 626
 627         /* wake up device from sleep */
 628         ret = regmap_update_bits(dev->regmap, 0x08, 0x01, 0x01);
 629         if (ret)
 630                 goto err;
 631         ret = regmap_update_bits(dev->regmap, 0x04, 0x01, 0x00);
 632         if (ret)
 633                 goto err;
 634         ret = regmap_update_bits(dev->regmap, 0x23, 0x10, 0x00);
 635         if (ret)
 636                 goto err;
 637
 638         /* firmware status */
 639         ret = regmap_read(dev->regmap, 0xb9, &utmp);
 640         if (ret)
 641                 goto err;
 642
 643         dev_dbg(&client->dev, "firmware=%02x\n", utmp);
 644
 645         if (utmp)
 646                 goto skip_fw_download;
 647
 648         /* global reset, global diseqc reset, golbal fec reset */
 649         ret = regmap_write(dev->regmap, 0x07, 0xe0);
 650         if (ret)
 651                 goto err;
 652         ret = regmap_write(dev->regmap, 0x07, 0x00);
 653         if (ret)
 654                 goto err;
 655
 656         /* cold state - try to download firmware */
 657         dev_info(&client->dev, "found a '%s' in cold state\n",
 658                  m88ds3103_ops.info.name);
 659
 660         if (dev->chip_id == M88RS6000_CHIP_ID)
 661                 fw_file = M88RS6000_FIRMWARE;
 662         else
 663                 fw_file = M88DS3103_FIRMWARE;
 664         /* request the firmware, this will block and timeout */
 665         ret = request_firmware(&fw, fw_file, &client->dev);
 666         if (ret) {
 667                 dev_err(&client->dev, "firmare file '%s' not found\n", fw_file);
 668                 goto err;
 669         }
 670
 671         dev_info(&client->dev, "downloading firmware from file '%s'\n",
 672                  fw_file);
 673
 674         ret = regmap_write(dev->regmap, 0xb2, 0x01);
 675         if (ret)
 676                 goto error_fw_release;
 677
 678         for (remaining = fw->size; remaining > 0;
 679                         remaining -= (dev->cfg->i2c_wr_max - 1)) {
 680                 len = remaining;
 681                 if (len > (dev->cfg->i2c_wr_max - 1))
 682                         len = (dev->cfg->i2c_wr_max - 1);
 683
 684                 ret = regmap_bulk_write(dev->regmap, 0xb0,
 685                                 &fw->data[fw->size - remaining], len);
 686                 if (ret) {
 687                         dev_err(&client->dev, "firmware download failed=%d\n",
 688                                 ret);
 689                         goto error_fw_release;
 690                 }
 691         }
 692
 693         ret = regmap_write(dev->regmap, 0xb2, 0x00);
 694         if (ret)
 695                 goto error_fw_release;
 696
 697         release_firmware(fw);
 698         fw = NULL;
 699
 700         ret = regmap_read(dev->regmap, 0xb9, &utmp);
 701         if (ret)
 702                 goto err;
 703
 704         if (!utmp) {
 705                 dev_info(&client->dev, "firmware did not run\n");
 706                 ret = -EFAULT;
 707                 goto err;
 708         }
 709
 710         dev_info(&client->dev, "found a '%s' in warm state\n",
 711                  m88ds3103_ops.info.name);
 712         dev_info(&client->dev, "firmware version: %X.%X\n",
 713                  (utmp >> 4) & 0xf, (utmp >> 0 & 0xf));
 714
 715 skip_fw_download:
 716         /* warm state */
 717         dev->warm = true;
 718
 719         /* init stats here in order signal app which stats are supported */
 720         c->cnr.len = 1;
 721         c->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
 722         c->post_bit_error.len = 1;
 723         c->post_bit_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
 724         c->post_bit_count.len = 1;
 725         c->post_bit_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
 726
 727         return 0;
 728 error_fw_release:
 729         release_firmware(fw);
 730 err:
 731         dev_dbg(&client->dev, "failed=%d\n", ret);
 732         return ret;
 733 }
 734
 735 static int m88ds3103_sleep(struct dvb_frontend *fe)
 736 {
 737         struct m88ds3103_dev *dev = fe->demodulator_priv;
 738         struct i2c_client *client = dev->client;
 739         int ret;
 740         unsigned int utmp;
 741
 742         dev_dbg(&client->dev, "\n");
 743
 744         dev->fe_status = 0;
 745         dev->delivery_system = SYS_UNDEFINED;
 746
 747         /* TS Hi-Z */
 748         if (dev->chip_id == M88RS6000_CHIP_ID)
 749                 utmp = 0x29;
 750         else
 751                 utmp = 0x27;
 752         ret = regmap_update_bits(dev->regmap, utmp, 0x01, 0x00);
 753         if (ret)
 754                 goto err;
 755
 756         /* sleep */
 757         ret = regmap_update_bits(dev->regmap, 0x08, 0x01, 0x00);
 758         if (ret)
 759                 goto err;
 760         ret = regmap_update_bits(dev->regmap, 0x04, 0x01, 0x01);
 761         if (ret)
 762                 goto err;
 763         ret = regmap_update_bits(dev->regmap, 0x23, 0x10, 0x10);
 764         if (ret)
 765                 goto err;
 766
 767         return 0;
 768 err:
 769         dev_dbg(&client->dev, "failed=%d\n", ret);
 770         return ret;
 771 }
 772
 773 static int m88ds3103_get_frontend(struct dvb_frontend *fe)
 774 {
 775         struct m88ds3103_dev *dev = fe->demodulator_priv;
 776         struct i2c_client *client = dev->client;
 777         struct dtv_frontend_properties *c = &fe->dtv_property_cache;
 778         int ret;
 779         u8 buf[3];
 780
 781         dev_dbg(&client->dev, "\n");
 782
 783         if (!dev->warm || !(dev->fe_status & FE_HAS_LOCK)) {
 784                 ret = 0;
 785                 goto err;
 786         }
 787
 788         switch (c->delivery_system) {
 789         case SYS_DVBS:
 790                 ret = regmap_bulk_read(dev->regmap, 0xe0, &buf[0], 1);
 791                 if (ret)
 792                         goto err;
 793
 794                 ret = regmap_bulk_read(dev->regmap, 0xe6, &buf[1], 1);
 795                 if (ret)
 796                         goto err;
 797
 798                 switch ((buf[0] >> 2) & 0x01) {
 799                 case 0:
 800                         c->inversion = INVERSION_OFF;
 801                         break;
 802                 case 1:
 803                         c->inversion = INVERSION_ON;
 804                         break;
 805                 }
 806
 807                 switch ((buf[1] >> 5) & 0x07) {
 808                 case 0:
 809                         c->fec_inner = FEC_7_8;
 810                         break;
 811                 case 1:
 812                         c->fec_inner = FEC_5_6;
 813                         break;
 814                 case 2:
 815                         c->fec_inner = FEC_3_4;
 816                         break;
 817                 case 3:
 818                         c->fec_inner = FEC_2_3;
 819                         break;
 820                 case 4:
 821                         c->fec_inner = FEC_1_2;
 822                         break;
 823                 default:
 824                         dev_dbg(&client->dev, "invalid fec_inner\n");
 825                 }
 826
 827                 c->modulation = QPSK;
 828
 829                 break;
 830         case SYS_DVBS2:
 831                 ret = regmap_bulk_read(dev->regmap, 0x7e, &buf[0], 1);
 832                 if (ret)
 833                         goto err;
 834
 835                 ret = regmap_bulk_read(dev->regmap, 0x89, &buf[1], 1);
 836                 if (ret)
 837                         goto err;
 838
 839                 ret = regmap_bulk_read(dev->regmap, 0xf2, &buf[2], 1);
 840                 if (ret)
 841                         goto err;
 842
 843                 switch ((buf[0] >> 0) & 0x0f) {
 844                 case 2:
 845                         c->fec_inner = FEC_2_5;
 846                         break;
 847                 case 3:
 848                         c->fec_inner = FEC_1_2;
 849                         break;
 850                 case 4:
 851                         c->fec_inner = FEC_3_5;
 852                         break;
 853                 case 5:
 854                         c->fec_inner = FEC_2_3;
 855                         break;
 856                 case 6:
 857                         c->fec_inner = FEC_3_4;
 858                         break;
 859                 case 7:
 860                         c->fec_inner = FEC_4_5;
 861                         break;
 862                 case 8:
 863                         c->fec_inner = FEC_5_6;
 864                         break;
 865                 case 9:
 866                         c->fec_inner = FEC_8_9;
 867                         break;
 868                 case 10:
 869                         c->fec_inner = FEC_9_10;
 870                         break;
 871                 default:
 872                         dev_dbg(&client->dev, "invalid fec_inner\n");
 873                 }
 874
 875                 switch ((buf[0] >> 5) & 0x01) {
 876                 case 0:
 877                         c->pilot = PILOT_OFF;
 878                         break;
 879                 case 1:
 880                         c->pilot = PILOT_ON;
 881                         break;
 882                 }
 883
 884                 switch ((buf[0] >> 6) & 0x07) {
 885                 case 0:
 886                         c->modulation = QPSK;
 887                         break;
 888                 case 1:
 889                         c->modulation = PSK_8;
 890                         break;
 891                 case 2:
 892                         c->modulation = APSK_16;
 893                         break;
 894                 case 3:
 895                         c->modulation = APSK_32;
 896                         break;
 897                 default:
 898                         dev_dbg(&client->dev, "invalid modulation\n");
 899                 }
 900
 901                 switch ((buf[1] >> 7) & 0x01) {
 902                 case 0:
 903                         c->inversion = INVERSION_OFF;
 904                         break;
 905                 case 1:
 906                         c->inversion = INVERSION_ON;
 907                         break;
 908                 }
 909
 910                 switch ((buf[2] >> 0) & 0x03) {
 911                 case 0:
 912                         c->rolloff = ROLLOFF_35;
 913                         break;
 914                 case 1:
 915                         c->rolloff = ROLLOFF_25;
 916                         break;
 917                 case 2:
 918                         c->rolloff = ROLLOFF_20;
 919                         break;
 920                 default:
 921                         dev_dbg(&client->dev, "invalid rolloff\n");
 922                 }
 923                 break;
 924         default:
 925                 dev_dbg(&client->dev, "invalid delivery_system\n");
 926                 ret = -EINVAL;
 927                 goto err;
 928         }
 929
 930         ret = regmap_bulk_read(dev->regmap, 0x6d, buf, 2);
 931         if (ret)
 932                 goto err;
 933
 934         c->symbol_rate = 1ull * ((buf[1] << 8) | (buf[0] << 0)) *
 935                         dev->mclk_khz * 1000 / 0x10000;
 936
 937         return 0;
 938 err:
 939         dev_dbg(&client->dev, "failed=%d\n", ret);
 940         return ret;
 941 }
 942
 943 static int m88ds3103_read_snr(struct dvb_frontend *fe, u16 *snr)
 944 {
 945         struct dtv_frontend_properties *c = &fe->dtv_property_cache;
 946
 947         if (c->cnr.stat[0].scale == FE_SCALE_DECIBEL)
 948                 *snr = div_s64(c->cnr.stat[0].svalue, 100);
 949         else
 950                 *snr = 0;
 951
 952         return 0;
 953 }
 954
 955 static int m88ds3103_read_ber(struct dvb_frontend *fe, u32 *ber)
 956 {
 957         struct m88ds3103_dev *dev = fe->demodulator_priv;
 958
 959         *ber = dev->dvbv3_ber;
 960
 961         return 0;
 962 }
 963
 964 static int m88ds3103_set_tone(struct dvb_frontend *fe,
 965         enum fe_sec_tone_mode fe_sec_tone_mode)
 966 {
 967         struct m88ds3103_dev *dev = fe->demodulator_priv;
 968         struct i2c_client *client = dev->client;
 969         int ret;
 970         unsigned int utmp, tone, reg_a1_mask;
 971
 972         dev_dbg(&client->dev, "fe_sec_tone_mode=%d\n", fe_sec_tone_mode);
 973
 974         if (!dev->warm) {
 975                 ret = -EAGAIN;
 976                 goto err;
 977         }
 978
 979         switch (fe_sec_tone_mode) {
 980         case SEC_TONE_ON:
 981                 tone = 0;
 982                 reg_a1_mask = 0x47;
 983                 break;
 984         case SEC_TONE_OFF:
 985                 tone = 1;
 986                 reg_a1_mask = 0x00;
 987                 break;
 988         default:
 989                 dev_dbg(&client->dev, "invalid fe_sec_tone_mode\n");
 990                 ret = -EINVAL;
 991                 goto err;
 992         }
 993
 994         utmp = tone << 7 | dev->cfg->envelope_mode << 5;
 995         ret = regmap_update_bits(dev->regmap, 0xa2, 0xe0, utmp);
 996         if (ret)
 997                 goto err;
 998
 999         utmp = 1 << 2;
1000         ret = regmap_update_bits(dev->regmap, 0xa1, reg_a1_mask, utmp);
1001         if (ret)
1002                 goto err;
1003
1004         return 0;
1005 err:
1006         dev_dbg(&client->dev, "failed=%d\n", ret);
1007         return ret;
1008 }
1009
1010 static int m88ds3103_set_voltage(struct dvb_frontend *fe,
1011         enum fe_sec_voltage fe_sec_voltage)
1012 {
1013         struct m88ds3103_dev *dev = fe->demodulator_priv;
1014         struct i2c_client *client = dev->client;
1015         int ret;
1016         unsigned int utmp;
1017         bool voltage_sel, voltage_dis;
1018
1019         dev_dbg(&client->dev, "fe_sec_voltage=%d\n", fe_sec_voltage);
1020
1021         if (!dev->warm) {
1022                 ret = -EAGAIN;
1023                 goto err;
1024         }
1025
1026         switch (fe_sec_voltage) {
1027         case SEC_VOLTAGE_18:
1028                 voltage_sel = true;
1029                 voltage_dis = false;
1030                 break;
1031         case SEC_VOLTAGE_13:
1032                 voltage_sel = false;
1033                 voltage_dis = false;
1034                 break;
1035         case SEC_VOLTAGE_OFF:
1036                 voltage_sel = false;
1037                 voltage_dis = true;
1038                 break;
1039         default:
1040                 dev_dbg(&client->dev, "invalid fe_sec_voltage\n");
1041                 ret = -EINVAL;
1042                 goto err;
1043         }
1044
1045         /* output pin polarity */
1046         voltage_sel ^= dev->cfg->lnb_hv_pol;
1047         voltage_dis ^= dev->cfg->lnb_en_pol;
1048
1049         utmp = voltage_dis << 1 | voltage_sel << 0;
1050         ret = regmap_update_bits(dev->regmap, 0xa2, 0x03, utmp);
1051         if (ret)
1052                 goto err;
1053
1054         return 0;
1055 err:
1056         dev_dbg(&client->dev, "failed=%d\n", ret);
1057         return ret;
1058 }
1059
1060 static int m88ds3103_diseqc_send_master_cmd(struct dvb_frontend *fe,
1061                 struct dvb_diseqc_master_cmd *diseqc_cmd)
1062 {
1063         struct m88ds3103_dev *dev = fe->demodulator_priv;
1064         struct i2c_client *client = dev->client;
1065         int ret;
1066         unsigned int utmp;
1067         unsigned long timeout;
1068
1069         dev_dbg(&client->dev, "msg=%*ph\n",
1070                 diseqc_cmd->msg_len, diseqc_cmd->msg);
1071
1072         if (!dev->warm) {
1073                 ret = -EAGAIN;
1074                 goto err;
1075         }
1076
1077         if (diseqc_cmd->msg_len < 3 || diseqc_cmd->msg_len > 6) {
1078                 ret = -EINVAL;
1079                 goto err;
1080         }
1081
1082         utmp = dev->cfg->envelope_mode << 5;
1083         ret = regmap_update_bits(dev->regmap, 0xa2, 0xe0, utmp);
1084         if (ret)
1085                 goto err;
1086
1087         ret = regmap_bulk_write(dev->regmap, 0xa3, diseqc_cmd->msg,
1088                         diseqc_cmd->msg_len);
1089         if (ret)
1090                 goto err;
1091
1092         ret = regmap_write(dev->regmap, 0xa1,
1093                         (diseqc_cmd->msg_len - 1) << 3 | 0x07);
1094         if (ret)
1095                 goto err;
1096
1097         /* wait DiSEqC TX ready */
1098         #define SEND_MASTER_CMD_TIMEOUT 120
1099         timeout = jiffies + msecs_to_jiffies(SEND_MASTER_CMD_TIMEOUT);
1100
1101         /* DiSEqC message typical period is 54 ms */
1102         usleep_range(50000, 54000);
1103
1104         for (utmp = 1; !time_after(jiffies, timeout) && utmp;) {
1105                 ret = regmap_read(dev->regmap, 0xa1, &utmp);
1106                 if (ret)
1107                         goto err;
1108                 utmp = (utmp >> 6) & 0x1;
1109         }
1110
1111         if (utmp == 0) {
1112                 dev_dbg(&client->dev, "diseqc tx took %u ms\n",
1113                         jiffies_to_msecs(jiffies) -
1114                         (jiffies_to_msecs(timeout) - SEND_MASTER_CMD_TIMEOUT));
1115         } else {
1116                 dev_dbg(&client->dev, "diseqc tx timeout\n");
1117
1118                 ret = regmap_update_bits(dev->regmap, 0xa1, 0xc0, 0x40);
1119                 if (ret)
1120                         goto err;
1121         }
1122
1123         ret = regmap_update_bits(dev->regmap, 0xa2, 0xc0, 0x80);
1124         if (ret)
1125                 goto err;
1126
1127         if (utmp == 1) {
1128                 ret = -ETIMEDOUT;
1129                 goto err;
1130         }
1131
1132         return 0;
1133 err:
1134         dev_dbg(&client->dev, "failed=%d\n", ret);
1135         return ret;
1136 }
1137
1138 static int m88ds3103_diseqc_send_burst(struct dvb_frontend *fe,
1139         enum fe_sec_mini_cmd fe_sec_mini_cmd)
1140 {
1141         struct m88ds3103_dev *dev = fe->demodulator_priv;
1142         struct i2c_client *client = dev->client;
1143         int ret;
1144         unsigned int utmp, burst;
1145         unsigned long timeout;
1146
1147         dev_dbg(&client->dev, "fe_sec_mini_cmd=%d\n", fe_sec_mini_cmd);
1148
1149         if (!dev->warm) {
1150                 ret = -EAGAIN;
1151                 goto err;
1152         }
1153
1154         utmp = dev->cfg->envelope_mode << 5;
1155         ret = regmap_update_bits(dev->regmap, 0xa2, 0xe0, utmp);
1156         if (ret)
1157                 goto err;
1158
1159         switch (fe_sec_mini_cmd) {
1160         case SEC_MINI_A:
1161                 burst = 0x02;
1162                 break;
1163         case SEC_MINI_B:
1164                 burst = 0x01;
1165                 break;
1166         default:
1167                 dev_dbg(&client->dev, "invalid fe_sec_mini_cmd\n");
1168                 ret = -EINVAL;
1169                 goto err;
1170         }
1171
1172         ret = regmap_write(dev->regmap, 0xa1, burst);
1173         if (ret)
1174                 goto err;
1175
1176         /* wait DiSEqC TX ready */
1177         #define SEND_BURST_TIMEOUT 40
1178         timeout = jiffies + msecs_to_jiffies(SEND_BURST_TIMEOUT);
1179
1180         /* DiSEqC ToneBurst period is 12.5 ms */
1181         usleep_range(8500, 12500);
1182
1183         for (utmp = 1; !time_after(jiffies, timeout) && utmp;) {
1184                 ret = regmap_read(dev->regmap, 0xa1, &utmp);
1185                 if (ret)
1186                         goto err;
1187                 utmp = (utmp >> 6) & 0x1;
1188         }
1189
1190         if (utmp == 0) {
1191                 dev_dbg(&client->dev, "diseqc tx took %u ms\n",
1192                         jiffies_to_msecs(jiffies) -
1193                         (jiffies_to_msecs(timeout) - SEND_BURST_TIMEOUT));
1194         } else {
1195                 dev_dbg(&client->dev, "diseqc tx timeout\n");
1196
1197                 ret = regmap_update_bits(dev->regmap, 0xa1, 0xc0, 0x40);
1198                 if (ret)
1199                         goto err;
1200         }
1201
1202         ret = regmap_update_bits(dev->regmap, 0xa2, 0xc0, 0x80);
1203         if (ret)
1204                 goto err;
1205
1206         if (utmp == 1) {
1207                 ret = -ETIMEDOUT;
1208                 goto err;
1209         }
1210
1211         return 0;
1212 err:
1213         dev_dbg(&client->dev, "failed=%d\n", ret);
1214         return ret;
1215 }
1216
1217 static int m88ds3103_get_tune_settings(struct dvb_frontend *fe,
1218         struct dvb_frontend_tune_settings *s)
1219 {
1220         s->min_delay_ms = 3000;
1221
1222         return 0;
1223 }
1224
1225 static void m88ds3103_release(struct dvb_frontend *fe)
1226 {
1227         struct m88ds3103_dev *dev = fe->demodulator_priv;
1228         struct i2c_client *client = dev->client;
1229
1230         i2c_unregister_device(client);
1231 }
1232
1233 static int m88ds3103_select(struct i2c_adapter *adap, void *mux_priv, u32 chan)
1234 {
1235         struct m88ds3103_dev *dev = mux_priv;
1236         struct i2c_client *client = dev->client;
1237         int ret;
1238         struct i2c_msg msg = {
1239                 .addr = client->addr,
1240                 .flags = 0,
1241                 .len = 2,
1242                 .buf = "\x03\x11",
1243         };
1244
1245         /* Open tuner I2C repeater for 1 xfer, closes automatically */
1246         ret = __i2c_transfer(client->adapter, &msg, 1);
1247         if (ret != 1) {
1248                 dev_warn(&client->dev, "i2c wr failed=%d\n", ret);
1249                 if (ret >= 0)
1250                         ret = -EREMOTEIO;
1251                 return ret;
1252         }
1253
1254         return 0;
1255 }
1256
1257 /*
1258  * XXX: That is wrapper to m88ds3103_probe() via driver core in order to provide
1259  * proper I2C client for legacy media attach binding.
1260  * New users must use I2C client binding directly!
1261  */
1262 struct dvb_frontend *m88ds3103_attach(const struct m88ds3103_config *cfg,
1263                 struct i2c_adapter *i2c, struct i2c_adapter **tuner_i2c_adapter)
1264 {
1265         struct i2c_client *client;
1266         struct i2c_board_info board_info;
1267         struct m88ds3103_platform_data pdata;
1268
1269         pdata.clk = cfg->clock;
1270         pdata.i2c_wr_max = cfg->i2c_wr_max;
1271         pdata.ts_mode = cfg->ts_mode;
1272         pdata.ts_clk = cfg->ts_clk;
1273         pdata.ts_clk_pol = cfg->ts_clk_pol;
1274         pdata.spec_inv = cfg->spec_inv;
1275         pdata.agc = cfg->agc;
1276         pdata.agc_inv = cfg->agc_inv;
1277         pdata.clk_out = cfg->clock_out;
1278         pdata.envelope_mode = cfg->envelope_mode;
1279         pdata.lnb_hv_pol = cfg->lnb_hv_pol;
1280         pdata.lnb_en_pol = cfg->lnb_en_pol;
1281         pdata.attach_in_use = true;
1282
1283         memset(&board_info, 0, sizeof(board_info));
1284         strlcpy(board_info.type, "m88ds3103", I2C_NAME_SIZE);
1285         board_info.addr = cfg->i2c_addr;
1286         board_info.platform_data = &pdata;
1287         client = i2c_new_device(i2c, &board_info);
1288         if (!client || !client->dev.driver)
1289                 return NULL;
1290
1291         *tuner_i2c_adapter = pdata.get_i2c_adapter(client);
1292         return pdata.get_dvb_frontend(client);
1293 }
1294 EXPORT_SYMBOL(m88ds3103_attach);
1295
1296 static struct dvb_frontend_ops m88ds3103_ops = {
1297         .delsys = {SYS_DVBS, SYS_DVBS2},
1298         .info = {
1299                 .name = "Montage Technology M88DS3103",
1300                 .frequency_min =  950000,
1301                 .frequency_max = 2150000,
1302                 .frequency_tolerance = 5000,
1303                 .symbol_rate_min =  1000000,
1304                 .symbol_rate_max = 45000000,
1305                 .caps = FE_CAN_INVERSION_AUTO |
1306                         FE_CAN_FEC_1_2 |
1307                         FE_CAN_FEC_2_3 |
1308                         FE_CAN_FEC_3_4 |
1309                         FE_CAN_FEC_4_5 |
1310                         FE_CAN_FEC_5_6 |
1311                         FE_CAN_FEC_6_7 |
1312                         FE_CAN_FEC_7_8 |
1313                         FE_CAN_FEC_8_9 |
1314                         FE_CAN_FEC_AUTO |
1315                         FE_CAN_QPSK |
1316                         FE_CAN_RECOVER |
1317                         FE_CAN_2G_MODULATION
1318         },
1319
1320         .release = m88ds3103_release,
1321
1322         .get_tune_settings = m88ds3103_get_tune_settings,
1323
1324         .init = m88ds3103_init,
1325         .sleep = m88ds3103_sleep,
1326
1327         .set_frontend = m88ds3103_set_frontend,
1328         .get_frontend = m88ds3103_get_frontend,
1329
1330         .read_status = m88ds3103_read_status,
1331         .read_snr = m88ds3103_read_snr,
1332         .read_ber = m88ds3103_read_ber,
1333
1334         .diseqc_send_master_cmd = m88ds3103_diseqc_send_master_cmd,
1335         .diseqc_send_burst = m88ds3103_diseqc_send_burst,
1336
1337         .set_tone = m88ds3103_set_tone,
1338         .set_voltage = m88ds3103_set_voltage,
1339 };
1340
1341 static struct dvb_frontend *m88ds3103_get_dvb_frontend(struct i2c_client *client)
1342 {
1343         struct m88ds3103_dev *dev = i2c_get_clientdata(client);
1344
1345         dev_dbg(&client->dev, "\n");
1346
1347         return &dev->fe;
1348 }
1349
1350 static struct i2c_adapter *m88ds3103_get_i2c_adapter(struct i2c_client *client)
1351 {
1352         struct m88ds3103_dev *dev = i2c_get_clientdata(client);
1353
1354         dev_dbg(&client->dev, "\n");
1355
1356         return dev->i2c_adapter;
1357 }
1358
1359 static int m88ds3103_probe(struct i2c_client *client,
1360                         const struct i2c_device_id *id)
1361 {
1362         struct m88ds3103_dev *dev;
1363         struct m88ds3103_platform_data *pdata = client->dev.platform_data;
1364         int ret;
1365         unsigned int utmp;
1366
1367         dev = kzalloc(sizeof(*dev), GFP_KERNEL);
1368         if (!dev) {
1369                 ret = -ENOMEM;
1370                 goto err;
1371         }
1372
1373         dev->client = client;
1374         dev->config.clock = pdata->clk;
1375         dev->config.i2c_wr_max = pdata->i2c_wr_max;
1376         dev->config.ts_mode = pdata->ts_mode;
1377         dev->config.ts_clk = pdata->ts_clk;
1378         dev->config.ts_clk_pol = pdata->ts_clk_pol;
1379         dev->config.spec_inv = pdata->spec_inv;
1380         dev->config.agc_inv = pdata->agc_inv;
1381         dev->config.clock_out = pdata->clk_out;
1382         dev->config.envelope_mode = pdata->envelope_mode;
1383         dev->config.agc = pdata->agc;
1384         dev->config.lnb_hv_pol = pdata->lnb_hv_pol;
1385         dev->config.lnb_en_pol = pdata->lnb_en_pol;
1386         dev->cfg = &dev->config;
1387         /* create regmap */
1388         dev->regmap_config.reg_bits = 8,
1389         dev->regmap_config.val_bits = 8,
1390         dev->regmap_config.lock_arg = dev,
1391         dev->regmap = devm_regmap_init_i2c(client, &dev->regmap_config);
1392         if (IS_ERR(dev->regmap)) {
1393                 ret = PTR_ERR(dev->regmap);
1394                 goto err_kfree;
1395         }
1396
1397         /* 0x00: chip id[6:0], 0x01: chip ver[7:0], 0x02: chip ver[15:8] */
1398         ret = regmap_read(dev->regmap, 0x00, &utmp);
1399         if (ret)
1400                 goto err_kfree;
1401
1402         dev->chip_id = utmp >> 1;
1403         dev_dbg(&client->dev, "chip_id=%02x\n", dev->chip_id);
1404
1405         switch (dev->chip_id) {
1406         case M88RS6000_CHIP_ID:
1407         case M88DS3103_CHIP_ID:
1408                 break;
1409         default:
1410                 goto err_kfree;
1411         }
1412
1413         switch (dev->cfg->clock_out) {
1414         case M88DS3103_CLOCK_OUT_DISABLED:
1415                 utmp = 0x80;
1416                 break;
1417         case M88DS3103_CLOCK_OUT_ENABLED:
1418                 utmp = 0x00;
1419                 break;
1420         case M88DS3103_CLOCK_OUT_ENABLED_DIV2:
1421                 utmp = 0x10;
1422                 break;
1423         default:
1424                 ret = -EINVAL;
1425                 goto err_kfree;
1426         }
1427
1428         /* 0x29 register is defined differently for m88rs6000. */
1429         /* set internal tuner address to 0x21 */
1430         if (dev->chip_id == M88RS6000_CHIP_ID)
1431                 utmp = 0x00;
1432
1433         ret = regmap_write(dev->regmap, 0x29, utmp);
1434         if (ret)
1435                 goto err_kfree;
1436
1437         /* sleep */
1438         ret = regmap_update_bits(dev->regmap, 0x08, 0x01, 0x00);
1439         if (ret)
1440                 goto err_kfree;
1441         ret = regmap_update_bits(dev->regmap, 0x04, 0x01, 0x01);
1442         if (ret)
1443                 goto err_kfree;
1444         ret = regmap_update_bits(dev->regmap, 0x23, 0x10, 0x10);
1445         if (ret)
1446                 goto err_kfree;
1447
1448         /* create mux i2c adapter for tuner */
1449         dev->i2c_adapter = i2c_add_mux_adapter(client->adapter, &client->dev,
1450                                                dev, 0, 0, 0, m88ds3103_select,
1451                                                NULL);
1452         if (dev->i2c_adapter == NULL) {
1453                 ret = -ENOMEM;
1454                 goto err_kfree;
1455         }
1456
1457         /* create dvb_frontend */
1458         memcpy(&dev->fe.ops, &m88ds3103_ops, sizeof(struct dvb_frontend_ops));
1459         if (dev->chip_id == M88RS6000_CHIP_ID)
1460                 strncpy(dev->fe.ops.info.name, "Montage Technology M88RS6000",
1461                         sizeof(dev->fe.ops.info.name));
1462         if (!pdata->attach_in_use)
1463                 dev->fe.ops.release = NULL;
1464         dev->fe.demodulator_priv = dev;
1465         i2c_set_clientdata(client, dev);
1466
1467         /* setup callbacks */
1468         pdata->get_dvb_frontend = m88ds3103_get_dvb_frontend;
1469         pdata->get_i2c_adapter = m88ds3103_get_i2c_adapter;
1470         return 0;
1471 err_kfree:
1472         kfree(dev);
1473 err:
1474         dev_dbg(&client->dev, "failed=%d\n", ret);
1475         return ret;
1476 }
1477
1478 static int m88ds3103_remove(struct i2c_client *client)
1479 {
1480         struct m88ds3103_dev *dev = i2c_get_clientdata(client);
1481
1482         dev_dbg(&client->dev, "\n");
1483
1484         i2c_del_mux_adapter(dev->i2c_adapter);
1485
1486         kfree(dev);
1487         return 0;
1488 }
1489
1490 static const struct i2c_device_id m88ds3103_id_table[] = {
1491         {"m88ds3103", 0},
1492         {}
1493 };
1494 MODULE_DEVICE_TABLE(i2c, m88ds3103_id_table);
1495
1496 static struct i2c_driver m88ds3103_driver = {
1497         .driver = {
1498                 .name   = "m88ds3103",
1499                 .suppress_bind_attrs = true,
1500         },
1501         .probe          = m88ds3103_probe,
1502         .remove         = m88ds3103_remove,
1503         .id_table       = m88ds3103_id_table,
1504 };
1505
1506 module_i2c_driver(m88ds3103_driver);
1507
1508 MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
1509 MODULE_DESCRIPTION("Montage Technology M88DS3103 DVB-S/S2 demodulator driver");
1510 MODULE_LICENSE("GPL");
1511 MODULE_FIRMWARE(M88DS3103_FIRMWARE);
1512 MODULE_FIRMWARE(M88RS6000_FIRMWARE);