drivers/media/pci/netup_unidvb/netup_unidvb_spi.c

   1 /*
   2  * netup_unidvb_spi.c
   3  *
   4  * Internal SPI driver for NetUP Universal Dual DVB-CI
   5  *
   6  * Copyright (C) 2014 NetUP Inc.
   7  * Copyright (C) 2014 Sergey Kozlov <serjk@netup.ru>
   8  * Copyright (C) 2014 Abylay Ospan <aospan@netup.ru>
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License as published by
  12  * the Free Software Foundation; either version 2 of the License, or
  13  * (at your option) any later version.
  14  *
  15  * This program is distributed in the hope that it will be useful,
  16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18  * GNU General Public License for more details.
  19  */
  20
  21 #include "netup_unidvb.h"
  22 #include <linux/spi/spi.h>
  23 #include <linux/spi/flash.h>
  24 #include <linux/mtd/partitions.h>
  25 #include <mtd/mtd-abi.h>
  26
  27 #define NETUP_SPI_CTRL_IRQ      0x1000
  28 #define NETUP_SPI_CTRL_IMASK    0x2000
  29 #define NETUP_SPI_CTRL_START    0x8000
  30 #define NETUP_SPI_CTRL_LAST_CS  0x4000
  31
  32 #define NETUP_SPI_TIMEOUT       6000
  33
  34 enum netup_spi_state {
  35         SPI_STATE_START,
  36         SPI_STATE_DONE,
  37 };
  38
  39 struct netup_spi_regs {
  40         __u8    data[1024];
  41         __le16  control_stat;
  42         __le16  clock_divider;
  43 } __packed __aligned(1);
  44
  45 struct netup_spi {
  46         struct device                   *dev;
  47         struct spi_master               *master;
  48         struct netup_spi_regs           *regs;
  49         u8 __iomem                      *mmio;
  50         spinlock_t                      lock;
  51         wait_queue_head_t               waitq;
  52         enum netup_spi_state            state;
  53 };
  54
  55 static char netup_spi_name[64] = "fpga";
  56
  57 static struct mtd_partition netup_spi_flash_partitions = {
  58         .name = netup_spi_name,
  59         .size = 0x1000000, /* 16MB */
  60         .offset = 0,
  61         .mask_flags = MTD_CAP_ROM
  62 };
  63
  64 static struct flash_platform_data spi_flash_data = {
  65         .name = "netup0_m25p128",
  66         .parts = &netup_spi_flash_partitions,
  67         .nr_parts = 1,
  68 };
  69
  70 static struct spi_board_info netup_spi_board = {
  71         .modalias = "m25p128",
  72         .max_speed_hz = 11000000,
  73         .chip_select = 0,
  74         .mode = SPI_MODE_0,
  75         .platform_data = &spi_flash_data,
  76 };
  77
  78 irqreturn_t netup_spi_interrupt(struct netup_spi *spi)
  79 {
  80         u16 reg;
  81         unsigned long flags;
  82
  83         if (!spi)
  84                 return IRQ_NONE;
  85
  86         spin_lock_irqsave(&spi->lock, flags);
  87         reg = readw(&spi->regs->control_stat);
  88         if (!(reg & NETUP_SPI_CTRL_IRQ)) {
  89                 spin_unlock_irqrestore(&spi->lock, flags);
  90                 dev_dbg(&spi->master->dev,
  91                         "%s(): not mine interrupt\n", __func__);
  92                 return IRQ_NONE;
  93         }
  94         writew(reg | NETUP_SPI_CTRL_IRQ, &spi->regs->control_stat);
  95         reg = readw(&spi->regs->control_stat);
  96         writew(reg & ~NETUP_SPI_CTRL_IMASK, &spi->regs->control_stat);
  97         spi->state = SPI_STATE_DONE;
  98         wake_up(&spi->waitq);
  99         spin_unlock_irqrestore(&spi->lock, flags);
 100         dev_dbg(&spi->master->dev,
 101                 "%s(): SPI interrupt handled\n", __func__);
 102         return IRQ_HANDLED;
 103 }
 104
 105 static int netup_spi_transfer(struct spi_master *master,
 106                               struct spi_message *msg)
 107 {
 108         struct netup_spi *spi = spi_master_get_devdata(master);
 109         struct spi_transfer *t;
 110         int result = 0;
 111         u32 tr_size;
 112
 113         /* reset CS */
 114         writew(NETUP_SPI_CTRL_LAST_CS, &spi->regs->control_stat);
 115         writew(0, &spi->regs->control_stat);
 116         list_for_each_entry(t, &msg->transfers, transfer_list) {
 117                 tr_size = t->len;
 118                 while (tr_size) {
 119                         u32 frag_offset = t->len - tr_size;
 120                         u32 frag_size = (tr_size > sizeof(spi->regs->data)) ?
 121                                         sizeof(spi->regs->data) : tr_size;
 122                         int frag_last = 0;
 123
 124                         if (list_is_last(&t->transfer_list,
 125                                         &msg->transfers) &&
 126                                         frag_offset + frag_size == t->len) {
 127                                 frag_last = 1;
 128                         }
 129                         if (t->tx_buf) {
 130                                 memcpy_toio(spi->regs->data,
 131                                         t->tx_buf + frag_offset,
 132                                         frag_size);
 133                         } else {
 134                                 memset_io(spi->regs->data,
 135                                         0, frag_size);
 136                         }
 137                         spi->state = SPI_STATE_START;
 138                         writew((frag_size & 0x3ff) |
 139                                 NETUP_SPI_CTRL_IMASK |
 140                                 NETUP_SPI_CTRL_START |
 141                                 (frag_last ? NETUP_SPI_CTRL_LAST_CS : 0),
 142                                 &spi->regs->control_stat);
 143                         dev_dbg(&spi->master->dev,
 144                                 "%s(): control_stat 0x%04x\n",
 145                                 __func__, readw(&spi->regs->control_stat));
 146                         wait_event_timeout(spi->waitq,
 147                                 spi->state != SPI_STATE_START,
 148                                 msecs_to_jiffies(NETUP_SPI_TIMEOUT));
 149                         if (spi->state == SPI_STATE_DONE) {
 150                                 if (t->rx_buf) {
 151                                         memcpy_fromio(t->rx_buf + frag_offset,
 152                                                 spi->regs->data, frag_size);
 153                                 }
 154                         } else {
 155                                 if (spi->state == SPI_STATE_START) {
 156                                         dev_dbg(&spi->master->dev,
 157                                                 "%s(): transfer timeout\n",
 158                                                 __func__);
 159                                 } else {
 160                                         dev_dbg(&spi->master->dev,
 161                                                 "%s(): invalid state %d\n",
 162                                                 __func__, spi->state);
 163                                 }
 164                                 result = -EIO;
 165                                 goto done;
 166                         }
 167                         tr_size -= frag_size;
 168                         msg->actual_length += frag_size;
 169                 }
 170         }
 171 done:
 172         msg->status = result;
 173         spi_finalize_current_message(master);
 174         return result;
 175 }
 176
 177 static int netup_spi_setup(struct spi_device *spi)
 178 {
 179         return 0;
 180 }
 181
 182 int netup_spi_init(struct netup_unidvb_dev *ndev)
 183 {
 184         struct spi_master *master;
 185         struct netup_spi *nspi;
 186
 187         master = spi_alloc_master(&ndev->pci_dev->dev,
 188                 sizeof(struct netup_spi));
 189         if (!master) {
 190                 dev_err(&ndev->pci_dev->dev,
 191                         "%s(): unable to alloc SPI master\n", __func__);
 192                 return -EINVAL;
 193         }
 194         nspi = spi_master_get_devdata(master);
 195         master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST;
 196         master->bus_num = -1;
 197         master->num_chipselect = 1;
 198         master->transfer_one_message = netup_spi_transfer;
 199         master->setup = netup_spi_setup;
 200         spin_lock_init(&nspi->lock);
 201         init_waitqueue_head(&nspi->waitq);
 202         nspi->master = master;
 203         nspi->regs = (struct netup_spi_regs *)(ndev->bmmio0 + 0x4000);
 204         writew(2, &nspi->regs->clock_divider);
 205         writew(NETUP_UNIDVB_IRQ_SPI, ndev->bmmio0 + REG_IMASK_SET);
 206         ndev->spi = nspi;
 207         if (spi_register_master(master)) {
 208                 ndev->spi = NULL;
 209                 dev_err(&ndev->pci_dev->dev,
 210                         "%s(): unable to register SPI bus\n", __func__);
 211                 return -EINVAL;
 212         }
 213         snprintf(netup_spi_name,
 214                 sizeof(netup_spi_name),
 215                 "fpga_%02x:%02x.%01x",
 216                 ndev->pci_bus,
 217                 ndev->pci_slot,
 218                 ndev->pci_func);
 219         if (!spi_new_device(master, &netup_spi_board)) {
 220                 ndev->spi = NULL;
 221                 dev_err(&ndev->pci_dev->dev,
 222                         "%s(): unable to create SPI device\n", __func__);
 223                 return -EINVAL;
 224         }
 225         dev_dbg(&ndev->pci_dev->dev, "%s(): SPI init OK\n", __func__);
 226         return 0;
 227 }
 228
 229 void netup_spi_release(struct netup_unidvb_dev *ndev)
 230 {
 231         u16 reg;
 232         unsigned long flags;
 233         struct netup_spi *spi = ndev->spi;
 234
 235         if (!spi)
 236                 return;
 237
 238         spin_lock_irqsave(&spi->lock, flags);
 239         reg = readw(&spi->regs->control_stat);
 240         writew(reg | NETUP_SPI_CTRL_IRQ, &spi->regs->control_stat);
 241         reg = readw(&spi->regs->control_stat);
 242         writew(reg & ~NETUP_SPI_CTRL_IMASK, &spi->regs->control_stat);
 243         spin_unlock_irqrestore(&spi->lock, flags);
 244         spi_unregister_master(spi->master);
 245         ndev->spi = NULL;
 246 }
 247
 248