drivers/net/ethernet/amd/xgbe/xgbe-drv.c

   1 /*
   2  * AMD 10Gb Ethernet driver
   3  *
   4  * This file is available to you under your choice of the following two
   5  * licenses:
   6  *
   7  * License 1: GPLv2
   8  *
   9  * Copyright (c) 2014 Advanced Micro Devices, Inc.
  10  *
  11  * This file is free software; you may copy, redistribute and/or modify
  12  * it under the terms of the GNU General Public License as published by
  13  * the Free Software Foundation, either version 2 of the License, or (at
  14  * your option) any later version.
  15  *
  16  * This file is distributed in the hope that it will be useful, but
  17  * WITHOUT ANY WARRANTY; without even the implied warranty of
  18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  19  * General Public License for more details.
  20  *
  21  * You should have received a copy of the GNU General Public License
  22  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  23  *
  24  * This file incorporates work covered by the following copyright and
  25  * permission notice:
  26  *     The Synopsys DWC ETHER XGMAC Software Driver and documentation
  27  *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,
  28  *     Inc. unless otherwise expressly agreed to in writing between Synopsys
  29  *     and you.
  30  *
  31  *     The Software IS NOT an item of Licensed Software or Licensed Product
  32  *     under any End User Software License Agreement or Agreement for Licensed
  33  *     Product with Synopsys or any supplement thereto.  Permission is hereby
  34  *     granted, free of charge, to any person obtaining a copy of this software
  35  *     annotated with this license and the Software, to deal in the Software
  36  *     without restriction, including without limitation the rights to use,
  37  *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies
  38  *     of the Software, and to permit persons to whom the Software is furnished
  39  *     to do so, subject to the following conditions:
  40  *
  41  *     The above copyright notice and this permission notice shall be included
  42  *     in all copies or substantial portions of the Software.
  43  *
  44  *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"
  45  *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  46  *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
  47  *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS
  48  *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  49  *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  50  *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  51  *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  52  *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  53  *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
  54  *     THE POSSIBILITY OF SUCH DAMAGE.
  55  *
  56  *
  57  * License 2: Modified BSD
  58  *
  59  * Copyright (c) 2014 Advanced Micro Devices, Inc.
  60  * All rights reserved.
  61  *
  62  * Redistribution and use in source and binary forms, with or without
  63  * modification, are permitted provided that the following conditions are met:
  64  *     * Redistributions of source code must retain the above copyright
  65  *       notice, this list of conditions and the following disclaimer.
  66  *     * Redistributions in binary form must reproduce the above copyright
  67  *       notice, this list of conditions and the following disclaimer in the
  68  *       documentation and/or other materials provided with the distribution.
  69  *     * Neither the name of Advanced Micro Devices, Inc. nor the
  70  *       names of its contributors may be used to endorse or promote products
  71  *       derived from this software without specific prior written permission.
  72  *
  73  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  74  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  75  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  76  * ARE DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY
  77  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  78  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  79  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  80  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  81  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  82  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  83  *
  84  * This file incorporates work covered by the following copyright and
  85  * permission notice:
  86  *     The Synopsys DWC ETHER XGMAC Software Driver and documentation
  87  *     (hereinafter "Software") is an unsupported proprietary work of Synopsys,
  88  *     Inc. unless otherwise expressly agreed to in writing between Synopsys
  89  *     and you.
  90  *
  91  *     The Software IS NOT an item of Licensed Software or Licensed Product
  92  *     under any End User Software License Agreement or Agreement for Licensed
  93  *     Product with Synopsys or any supplement thereto.  Permission is hereby
  94  *     granted, free of charge, to any person obtaining a copy of this software
  95  *     annotated with this license and the Software, to deal in the Software
  96  *     without restriction, including without limitation the rights to use,
  97  *     copy, modify, merge, publish, distribute, sublicense, and/or sell copies
  98  *     of the Software, and to permit persons to whom the Software is furnished
  99  *     to do so, subject to the following conditions:
 100  *
 101  *     The above copyright notice and this permission notice shall be included
 102  *     in all copies or substantial portions of the Software.
 103  *
 104  *     THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"
 105  *     BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
 106  *     TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
 107  *     PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS
 108  *     BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 109  *     CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 110  *     SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 111  *     INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 112  *     CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 113  *     ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
 114  *     THE POSSIBILITY OF SUCH DAMAGE.
 115  */
 116
 117 #include <linux/platform_device.h>
 118 #include <linux/spinlock.h>
 119 #include <linux/tcp.h>
 120 #include <linux/if_vlan.h>
 121 #include <net/busy_poll.h>
 122 #include <linux/clk.h>
 123 #include <linux/if_ether.h>
 124 #include <linux/net_tstamp.h>
 125 #include <linux/phy.h>
 126
 127 #include "xgbe.h"
 128 #include "xgbe-common.h"
 129
 130 static int xgbe_one_poll(struct napi_struct *, int);
 131 static int xgbe_all_poll(struct napi_struct *, int);
 132
 133 static int xgbe_alloc_channels(struct xgbe_prv_data *pdata)
 134 {
 135         struct xgbe_channel *channel_mem, *channel;
 136         struct xgbe_ring *tx_ring, *rx_ring;
 137         unsigned int count, i;
 138         int ret = -ENOMEM;
 139
 140         count = max_t(unsigned int, pdata->tx_ring_count, pdata->rx_ring_count);
 141
 142         channel_mem = kcalloc(count, sizeof(struct xgbe_channel), GFP_KERNEL);
 143         if (!channel_mem)
 144                 goto err_channel;
 145
 146         tx_ring = kcalloc(pdata->tx_ring_count, sizeof(struct xgbe_ring),
 147                           GFP_KERNEL);
 148         if (!tx_ring)
 149                 goto err_tx_ring;
 150
 151         rx_ring = kcalloc(pdata->rx_ring_count, sizeof(struct xgbe_ring),
 152                           GFP_KERNEL);
 153         if (!rx_ring)
 154                 goto err_rx_ring;
 155
 156         for (i = 0, channel = channel_mem; i < count; i++, channel++) {
 157                 snprintf(channel->name, sizeof(channel->name), "channel-%d", i);
 158                 channel->pdata = pdata;
 159                 channel->queue_index = i;
 160                 channel->dma_regs = pdata->xgmac_regs + DMA_CH_BASE +
 161                                     (DMA_CH_INC * i);
 162
 163                 if (pdata->per_channel_irq) {
 164                         /* Get the DMA interrupt (offset 1) */
 165                         ret = platform_get_irq(pdata->pdev, i + 1);
 166                         if (ret < 0) {
 167                                 netdev_err(pdata->netdev,
 168                                            "platform_get_irq %u failed\n",
 169                                            i + 1);
 170                                 goto err_irq;
 171                         }
 172
 173                         channel->dma_irq = ret;
 174                 }
 175
 176                 if (i < pdata->tx_ring_count) {
 177                         spin_lock_init(&tx_ring->lock);
 178                         channel->tx_ring = tx_ring++;
 179                 }
 180
 181                 if (i < pdata->rx_ring_count) {
 182                         spin_lock_init(&rx_ring->lock);
 183                         channel->rx_ring = rx_ring++;
 184                 }
 185
 186                 netif_dbg(pdata, drv, pdata->netdev,
 187                           "%s: dma_regs=%p, dma_irq=%d, tx=%p, rx=%p\n",
 188                           channel->name, channel->dma_regs, channel->dma_irq,
 189                           channel->tx_ring, channel->rx_ring);
 190         }
 191
 192         pdata->channel = channel_mem;
 193         pdata->channel_count = count;
 194
 195         return 0;
 196
 197 err_irq:
 198         kfree(rx_ring);
 199
 200 err_rx_ring:
 201         kfree(tx_ring);
 202
 203 err_tx_ring:
 204         kfree(channel_mem);
 205
 206 err_channel:
 207         return ret;
 208 }
 209
 210 static void xgbe_free_channels(struct xgbe_prv_data *pdata)
 211 {
 212         if (!pdata->channel)
 213                 return;
 214
 215         kfree(pdata->channel->rx_ring);
 216         kfree(pdata->channel->tx_ring);
 217         kfree(pdata->channel);
 218
 219         pdata->channel = NULL;
 220         pdata->channel_count = 0;
 221 }
 222
 223 static inline unsigned int xgbe_tx_avail_desc(struct xgbe_ring *ring)
 224 {
 225         return (ring->rdesc_count - (ring->cur - ring->dirty));
 226 }
 227
 228 static inline unsigned int xgbe_rx_dirty_desc(struct xgbe_ring *ring)
 229 {
 230         return (ring->cur - ring->dirty);
 231 }
 232
 233 static int xgbe_maybe_stop_tx_queue(struct xgbe_channel *channel,
 234                                     struct xgbe_ring *ring, unsigned int count)
 235 {
 236         struct xgbe_prv_data *pdata = channel->pdata;
 237
 238         if (count > xgbe_tx_avail_desc(ring)) {
 239                 netif_info(pdata, drv, pdata->netdev,
 240                            "Tx queue stopped, not enough descriptors available\n");
 241                 netif_stop_subqueue(pdata->netdev, channel->queue_index);
 242                 ring->tx.queue_stopped = 1;
 243
 244                 /* If we haven't notified the hardware because of xmit_more
 245                  * support, tell it now
 246                  */
 247                 if (ring->tx.xmit_more)
 248                         pdata->hw_if.tx_start_xmit(channel, ring);
 249
 250                 return NETDEV_TX_BUSY;
 251         }
 252
 253         return 0;
 254 }
 255
 256 static int xgbe_calc_rx_buf_size(struct net_device *netdev, unsigned int mtu)
 257 {
 258         unsigned int rx_buf_size;
 259
 260         if (mtu > XGMAC_JUMBO_PACKET_MTU) {
 261                 netdev_alert(netdev, "MTU exceeds maximum supported value\n");
 262                 return -EINVAL;
 263         }
 264
 265         rx_buf_size = mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
 266         rx_buf_size = clamp_val(rx_buf_size, XGBE_RX_MIN_BUF_SIZE, PAGE_SIZE);
 267
 268         rx_buf_size = (rx_buf_size + XGBE_RX_BUF_ALIGN - 1) &
 269                       ~(XGBE_RX_BUF_ALIGN - 1);
 270
 271         return rx_buf_size;
 272 }
 273
 274 static void xgbe_enable_rx_tx_ints(struct xgbe_prv_data *pdata)
 275 {
 276         struct xgbe_hw_if *hw_if = &pdata->hw_if;
 277         struct xgbe_channel *channel;
 278         enum xgbe_int int_id;
 279         unsigned int i;
 280
 281         channel = pdata->channel;
 282         for (i = 0; i < pdata->channel_count; i++, channel++) {
 283                 if (channel->tx_ring && channel->rx_ring)
 284                         int_id = XGMAC_INT_DMA_CH_SR_TI_RI;
 285                 else if (channel->tx_ring)
 286                         int_id = XGMAC_INT_DMA_CH_SR_TI;
 287                 else if (channel->rx_ring)
 288                         int_id = XGMAC_INT_DMA_CH_SR_RI;
 289                 else
 290                         continue;
 291
 292                 hw_if->enable_int(channel, int_id);
 293         }
 294 }
 295
 296 static void xgbe_disable_rx_tx_ints(struct xgbe_prv_data *pdata)
 297 {
 298         struct xgbe_hw_if *hw_if = &pdata->hw_if;
 299         struct xgbe_channel *channel;
 300         enum xgbe_int int_id;
 301         unsigned int i;
 302
 303         channel = pdata->channel;
 304         for (i = 0; i < pdata->channel_count; i++, channel++) {
 305                 if (channel->tx_ring && channel->rx_ring)
 306                         int_id = XGMAC_INT_DMA_CH_SR_TI_RI;
 307                 else if (channel->tx_ring)
 308                         int_id = XGMAC_INT_DMA_CH_SR_TI;
 309                 else if (channel->rx_ring)
 310                         int_id = XGMAC_INT_DMA_CH_SR_RI;
 311                 else
 312                         continue;
 313
 314                 hw_if->disable_int(channel, int_id);
 315         }
 316 }
 317
 318 static irqreturn_t xgbe_isr(int irq, void *data)
 319 {
 320         struct xgbe_prv_data *pdata = data;
 321         struct xgbe_hw_if *hw_if = &pdata->hw_if;
 322         struct xgbe_channel *channel;
 323         unsigned int dma_isr, dma_ch_isr;
 324         unsigned int mac_isr, mac_tssr;
 325         unsigned int i;
 326
 327         /* The DMA interrupt status register also reports MAC and MTL
 328          * interrupts. So for polling mode, we just need to check for
 329          * this register to be non-zero
 330          */
 331         dma_isr = XGMAC_IOREAD(pdata, DMA_ISR);
 332         if (!dma_isr)
 333                 goto isr_done;
 334
 335         netif_dbg(pdata, intr, pdata->netdev, "DMA_ISR=%#010x\n", dma_isr);
 336
 337         for (i = 0; i < pdata->channel_count; i++) {
 338                 if (!(dma_isr & (1 << i)))
 339                         continue;
 340
 341                 channel = pdata->channel + i;
 342
 343                 dma_ch_isr = XGMAC_DMA_IOREAD(channel, DMA_CH_SR);
 344                 netif_dbg(pdata, intr, pdata->netdev, "DMA_CH%u_ISR=%#010x\n",
 345                           i, dma_ch_isr);
 346
 347                 /* The TI or RI interrupt bits may still be set even if using
 348                  * per channel DMA interrupts. Check to be sure those are not
 349                  * enabled before using the private data napi structure.
 350                  */
 351                 if (!pdata->per_channel_irq &&
 352                     (XGMAC_GET_BITS(dma_ch_isr, DMA_CH_SR, TI) ||
 353                      XGMAC_GET_BITS(dma_ch_isr, DMA_CH_SR, RI))) {
 354                         if (napi_schedule_prep(&pdata->napi)) {
 355                                 /* Disable Tx and Rx interrupts */
 356                                 xgbe_disable_rx_tx_ints(pdata);
 357
 358                                 /* Turn on polling */
 359                                 __napi_schedule(&pdata->napi);
 360                         }
 361                 }
 362
 363                 /* Restart the device on a Fatal Bus Error */
 364                 if (XGMAC_GET_BITS(dma_ch_isr, DMA_CH_SR, FBE))
 365                         schedule_work(&pdata->restart_work);
 366
 367                 /* Clear all interrupt signals */
 368                 XGMAC_DMA_IOWRITE(channel, DMA_CH_SR, dma_ch_isr);
 369         }
 370
 371         if (XGMAC_GET_BITS(dma_isr, DMA_ISR, MACIS)) {
 372                 mac_isr = XGMAC_IOREAD(pdata, MAC_ISR);
 373
 374                 if (XGMAC_GET_BITS(mac_isr, MAC_ISR, MMCTXIS))
 375                         hw_if->tx_mmc_int(pdata);
 376
 377                 if (XGMAC_GET_BITS(mac_isr, MAC_ISR, MMCRXIS))
 378                         hw_if->rx_mmc_int(pdata);
 379
 380                 if (XGMAC_GET_BITS(mac_isr, MAC_ISR, TSIS)) {
 381                         mac_tssr = XGMAC_IOREAD(pdata, MAC_TSSR);
 382
 383                         if (XGMAC_GET_BITS(mac_tssr, MAC_TSSR, TXTSC)) {
 384                                 /* Read Tx Timestamp to clear interrupt */
 385                                 pdata->tx_tstamp =
 386                                         hw_if->get_tx_tstamp(pdata);
 387                                 schedule_work(&pdata->tx_tstamp_work);
 388                         }
 389                 }
 390         }
 391
 392 isr_done:
 393         return IRQ_HANDLED;
 394 }
 395
 396 static irqreturn_t xgbe_dma_isr(int irq, void *data)
 397 {
 398         struct xgbe_channel *channel = data;
 399
 400         /* Per channel DMA interrupts are enabled, so we use the per
 401          * channel napi structure and not the private data napi structure
 402          */
 403         if (napi_schedule_prep(&channel->napi)) {
 404                 /* Disable Tx and Rx interrupts */
 405                 disable_irq_nosync(channel->dma_irq);
 406
 407                 /* Turn on polling */
 408                 __napi_schedule(&channel->napi);
 409         }
 410
 411         return IRQ_HANDLED;
 412 }
 413
 414 static void xgbe_tx_timer(unsigned long data)
 415 {
 416         struct xgbe_channel *channel = (struct xgbe_channel *)data;
 417         struct xgbe_prv_data *pdata = channel->pdata;
 418         struct napi_struct *napi;
 419
 420         DBGPR("-->xgbe_tx_timer\n");
 421
 422         napi = (pdata->per_channel_irq) ? &channel->napi : &pdata->napi;
 423
 424         if (napi_schedule_prep(napi)) {
 425                 /* Disable Tx and Rx interrupts */
 426                 if (pdata->per_channel_irq)
 427                         disable_irq_nosync(channel->dma_irq);
 428                 else
 429                         xgbe_disable_rx_tx_ints(pdata);
 430
 431                 /* Turn on polling */
 432                 __napi_schedule(napi);
 433         }
 434
 435         channel->tx_timer_active = 0;
 436
 437         DBGPR("<--xgbe_tx_timer\n");
 438 }
 439
 440 static void xgbe_service(struct work_struct *work)
 441 {
 442         struct xgbe_prv_data *pdata = container_of(work,
 443                                                    struct xgbe_prv_data,
 444                                                    service_work);
 445
 446         pdata->phy_if.phy_status(pdata);
 447 }
 448
 449 static void xgbe_service_timer(unsigned long data)
 450 {
 451         struct xgbe_prv_data *pdata = (struct xgbe_prv_data *)data;
 452
 453         schedule_work(&pdata->service_work);
 454
 455         mod_timer(&pdata->service_timer, jiffies + HZ);
 456 }
 457
 458 static void xgbe_init_timers(struct xgbe_prv_data *pdata)
 459 {
 460         struct xgbe_channel *channel;
 461         unsigned int i;
 462
 463         setup_timer(&pdata->service_timer, xgbe_service_timer,
 464                     (unsigned long)pdata);
 465
 466         channel = pdata->channel;
 467         for (i = 0; i < pdata->channel_count; i++, channel++) {
 468                 if (!channel->tx_ring)
 469                         break;
 470
 471                 setup_timer(&channel->tx_timer, xgbe_tx_timer,
 472                             (unsigned long)channel);
 473         }
 474 }
 475
 476 static void xgbe_start_timers(struct xgbe_prv_data *pdata)
 477 {
 478         mod_timer(&pdata->service_timer, jiffies + HZ);
 479 }
 480
 481 static void xgbe_stop_timers(struct xgbe_prv_data *pdata)
 482 {
 483         struct xgbe_channel *channel;
 484         unsigned int i;
 485
 486         del_timer_sync(&pdata->service_timer);
 487
 488         channel = pdata->channel;
 489         for (i = 0; i < pdata->channel_count; i++, channel++) {
 490                 if (!channel->tx_ring)
 491                         break;
 492
 493                 del_timer_sync(&channel->tx_timer);
 494         }
 495 }
 496
 497 void xgbe_get_all_hw_features(struct xgbe_prv_data *pdata)
 498 {
 499         unsigned int mac_hfr0, mac_hfr1, mac_hfr2;
 500         struct xgbe_hw_features *hw_feat = &pdata->hw_feat;
 501
 502         DBGPR("-->xgbe_get_all_hw_features\n");
 503
 504         mac_hfr0 = XGMAC_IOREAD(pdata, MAC_HWF0R);
 505         mac_hfr1 = XGMAC_IOREAD(pdata, MAC_HWF1R);
 506         mac_hfr2 = XGMAC_IOREAD(pdata, MAC_HWF2R);
 507
 508         memset(hw_feat, 0, sizeof(*hw_feat));
 509
 510         hw_feat->version = XGMAC_IOREAD(pdata, MAC_VR);
 511
 512         /* Hardware feature register 0 */
 513         hw_feat->gmii        = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, GMIISEL);
 514         hw_feat->vlhash      = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, VLHASH);
 515         hw_feat->sma         = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, SMASEL);
 516         hw_feat->rwk         = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, RWKSEL);
 517         hw_feat->mgk         = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, MGKSEL);
 518         hw_feat->mmc         = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, MMCSEL);
 519         hw_feat->aoe         = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, ARPOFFSEL);
 520         hw_feat->ts          = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, TSSEL);
 521         hw_feat->eee         = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, EEESEL);
 522         hw_feat->tx_coe      = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, TXCOESEL);
 523         hw_feat->rx_coe      = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, RXCOESEL);
 524         hw_feat->addn_mac    = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R,
 525                                               ADDMACADRSEL);
 526         hw_feat->ts_src      = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, TSSTSSEL);
 527         hw_feat->sa_vlan_ins = XGMAC_GET_BITS(mac_hfr0, MAC_HWF0R, SAVLANINS);
 528
 529         /* Hardware feature register 1 */
 530         hw_feat->rx_fifo_size  = XGMAC_GET_BITS(mac_hfr1, MAC_HWF1R,
 531                                                 RXFIFOSIZE);
 532         hw_feat->tx_fifo_size  = XGMAC_GET_BITS(mac_hfr1, MAC_HWF1R,
 533                                                 TXFIFOSIZE);
 534         hw_feat->adv_ts_hi     = XGMAC_GET_BITS(mac_hfr1, MAC_HWF1R, ADVTHWORD);
 535         hw_feat->dma_width     = XGMAC_GET_BITS(mac_hfr1, MAC_HWF1R, ADDR64);
 536         hw_feat->dcb           = XGMAC_GET_BITS(mac_hfr1, MAC_HWF1R, DCBEN);
 537         hw_feat->sph           = XGMAC_GET_BITS(mac_hfr1, MAC_HWF1R, SPHEN);
 538         hw_feat->tso           = XGMAC_GET_BITS(mac_hfr1, MAC_HWF1R, TSOEN);
 539         hw_feat->dma_debug     = XGMAC_GET_BITS(mac_hfr1, MAC_HWF1R, DBGMEMA);
 540         hw_feat->rss           = XGMAC_GET_BITS(mac_hfr1, MAC_HWF1R, RSSEN);
 541         hw_feat->tc_cnt        = XGMAC_GET_BITS(mac_hfr1, MAC_HWF1R, NUMTC);
 542         hw_feat->hash_table_size = XGMAC_GET_BITS(mac_hfr1, MAC_HWF1R,
 543                                                   HASHTBLSZ);
 544         hw_feat->l3l4_filter_num = XGMAC_GET_BITS(mac_hfr1, MAC_HWF1R,
 545                                                   L3L4FNUM);
 546
 547         /* Hardware feature register 2 */
 548         hw_feat->rx_q_cnt     = XGMAC_GET_BITS(mac_hfr2, MAC_HWF2R, RXQCNT);
 549         hw_feat->tx_q_cnt     = XGMAC_GET_BITS(mac_hfr2, MAC_HWF2R, TXQCNT);
 550         hw_feat->rx_ch_cnt    = XGMAC_GET_BITS(mac_hfr2, MAC_HWF2R, RXCHCNT);
 551         hw_feat->tx_ch_cnt    = XGMAC_GET_BITS(mac_hfr2, MAC_HWF2R, TXCHCNT);
 552         hw_feat->pps_out_num  = XGMAC_GET_BITS(mac_hfr2, MAC_HWF2R, PPSOUTNUM);
 553         hw_feat->aux_snap_num = XGMAC_GET_BITS(mac_hfr2, MAC_HWF2R, AUXSNAPNUM);
 554
 555         /* Translate the Hash Table size into actual number */
 556         switch (hw_feat->hash_table_size) {
 557         case 0:
 558                 break;
 559         case 1:
 560                 hw_feat->hash_table_size = 64;
 561                 break;
 562         case 2:
 563                 hw_feat->hash_table_size = 128;
 564                 break;
 565         case 3:
 566                 hw_feat->hash_table_size = 256;
 567                 break;
 568         }
 569
 570         /* Translate the address width setting into actual number */
 571         switch (hw_feat->dma_width) {
 572         case 0:
 573                 hw_feat->dma_width = 32;
 574                 break;
 575         case 1:
 576                 hw_feat->dma_width = 40;
 577                 break;
 578         case 2:
 579                 hw_feat->dma_width = 48;
 580                 break;
 581         default:
 582                 hw_feat->dma_width = 32;
 583         }
 584
 585         /* The Queue, Channel and TC counts are zero based so increment them
 586          * to get the actual number
 587          */
 588         hw_feat->rx_q_cnt++;
 589         hw_feat->tx_q_cnt++;
 590         hw_feat->rx_ch_cnt++;
 591         hw_feat->tx_ch_cnt++;
 592         hw_feat->tc_cnt++;
 593
 594         DBGPR("<--xgbe_get_all_hw_features\n");
 595 }
 596
 597 static void xgbe_napi_enable(struct xgbe_prv_data *pdata, unsigned int add)
 598 {
 599         struct xgbe_channel *channel;
 600         unsigned int i;
 601
 602         if (pdata->per_channel_irq) {
 603                 channel = pdata->channel;
 604                 for (i = 0; i < pdata->channel_count; i++, channel++) {
 605                         if (add)
 606                                 netif_napi_add(pdata->netdev, &channel->napi,
 607                                                xgbe_one_poll, NAPI_POLL_WEIGHT);
 608
 609                         napi_enable(&channel->napi);
 610                 }
 611         } else {
 612                 if (add)
 613                         netif_napi_add(pdata->netdev, &pdata->napi,
 614                                        xgbe_all_poll, NAPI_POLL_WEIGHT);
 615
 616                 napi_enable(&pdata->napi);
 617         }
 618 }
 619
 620 static void xgbe_napi_disable(struct xgbe_prv_data *pdata, unsigned int del)
 621 {
 622         struct xgbe_channel *channel;
 623         unsigned int i;
 624
 625         if (pdata->per_channel_irq) {
 626                 channel = pdata->channel;
 627                 for (i = 0; i < pdata->channel_count; i++, channel++) {
 628                         napi_disable(&channel->napi);
 629
 630                         if (del)
 631                                 netif_napi_del(&channel->napi);
 632                 }
 633         } else {
 634                 napi_disable(&pdata->napi);
 635
 636                 if (del)
 637                         netif_napi_del(&pdata->napi);
 638         }
 639 }
 640
 641 static int xgbe_request_irqs(struct xgbe_prv_data *pdata)
 642 {
 643         struct xgbe_channel *channel;
 644         struct net_device *netdev = pdata->netdev;
 645         unsigned int i;
 646         int ret;
 647
 648         ret = devm_request_irq(pdata->dev, pdata->dev_irq, xgbe_isr, 0,
 649                                netdev->name, pdata);
 650         if (ret) {
 651                 netdev_alert(netdev, "error requesting irq %d\n",
 652                              pdata->dev_irq);
 653                 return ret;
 654         }
 655
 656         if (!pdata->per_channel_irq)
 657                 return 0;
 658
 659         channel = pdata->channel;
 660         for (i = 0; i < pdata->channel_count; i++, channel++) {
 661                 snprintf(channel->dma_irq_name,
 662                          sizeof(channel->dma_irq_name) - 1,
 663                          "%s-TxRx-%u", netdev_name(netdev),
 664                          channel->queue_index);
 665
 666                 ret = devm_request_irq(pdata->dev, channel->dma_irq,
 667                                        xgbe_dma_isr, 0,
 668                                        channel->dma_irq_name, channel);
 669                 if (ret) {
 670                         netdev_alert(netdev, "error requesting irq %d\n",
 671                                      channel->dma_irq);
 672                         goto err_irq;
 673                 }
 674         }
 675
 676         return 0;
 677
 678 err_irq:
 679         /* Using an unsigned int, 'i' will go to UINT_MAX and exit */
 680         for (i--, channel--; i < pdata->channel_count; i--, channel--)
 681                 devm_free_irq(pdata->dev, channel->dma_irq, channel);
 682
 683         devm_free_irq(pdata->dev, pdata->dev_irq, pdata);
 684
 685         return ret;
 686 }
 687
 688 static void xgbe_free_irqs(struct xgbe_prv_data *pdata)
 689 {
 690         struct xgbe_channel *channel;
 691         unsigned int i;
 692
 693         devm_free_irq(pdata->dev, pdata->dev_irq, pdata);
 694
 695         if (!pdata->per_channel_irq)
 696                 return;
 697
 698         channel = pdata->channel;
 699         for (i = 0; i < pdata->channel_count; i++, channel++)
 700                 devm_free_irq(pdata->dev, channel->dma_irq, channel);
 701 }
 702
 703 void xgbe_init_tx_coalesce(struct xgbe_prv_data *pdata)
 704 {
 705         struct xgbe_hw_if *hw_if = &pdata->hw_if;
 706
 707         DBGPR("-->xgbe_init_tx_coalesce\n");
 708
 709         pdata->tx_usecs = XGMAC_INIT_DMA_TX_USECS;
 710         pdata->tx_frames = XGMAC_INIT_DMA_TX_FRAMES;
 711
 712         hw_if->config_tx_coalesce(pdata);
 713
 714         DBGPR("<--xgbe_init_tx_coalesce\n");
 715 }
 716
 717 void xgbe_init_rx_coalesce(struct xgbe_prv_data *pdata)
 718 {
 719         struct xgbe_hw_if *hw_if = &pdata->hw_if;
 720
 721         DBGPR("-->xgbe_init_rx_coalesce\n");
 722
 723         pdata->rx_riwt = hw_if->usec_to_riwt(pdata, XGMAC_INIT_DMA_RX_USECS);
 724         pdata->rx_usecs = XGMAC_INIT_DMA_RX_USECS;
 725         pdata->rx_frames = XGMAC_INIT_DMA_RX_FRAMES;
 726
 727         hw_if->config_rx_coalesce(pdata);
 728
 729         DBGPR("<--xgbe_init_rx_coalesce\n");
 730 }
 731
 732 static void xgbe_free_tx_data(struct xgbe_prv_data *pdata)
 733 {
 734         struct xgbe_desc_if *desc_if = &pdata->desc_if;
 735         struct xgbe_channel *channel;
 736         struct xgbe_ring *ring;
 737         struct xgbe_ring_data *rdata;
 738         unsigned int i, j;
 739
 740         DBGPR("-->xgbe_free_tx_data\n");
 741
 742         channel = pdata->channel;
 743         for (i = 0; i < pdata->channel_count; i++, channel++) {
 744                 ring = channel->tx_ring;
 745                 if (!ring)
 746                         break;
 747
 748                 for (j = 0; j < ring->rdesc_count; j++) {
 749                         rdata = XGBE_GET_DESC_DATA(ring, j);
 750                         desc_if->unmap_rdata(pdata, rdata);
 751                 }
 752         }
 753
 754         DBGPR("<--xgbe_free_tx_data\n");
 755 }
 756
 757 static void xgbe_free_rx_data(struct xgbe_prv_data *pdata)
 758 {
 759         struct xgbe_desc_if *desc_if = &pdata->desc_if;
 760         struct xgbe_channel *channel;
 761         struct xgbe_ring *ring;
 762         struct xgbe_ring_data *rdata;
 763         unsigned int i, j;
 764
 765         DBGPR("-->xgbe_free_rx_data\n");
 766
 767         channel = pdata->channel;
 768         for (i = 0; i < pdata->channel_count; i++, channel++) {
 769                 ring = channel->rx_ring;
 770                 if (!ring)
 771                         break;
 772
 773                 for (j = 0; j < ring->rdesc_count; j++) {
 774                         rdata = XGBE_GET_DESC_DATA(ring, j);
 775                         desc_if->unmap_rdata(pdata, rdata);
 776                 }
 777         }
 778
 779         DBGPR("<--xgbe_free_rx_data\n");
 780 }
 781
 782 static int xgbe_phy_init(struct xgbe_prv_data *pdata)
 783 {
 784         pdata->phy_link = -1;
 785         pdata->phy_speed = SPEED_UNKNOWN;
 786
 787         return pdata->phy_if.phy_reset(pdata);
 788 }
 789
 790 int xgbe_powerdown(struct net_device *netdev, unsigned int caller)
 791 {
 792         struct xgbe_prv_data *pdata = netdev_priv(netdev);
 793         struct xgbe_hw_if *hw_if = &pdata->hw_if;
 794         unsigned long flags;
 795
 796         DBGPR("-->xgbe_powerdown\n");
 797
 798         if (!netif_running(netdev) ||
 799             (caller == XGMAC_IOCTL_CONTEXT && pdata->power_down)) {
 800                 netdev_alert(netdev, "Device is already powered down\n");
 801                 DBGPR("<--xgbe_powerdown\n");
 802                 return -EINVAL;
 803         }
 804
 805         spin_lock_irqsave(&pdata->lock, flags);
 806
 807         if (caller == XGMAC_DRIVER_CONTEXT)
 808                 netif_device_detach(netdev);
 809
 810         netif_tx_stop_all_queues(netdev);
 811
 812         xgbe_stop_timers(pdata);
 813         flush_workqueue(pdata->dev_workqueue);
 814
 815         hw_if->powerdown_tx(pdata);
 816         hw_if->powerdown_rx(pdata);
 817
 818         xgbe_napi_disable(pdata, 0);
 819
 820         pdata->power_down = 1;
 821
 822         spin_unlock_irqrestore(&pdata->lock, flags);
 823
 824         DBGPR("<--xgbe_powerdown\n");
 825
 826         return 0;
 827 }
 828
 829 int xgbe_powerup(struct net_device *netdev, unsigned int caller)
 830 {
 831         struct xgbe_prv_data *pdata = netdev_priv(netdev);
 832         struct xgbe_hw_if *hw_if = &pdata->hw_if;
 833         unsigned long flags;
 834
 835         DBGPR("-->xgbe_powerup\n");
 836
 837         if (!netif_running(netdev) ||
 838             (caller == XGMAC_IOCTL_CONTEXT && !pdata->power_down)) {
 839                 netdev_alert(netdev, "Device is already powered up\n");
 840                 DBGPR("<--xgbe_powerup\n");
 841                 return -EINVAL;
 842         }
 843
 844         spin_lock_irqsave(&pdata->lock, flags);
 845
 846         pdata->power_down = 0;
 847
 848         xgbe_napi_enable(pdata, 0);
 849
 850         hw_if->powerup_tx(pdata);
 851         hw_if->powerup_rx(pdata);
 852
 853         if (caller == XGMAC_DRIVER_CONTEXT)
 854                 netif_device_attach(netdev);
 855
 856         netif_tx_start_all_queues(netdev);
 857
 858         xgbe_start_timers(pdata);
 859
 860         spin_unlock_irqrestore(&pdata->lock, flags);
 861
 862         DBGPR("<--xgbe_powerup\n");
 863
 864         return 0;
 865 }
 866
 867 static int xgbe_start(struct xgbe_prv_data *pdata)
 868 {
 869         struct xgbe_hw_if *hw_if = &pdata->hw_if;
 870         struct xgbe_phy_if *phy_if = &pdata->phy_if;
 871         struct net_device *netdev = pdata->netdev;
 872         int ret;
 873
 874         DBGPR("-->xgbe_start\n");
 875
 876         hw_if->init(pdata);
 877
 878         ret = phy_if->phy_start(pdata);
 879         if (ret)
 880                 goto err_phy;
 881
 882         xgbe_napi_enable(pdata, 1);
 883
 884         ret = xgbe_request_irqs(pdata);
 885         if (ret)
 886                 goto err_napi;
 887
 888         hw_if->enable_tx(pdata);
 889         hw_if->enable_rx(pdata);
 890
 891         netif_tx_start_all_queues(netdev);
 892
 893         xgbe_start_timers(pdata);
 894         schedule_work(&pdata->service_work);
 895
 896         DBGPR("<--xgbe_start\n");
 897
 898         return 0;
 899
 900 err_napi:
 901         xgbe_napi_disable(pdata, 1);
 902
 903         phy_if->phy_stop(pdata);
 904
 905 err_phy:
 906         hw_if->exit(pdata);
 907
 908         return ret;
 909 }
 910
 911 static void xgbe_stop(struct xgbe_prv_data *pdata)
 912 {
 913         struct xgbe_hw_if *hw_if = &pdata->hw_if;
 914         struct xgbe_phy_if *phy_if = &pdata->phy_if;
 915         struct xgbe_channel *channel;
 916         struct net_device *netdev = pdata->netdev;
 917         struct netdev_queue *txq;
 918         unsigned int i;
 919
 920         DBGPR("-->xgbe_stop\n");
 921
 922         netif_tx_stop_all_queues(netdev);
 923
 924         xgbe_stop_timers(pdata);
 925         flush_workqueue(pdata->dev_workqueue);
 926
 927         hw_if->disable_tx(pdata);
 928         hw_if->disable_rx(pdata);
 929
 930         xgbe_free_irqs(pdata);
 931
 932         xgbe_napi_disable(pdata, 1);
 933
 934         phy_if->phy_stop(pdata);
 935
 936         hw_if->exit(pdata);
 937
 938         channel = pdata->channel;
 939         for (i = 0; i < pdata->channel_count; i++, channel++) {
 940                 if (!channel->tx_ring)
 941                         continue;
 942
 943                 txq = netdev_get_tx_queue(netdev, channel->queue_index);
 944                 netdev_tx_reset_queue(txq);
 945         }
 946
 947         DBGPR("<--xgbe_stop\n");
 948 }
 949
 950 static void xgbe_restart_dev(struct xgbe_prv_data *pdata)
 951 {
 952         DBGPR("-->xgbe_restart_dev\n");
 953
 954         /* If not running, "restart" will happen on open */
 955         if (!netif_running(pdata->netdev))
 956                 return;
 957
 958         xgbe_stop(pdata);
 959
 960         xgbe_free_tx_data(pdata);
 961         xgbe_free_rx_data(pdata);
 962
 963         xgbe_start(pdata);
 964
 965         DBGPR("<--xgbe_restart_dev\n");
 966 }
 967
 968 static void xgbe_restart(struct work_struct *work)
 969 {
 970         struct xgbe_prv_data *pdata = container_of(work,
 971                                                    struct xgbe_prv_data,
 972                                                    restart_work);
 973
 974         rtnl_lock();
 975
 976         xgbe_restart_dev(pdata);
 977
 978         rtnl_unlock();
 979 }
 980
 981 static void xgbe_tx_tstamp(struct work_struct *work)
 982 {
 983         struct xgbe_prv_data *pdata = container_of(work,
 984                                                    struct xgbe_prv_data,
 985                                                    tx_tstamp_work);
 986         struct skb_shared_hwtstamps hwtstamps;
 987         u64 nsec;
 988         unsigned long flags;
 989
 990         if (pdata->tx_tstamp) {
 991                 nsec = timecounter_cyc2time(&pdata->tstamp_tc,
 992                                             pdata->tx_tstamp);
 993
 994                 memset(&hwtstamps, 0, sizeof(hwtstamps));
 995                 hwtstamps.hwtstamp = ns_to_ktime(nsec);
 996                 skb_tstamp_tx(pdata->tx_tstamp_skb, &hwtstamps);
 997         }
 998
 999         dev_kfree_skb_any(pdata->tx_tstamp_skb);
1000
1001         spin_lock_irqsave(&pdata->tstamp_lock, flags);
1002         pdata->tx_tstamp_skb = NULL;
1003         spin_unlock_irqrestore(&pdata->tstamp_lock, flags);
1004 }
1005
1006 static int xgbe_get_hwtstamp_settings(struct xgbe_prv_data *pdata,
1007                                       struct ifreq *ifreq)
1008 {
1009         if (copy_to_user(ifreq->ifr_data, &pdata->tstamp_config,
1010                          sizeof(pdata->tstamp_config)))
1011                 return -EFAULT;
1012
1013         return 0;
1014 }
1015
1016 static int xgbe_set_hwtstamp_settings(struct xgbe_prv_data *pdata,
1017                                       struct ifreq *ifreq)
1018 {
1019         struct hwtstamp_config config;
1020         unsigned int mac_tscr;
1021
1022         if (copy_from_user(&config, ifreq->ifr_data, sizeof(config)))
1023                 return -EFAULT;
1024
1025         if (config.flags)
1026                 return -EINVAL;
1027
1028         mac_tscr = 0;
1029
1030         switch (config.tx_type) {
1031         case HWTSTAMP_TX_OFF:
1032                 break;
1033
1034         case HWTSTAMP_TX_ON:
1035                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);
1036                 break;
1037
1038         default:
1039                 return -ERANGE;
1040         }
1041
1042         switch (config.rx_filter) {
1043         case HWTSTAMP_FILTER_NONE:
1044                 break;
1045
1046         case HWTSTAMP_FILTER_ALL:
1047                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENALL, 1);
1048                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);
1049                 break;
1050
1051         /* PTP v2, UDP, any kind of event packet */
1052         case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
1053                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1);
1054         /* PTP v1, UDP, any kind of event packet */
1055         case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
1056                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV4ENA, 1);
1057                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV6ENA, 1);
1058                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, SNAPTYPSEL, 1);
1059                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);
1060                 break;
1061
1062         /* PTP v2, UDP, Sync packet */
1063         case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
1064                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1);
1065         /* PTP v1, UDP, Sync packet */
1066         case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
1067                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV4ENA, 1);
1068                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV6ENA, 1);
1069                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSEVNTENA, 1);
1070                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);
1071                 break;
1072
1073         /* PTP v2, UDP, Delay_req packet */
1074         case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
1075                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1);
1076         /* PTP v1, UDP, Delay_req packet */
1077         case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
1078                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV4ENA, 1);
1079                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV6ENA, 1);
1080                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSEVNTENA, 1);
1081                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSMSTRENA, 1);
1082                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);
1083                 break;
1084
1085         /* 802.AS1, Ethernet, any kind of event packet */
1086         case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
1087                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, AV8021ASMEN, 1);
1088                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, SNAPTYPSEL, 1);
1089                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);
1090                 break;
1091
1092         /* 802.AS1, Ethernet, Sync packet */
1093         case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
1094                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, AV8021ASMEN, 1);
1095                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSEVNTENA, 1);
1096                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);
1097                 break;
1098
1099         /* 802.AS1, Ethernet, Delay_req packet */
1100         case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
1101                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, AV8021ASMEN, 1);
1102                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSMSTRENA, 1);
1103                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSEVNTENA, 1);
1104                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);
1105                 break;
1106
1107         /* PTP v2/802.AS1, any layer, any kind of event packet */
1108         case HWTSTAMP_FILTER_PTP_V2_EVENT:
1109                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1);
1110                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPENA, 1);
1111                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV4ENA, 1);
1112                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV6ENA, 1);
1113                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, SNAPTYPSEL, 1);
1114                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);
1115                 break;
1116
1117         /* PTP v2/802.AS1, any layer, Sync packet */
1118         case HWTSTAMP_FILTER_PTP_V2_SYNC:
1119                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1);
1120                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPENA, 1);
1121                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV4ENA, 1);
1122                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV6ENA, 1);
1123                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSEVNTENA, 1);
1124                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);
1125                 break;
1126
1127         /* PTP v2/802.AS1, any layer, Delay_req packet */
1128         case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
1129                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1);
1130                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPENA, 1);
1131                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV4ENA, 1);
1132                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV6ENA, 1);
1133                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSMSTRENA, 1);
1134                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSEVNTENA, 1);
1135                 XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSENA, 1);
1136                 break;
1137
1138         default:
1139                 return -ERANGE;
1140         }
1141
1142         pdata->hw_if.config_tstamp(pdata, mac_tscr);
1143
1144         memcpy(&pdata->tstamp_config, &config, sizeof(config));
1145
1146         return 0;
1147 }
1148
1149 static void xgbe_prep_tx_tstamp(struct xgbe_prv_data *pdata,
1150                                 struct sk_buff *skb,
1151                                 struct xgbe_packet_data *packet)
1152 {
1153         unsigned long flags;
1154
1155         if (XGMAC_GET_BITS(packet->attributes, TX_PACKET_ATTRIBUTES, PTP)) {
1156                 spin_lock_irqsave(&pdata->tstamp_lock, flags);
1157                 if (pdata->tx_tstamp_skb) {
1158                         /* Another timestamp in progress, ignore this one */
1159                         XGMAC_SET_BITS(packet->attributes,
1160                                        TX_PACKET_ATTRIBUTES, PTP, 0);
1161                 } else {
1162                         pdata->tx_tstamp_skb = skb_get(skb);
1163                         skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
1164                 }
1165                 spin_unlock_irqrestore(&pdata->tstamp_lock, flags);
1166         }
1167
1168         if (!XGMAC_GET_BITS(packet->attributes, TX_PACKET_ATTRIBUTES, PTP))
1169                 skb_tx_timestamp(skb);
1170 }
1171
1172 static void xgbe_prep_vlan(struct sk_buff *skb, struct xgbe_packet_data *packet)
1173 {
1174         if (skb_vlan_tag_present(skb))
1175                 packet->vlan_ctag = skb_vlan_tag_get(skb);
1176 }
1177
1178 static int xgbe_prep_tso(struct sk_buff *skb, struct xgbe_packet_data *packet)
1179 {
1180         int ret;
1181
1182         if (!XGMAC_GET_BITS(packet->attributes, TX_PACKET_ATTRIBUTES,
1183                             TSO_ENABLE))
1184                 return 0;
1185
1186         ret = skb_cow_head(skb, 0);
1187         if (ret)
1188                 return ret;
1189
1190         packet->header_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
1191         packet->tcp_header_len = tcp_hdrlen(skb);
1192         packet->tcp_payload_len = skb->len - packet->header_len;
1193         packet->mss = skb_shinfo(skb)->gso_size;
1194         DBGPR("  packet->header_len=%u\n", packet->header_len);
1195         DBGPR("  packet->tcp_header_len=%u, packet->tcp_payload_len=%u\n",
1196               packet->tcp_header_len, packet->tcp_payload_len);
1197         DBGPR("  packet->mss=%u\n", packet->mss);
1198
1199         /* Update the number of packets that will ultimately be transmitted
1200          * along with the extra bytes for each extra packet
1201          */
1202         packet->tx_packets = skb_shinfo(skb)->gso_segs;
1203         packet->tx_bytes += (packet->tx_packets - 1) * packet->header_len;
1204
1205         return 0;
1206 }
1207
1208 static int xgbe_is_tso(struct sk_buff *skb)
1209 {
1210         if (skb->ip_summed != CHECKSUM_PARTIAL)
1211                 return 0;
1212
1213         if (!skb_is_gso(skb))
1214                 return 0;
1215
1216         DBGPR("  TSO packet to be processed\n");
1217
1218         return 1;
1219 }
1220
1221 static void xgbe_packet_info(struct xgbe_prv_data *pdata,
1222                              struct xgbe_ring *ring, struct sk_buff *skb,
1223                              struct xgbe_packet_data *packet)
1224 {
1225         struct skb_frag_struct *frag;
1226         unsigned int context_desc;
1227         unsigned int len;
1228         unsigned int i;
1229
1230         packet->skb = skb;
1231
1232         context_desc = 0;
1233         packet->rdesc_count = 0;
1234
1235         packet->tx_packets = 1;
1236         packet->tx_bytes = skb->len;
1237
1238         if (xgbe_is_tso(skb)) {
1239                 /* TSO requires an extra descriptor if mss is different */
1240                 if (skb_shinfo(skb)->gso_size != ring->tx.cur_mss) {
1241                         context_desc = 1;
1242                         packet->rdesc_count++;
1243                 }
1244
1245                 /* TSO requires an extra descriptor for TSO header */
1246                 packet->rdesc_count++;
1247
1248                 XGMAC_SET_BITS(packet->attributes, TX_PACKET_ATTRIBUTES,
1249                                TSO_ENABLE, 1);
1250                 XGMAC_SET_BITS(packet->attributes, TX_PACKET_ATTRIBUTES,
1251                                CSUM_ENABLE, 1);
1252         } else if (skb->ip_summed == CHECKSUM_PARTIAL)
1253                 XGMAC_SET_BITS(packet->attributes, TX_PACKET_ATTRIBUTES,
1254                                CSUM_ENABLE, 1);
1255
1256         if (skb_vlan_tag_present(skb)) {
1257                 /* VLAN requires an extra descriptor if tag is different */
1258                 if (skb_vlan_tag_get(skb) != ring->tx.cur_vlan_ctag)
1259                         /* We can share with the TSO context descriptor */
1260                         if (!context_desc) {
1261                                 context_desc = 1;
1262                                 packet->rdesc_count++;
1263                         }
1264
1265                 XGMAC_SET_BITS(packet->attributes, TX_PACKET_ATTRIBUTES,
1266                                VLAN_CTAG, 1);
1267         }
1268
1269         if ((skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
1270             (pdata->tstamp_config.tx_type == HWTSTAMP_TX_ON))
1271                 XGMAC_SET_BITS(packet->attributes, TX_PACKET_ATTRIBUTES,
1272                                PTP, 1);
1273
1274         for (len = skb_headlen(skb); len;) {
1275                 packet->rdesc_count++;
1276                 len -= min_t(unsigned int, len, XGBE_TX_MAX_BUF_SIZE);
1277         }
1278
1279         for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
1280                 frag = &skb_shinfo(skb)->frags[i];
1281                 for (len = skb_frag_size(frag); len; ) {
1282                         packet->rdesc_count++;
1283                         len -= min_t(unsigned int, len, XGBE_TX_MAX_BUF_SIZE);
1284                 }
1285         }
1286 }
1287
1288 static int xgbe_open(struct net_device *netdev)
1289 {
1290         struct xgbe_prv_data *pdata = netdev_priv(netdev);
1291         struct xgbe_desc_if *desc_if = &pdata->desc_if;
1292         int ret;
1293
1294         DBGPR("-->xgbe_open\n");
1295
1296         /* Initialize the phy */
1297         ret = xgbe_phy_init(pdata);
1298         if (ret)
1299                 return ret;
1300
1301         /* Enable the clocks */
1302         ret = clk_prepare_enable(pdata->sysclk);
1303         if (ret) {
1304                 netdev_alert(netdev, "dma clk_prepare_enable failed\n");
1305                 return ret;
1306         }
1307
1308         ret = clk_prepare_enable(pdata->ptpclk);
1309         if (ret) {
1310                 netdev_alert(netdev, "ptp clk_prepare_enable failed\n");
1311                 goto err_sysclk;
1312         }
1313
1314         /* Calculate the Rx buffer size before allocating rings */
1315         ret = xgbe_calc_rx_buf_size(netdev, netdev->mtu);
1316         if (ret < 0)
1317                 goto err_ptpclk;
1318         pdata->rx_buf_size = ret;
1319
1320         /* Allocate the channel and ring structures */
1321         ret = xgbe_alloc_channels(pdata);
1322         if (ret)
1323                 goto err_ptpclk;
1324
1325         /* Allocate the ring descriptors and buffers */
1326         ret = desc_if->alloc_ring_resources(pdata);
1327         if (ret)
1328                 goto err_channels;
1329
1330         INIT_WORK(&pdata->service_work, xgbe_service);
1331         INIT_WORK(&pdata->restart_work, xgbe_restart);
1332         INIT_WORK(&pdata->tx_tstamp_work, xgbe_tx_tstamp);
1333         xgbe_init_timers(pdata);
1334
1335         ret = xgbe_start(pdata);
1336         if (ret)
1337                 goto err_rings;
1338
1339         clear_bit(XGBE_DOWN, &pdata->dev_state);
1340
1341         DBGPR("<--xgbe_open\n");
1342
1343         return 0;
1344
1345 err_rings:
1346         desc_if->free_ring_resources(pdata);
1347
1348 err_channels:
1349         xgbe_free_channels(pdata);
1350
1351 err_ptpclk:
1352         clk_disable_unprepare(pdata->ptpclk);
1353
1354 err_sysclk:
1355         clk_disable_unprepare(pdata->sysclk);
1356
1357         return ret;
1358 }
1359
1360 static int xgbe_close(struct net_device *netdev)
1361 {
1362         struct xgbe_prv_data *pdata = netdev_priv(netdev);
1363         struct xgbe_desc_if *desc_if = &pdata->desc_if;
1364
1365         DBGPR("-->xgbe_close\n");
1366
1367         /* Stop the device */
1368         xgbe_stop(pdata);
1369
1370         /* Free the ring descriptors and buffers */
1371         desc_if->free_ring_resources(pdata);
1372
1373         /* Free the channel and ring structures */
1374         xgbe_free_channels(pdata);
1375
1376         /* Disable the clocks */
1377         clk_disable_unprepare(pdata->ptpclk);
1378         clk_disable_unprepare(pdata->sysclk);
1379
1380         set_bit(XGBE_DOWN, &pdata->dev_state);
1381
1382         DBGPR("<--xgbe_close\n");
1383
1384         return 0;
1385 }
1386
1387 static int xgbe_xmit(struct sk_buff *skb, struct net_device *netdev)
1388 {
1389         struct xgbe_prv_data *pdata = netdev_priv(netdev);
1390         struct xgbe_hw_if *hw_if = &pdata->hw_if;
1391         struct xgbe_desc_if *desc_if = &pdata->desc_if;
1392         struct xgbe_channel *channel;
1393         struct xgbe_ring *ring;
1394         struct xgbe_packet_data *packet;
1395         struct netdev_queue *txq;
1396         int ret;
1397
1398         DBGPR("-->xgbe_xmit: skb->len = %d\n", skb->len);
1399
1400         channel = pdata->channel + skb->queue_mapping;
1401         txq = netdev_get_tx_queue(netdev, channel->queue_index);
1402         ring = channel->tx_ring;
1403         packet = &ring->packet_data;
1404
1405         ret = NETDEV_TX_OK;
1406
1407         if (skb->len == 0) {
1408                 netif_err(pdata, tx_err, netdev,
1409                           "empty skb received from stack\n");
1410                 dev_kfree_skb_any(skb);
1411                 goto tx_netdev_return;
1412         }
1413
1414         /* Calculate preliminary packet info */
1415         memset(packet, 0, sizeof(*packet));
1416         xgbe_packet_info(pdata, ring, skb, packet);
1417
1418         /* Check that there are enough descriptors available */
1419         ret = xgbe_maybe_stop_tx_queue(channel, ring, packet->rdesc_count);
1420         if (ret)
1421                 goto tx_netdev_return;
1422
1423         ret = xgbe_prep_tso(skb, packet);
1424         if (ret) {
1425                 netif_err(pdata, tx_err, netdev,
1426                           "error processing TSO packet\n");
1427                 dev_kfree_skb_any(skb);
1428                 goto tx_netdev_return;
1429         }
1430         xgbe_prep_vlan(skb, packet);
1431
1432         if (!desc_if->map_tx_skb(channel, skb)) {
1433                 dev_kfree_skb_any(skb);
1434                 goto tx_netdev_return;
1435         }
1436
1437         xgbe_prep_tx_tstamp(pdata, skb, packet);
1438
1439         /* Report on the actual number of bytes (to be) sent */
1440         netdev_tx_sent_queue(txq, packet->tx_bytes);
1441
1442         /* Configure required descriptor fields for transmission */
1443         hw_if->dev_xmit(channel);
1444
1445         if (netif_msg_pktdata(pdata))
1446                 xgbe_print_pkt(netdev, skb, true);
1447
1448         /* Stop the queue in advance if there may not be enough descriptors */
1449         xgbe_maybe_stop_tx_queue(channel, ring, XGBE_TX_MAX_DESCS);
1450
1451         ret = NETDEV_TX_OK;
1452
1453 tx_netdev_return:
1454         return ret;
1455 }
1456
1457 static void xgbe_set_rx_mode(struct net_device *netdev)
1458 {
1459         struct xgbe_prv_data *pdata = netdev_priv(netdev);
1460         struct xgbe_hw_if *hw_if = &pdata->hw_if;
1461
1462         DBGPR("-->xgbe_set_rx_mode\n");
1463
1464         hw_if->config_rx_mode(pdata);
1465
1466         DBGPR("<--xgbe_set_rx_mode\n");
1467 }
1468
1469 static int xgbe_set_mac_address(struct net_device *netdev, void *addr)
1470 {
1471         struct xgbe_prv_data *pdata = netdev_priv(netdev);
1472         struct xgbe_hw_if *hw_if = &pdata->hw_if;
1473         struct sockaddr *saddr = addr;
1474
1475         DBGPR("-->xgbe_set_mac_address\n");
1476
1477         if (!is_valid_ether_addr(saddr->sa_data))
1478                 return -EADDRNOTAVAIL;
1479
1480         memcpy(netdev->dev_addr, saddr->sa_data, netdev->addr_len);
1481
1482         hw_if->set_mac_address(pdata, netdev->dev_addr);
1483
1484         DBGPR("<--xgbe_set_mac_address\n");
1485
1486         return 0;
1487 }
1488
1489 static int xgbe_ioctl(struct net_device *netdev, struct ifreq *ifreq, int cmd)
1490 {
1491         struct xgbe_prv_data *pdata = netdev_priv(netdev);
1492         int ret;
1493
1494         switch (cmd) {
1495         case SIOCGHWTSTAMP:
1496                 ret = xgbe_get_hwtstamp_settings(pdata, ifreq);
1497                 break;
1498
1499         case SIOCSHWTSTAMP:
1500                 ret = xgbe_set_hwtstamp_settings(pdata, ifreq);
1501                 break;
1502
1503         default:
1504                 ret = -EOPNOTSUPP;
1505         }
1506
1507         return ret;
1508 }
1509
1510 static int xgbe_change_mtu(struct net_device *netdev, int mtu)
1511 {
1512         struct xgbe_prv_data *pdata = netdev_priv(netdev);
1513         int ret;
1514
1515         DBGPR("-->xgbe_change_mtu\n");
1516
1517         ret = xgbe_calc_rx_buf_size(netdev, mtu);
1518         if (ret < 0)
1519                 return ret;
1520
1521         pdata->rx_buf_size = ret;
1522         netdev->mtu = mtu;
1523
1524         xgbe_restart_dev(pdata);
1525
1526         DBGPR("<--xgbe_change_mtu\n");
1527
1528         return 0;
1529 }
1530
1531 static void xgbe_tx_timeout(struct net_device *netdev)
1532 {
1533         struct xgbe_prv_data *pdata = netdev_priv(netdev);
1534
1535         netdev_warn(netdev, "tx timeout, device restarting\n");
1536         schedule_work(&pdata->restart_work);
1537 }
1538
1539 static struct rtnl_link_stats64 *xgbe_get_stats64(struct net_device *netdev,
1540                                                   struct rtnl_link_stats64 *s)
1541 {
1542         struct xgbe_prv_data *pdata = netdev_priv(netdev);
1543         struct xgbe_mmc_stats *pstats = &pdata->mmc_stats;
1544
1545         DBGPR("-->%s\n", __func__);
1546
1547         pdata->hw_if.read_mmc_stats(pdata);
1548
1549         s->rx_packets = pstats->rxframecount_gb;
1550         s->rx_bytes = pstats->rxoctetcount_gb;
1551         s->rx_errors = pstats->rxframecount_gb -
1552                        pstats->rxbroadcastframes_g -
1553                        pstats->rxmulticastframes_g -
1554                        pstats->rxunicastframes_g;
1555         s->multicast = pstats->rxmulticastframes_g;
1556         s->rx_length_errors = pstats->rxlengtherror;
1557         s->rx_crc_errors = pstats->rxcrcerror;
1558         s->rx_fifo_errors = pstats->rxfifooverflow;
1559
1560         s->tx_packets = pstats->txframecount_gb;
1561         s->tx_bytes = pstats->txoctetcount_gb;
1562         s->tx_errors = pstats->txframecount_gb - pstats->txframecount_g;
1563         s->tx_dropped = netdev->stats.tx_dropped;
1564
1565         DBGPR("<--%s\n", __func__);
1566
1567         return s;
1568 }
1569
1570 static int xgbe_vlan_rx_add_vid(struct net_device *netdev, __be16 proto,
1571                                 u16 vid)
1572 {
1573         struct xgbe_prv_data *pdata = netdev_priv(netdev);
1574         struct xgbe_hw_if *hw_if = &pdata->hw_if;
1575
1576         DBGPR("-->%s\n", __func__);
1577
1578         set_bit(vid, pdata->active_vlans);
1579         hw_if->update_vlan_hash_table(pdata);
1580
1581         DBGPR("<--%s\n", __func__);
1582
1583         return 0;
1584 }
1585
1586 static int xgbe_vlan_rx_kill_vid(struct net_device *netdev, __be16 proto,
1587                                  u16 vid)
1588 {
1589         struct xgbe_prv_data *pdata = netdev_priv(netdev);
1590         struct xgbe_hw_if *hw_if = &pdata->hw_if;
1591
1592         DBGPR("-->%s\n", __func__);
1593
1594         clear_bit(vid, pdata->active_vlans);
1595         hw_if->update_vlan_hash_table(pdata);
1596
1597         DBGPR("<--%s\n", __func__);
1598
1599         return 0;
1600 }
1601
1602 #ifdef CONFIG_NET_POLL_CONTROLLER
1603 static void xgbe_poll_controller(struct net_device *netdev)
1604 {
1605         struct xgbe_prv_data *pdata = netdev_priv(netdev);
1606         struct xgbe_channel *channel;
1607         unsigned int i;
1608
1609         DBGPR("-->xgbe_poll_controller\n");
1610
1611         if (pdata->per_channel_irq) {
1612                 channel = pdata->channel;
1613                 for (i = 0; i < pdata->channel_count; i++, channel++)
1614                         xgbe_dma_isr(channel->dma_irq, channel);
1615         } else {
1616                 disable_irq(pdata->dev_irq);
1617                 xgbe_isr(pdata->dev_irq, pdata);
1618                 enable_irq(pdata->dev_irq);
1619         }
1620
1621         DBGPR("<--xgbe_poll_controller\n");
1622 }
1623 #endif /* End CONFIG_NET_POLL_CONTROLLER */
1624
1625 static int xgbe_setup_tc(struct net_device *netdev, u8 tc)
1626 {
1627         struct xgbe_prv_data *pdata = netdev_priv(netdev);
1628         unsigned int offset, queue;
1629         u8 i;
1630
1631         if (tc && (tc != pdata->hw_feat.tc_cnt))
1632                 return -EINVAL;
1633
1634         if (tc) {
1635                 netdev_set_num_tc(netdev, tc);
1636                 for (i = 0, queue = 0, offset = 0; i < tc; i++) {
1637                         while ((queue < pdata->tx_q_count) &&
1638                                (pdata->q2tc_map[queue] == i))
1639                                 queue++;
1640
1641                         netif_dbg(pdata, drv, netdev, "TC%u using TXq%u-%u\n",
1642                                   i, offset, queue - 1);
1643                         netdev_set_tc_queue(netdev, i, queue - offset, offset);
1644                         offset = queue;
1645                 }
1646         } else {
1647                 netdev_reset_tc(netdev);
1648         }
1649
1650         return 0;
1651 }
1652
1653 static int xgbe_set_features(struct net_device *netdev,
1654                              netdev_features_t features)
1655 {
1656         struct xgbe_prv_data *pdata = netdev_priv(netdev);
1657         struct xgbe_hw_if *hw_if = &pdata->hw_if;
1658         netdev_features_t rxhash, rxcsum, rxvlan, rxvlan_filter;
1659         int ret = 0;
1660
1661         rxhash = pdata->netdev_features & NETIF_F_RXHASH;
1662         rxcsum = pdata->netdev_features & NETIF_F_RXCSUM;
1663         rxvlan = pdata->netdev_features & NETIF_F_HW_VLAN_CTAG_RX;
1664         rxvlan_filter = pdata->netdev_features & NETIF_F_HW_VLAN_CTAG_FILTER;
1665
1666         if ((features & NETIF_F_RXHASH) && !rxhash)
1667                 ret = hw_if->enable_rss(pdata);
1668         else if (!(features & NETIF_F_RXHASH) && rxhash)
1669                 ret = hw_if->disable_rss(pdata);
1670         if (ret)
1671                 return ret;
1672
1673         if ((features & NETIF_F_RXCSUM) && !rxcsum)
1674                 hw_if->enable_rx_csum(pdata);
1675         else if (!(features & NETIF_F_RXCSUM) && rxcsum)
1676                 hw_if->disable_rx_csum(pdata);
1677
1678         if ((features & NETIF_F_HW_VLAN_CTAG_RX) && !rxvlan)
1679                 hw_if->enable_rx_vlan_stripping(pdata);
1680         else if (!(features & NETIF_F_HW_VLAN_CTAG_RX) && rxvlan)
1681                 hw_if->disable_rx_vlan_stripping(pdata);
1682
1683         if ((features & NETIF_F_HW_VLAN_CTAG_FILTER) && !rxvlan_filter)
1684                 hw_if->enable_rx_vlan_filtering(pdata);
1685         else if (!(features & NETIF_F_HW_VLAN_CTAG_FILTER) && rxvlan_filter)
1686                 hw_if->disable_rx_vlan_filtering(pdata);
1687
1688         pdata->netdev_features = features;
1689
1690         DBGPR("<--xgbe_set_features\n");
1691
1692         return 0;
1693 }
1694
1695 static const struct net_device_ops xgbe_netdev_ops = {
1696         .ndo_open               = xgbe_open,
1697         .ndo_stop               = xgbe_close,
1698         .ndo_start_xmit         = xgbe_xmit,
1699         .ndo_set_rx_mode        = xgbe_set_rx_mode,
1700         .ndo_set_mac_address    = xgbe_set_mac_address,
1701         .ndo_validate_addr      = eth_validate_addr,
1702         .ndo_do_ioctl           = xgbe_ioctl,
1703         .ndo_change_mtu         = xgbe_change_mtu,
1704         .ndo_tx_timeout         = xgbe_tx_timeout,
1705         .ndo_get_stats64        = xgbe_get_stats64,
1706         .ndo_vlan_rx_add_vid    = xgbe_vlan_rx_add_vid,
1707         .ndo_vlan_rx_kill_vid   = xgbe_vlan_rx_kill_vid,
1708 #ifdef CONFIG_NET_POLL_CONTROLLER
1709         .ndo_poll_controller    = xgbe_poll_controller,
1710 #endif
1711         .ndo_setup_tc           = xgbe_setup_tc,
1712         .ndo_set_features       = xgbe_set_features,
1713 };
1714
1715 struct net_device_ops *xgbe_get_netdev_ops(void)
1716 {
1717         return (struct net_device_ops *)&xgbe_netdev_ops;
1718 }
1719
1720 static void xgbe_rx_refresh(struct xgbe_channel *channel)
1721 {
1722         struct xgbe_prv_data *pdata = channel->pdata;
1723         struct xgbe_hw_if *hw_if = &pdata->hw_if;
1724         struct xgbe_desc_if *desc_if = &pdata->desc_if;
1725         struct xgbe_ring *ring = channel->rx_ring;
1726         struct xgbe_ring_data *rdata;
1727
1728         while (ring->dirty != ring->cur) {
1729                 rdata = XGBE_GET_DESC_DATA(ring, ring->dirty);
1730
1731                 /* Reset rdata values */
1732                 desc_if->unmap_rdata(pdata, rdata);
1733
1734                 if (desc_if->map_rx_buffer(pdata, ring, rdata))
1735                         break;
1736
1737                 hw_if->rx_desc_reset(pdata, rdata, ring->dirty);
1738
1739                 ring->dirty++;
1740         }
1741
1742         /* Make sure everything is written before the register write */
1743         wmb();
1744
1745         /* Update the Rx Tail Pointer Register with address of
1746          * the last cleaned entry */
1747         rdata = XGBE_GET_DESC_DATA(ring, ring->dirty - 1);
1748         XGMAC_DMA_IOWRITE(channel, DMA_CH_RDTR_LO,
1749                           lower_32_bits(rdata->rdesc_dma));
1750 }
1751
1752 static struct sk_buff *xgbe_create_skb(struct xgbe_prv_data *pdata,
1753                                        struct napi_struct *napi,
1754                                        struct xgbe_ring_data *rdata,
1755                                        unsigned int len)
1756 {
1757         struct sk_buff *skb;
1758         u8 *packet;
1759         unsigned int copy_len;
1760
1761         skb = napi_alloc_skb(napi, rdata->rx.hdr.dma_len);
1762         if (!skb)
1763                 return NULL;
1764
1765         /* Start with the header buffer which may contain just the header
1766          * or the header plus data
1767          */
1768         dma_sync_single_range_for_cpu(pdata->dev, rdata->rx.hdr.dma_base,
1769                                       rdata->rx.hdr.dma_off,
1770                                       rdata->rx.hdr.dma_len, DMA_FROM_DEVICE);
1771
1772         packet = page_address(rdata->rx.hdr.pa.pages) +
1773                  rdata->rx.hdr.pa.pages_offset;
1774         copy_len = (rdata->rx.hdr_len) ? rdata->rx.hdr_len : len;
1775         copy_len = min(rdata->rx.hdr.dma_len, copy_len);
1776         skb_copy_to_linear_data(skb, packet, copy_len);
1777         skb_put(skb, copy_len);
1778
1779         len -= copy_len;
1780         if (len) {
1781                 /* Add the remaining data as a frag */
1782                 dma_sync_single_range_for_cpu(pdata->dev,
1783                                               rdata->rx.buf.dma_base,
1784                                               rdata->rx.buf.dma_off,
1785                                               rdata->rx.buf.dma_len,
1786                                               DMA_FROM_DEVICE);
1787
1788                 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags,
1789                                 rdata->rx.buf.pa.pages,
1790                                 rdata->rx.buf.pa.pages_offset,
1791                                 len, rdata->rx.buf.dma_len);
1792                 rdata->rx.buf.pa.pages = NULL;
1793         }
1794
1795         return skb;
1796 }
1797
1798 static int xgbe_tx_poll(struct xgbe_channel *channel)
1799 {
1800         struct xgbe_prv_data *pdata = channel->pdata;
1801         struct xgbe_hw_if *hw_if = &pdata->hw_if;
1802         struct xgbe_desc_if *desc_if = &pdata->desc_if;
1803         struct xgbe_ring *ring = channel->tx_ring;
1804         struct xgbe_ring_data *rdata;
1805         struct xgbe_ring_desc *rdesc;
1806         struct net_device *netdev = pdata->netdev;
1807         struct netdev_queue *txq;
1808         int processed = 0;
1809         unsigned int tx_packets = 0, tx_bytes = 0;
1810         unsigned int cur;
1811
1812         DBGPR("-->xgbe_tx_poll\n");
1813
1814         /* Nothing to do if there isn't a Tx ring for this channel */
1815         if (!ring)
1816                 return 0;
1817
1818         cur = ring->cur;
1819
1820         /* Be sure we get ring->cur before accessing descriptor data */
1821         smp_rmb();
1822
1823         txq = netdev_get_tx_queue(netdev, channel->queue_index);
1824
1825         while ((processed < XGBE_TX_DESC_MAX_PROC) &&
1826                (ring->dirty != cur)) {
1827                 rdata = XGBE_GET_DESC_DATA(ring, ring->dirty);
1828                 rdesc = rdata->rdesc;
1829
1830                 if (!hw_if->tx_complete(rdesc))
1831                         break;
1832
1833                 /* Make sure descriptor fields are read after reading the OWN
1834                  * bit */
1835                 dma_rmb();
1836
1837                 if (netif_msg_tx_done(pdata))
1838                         xgbe_dump_tx_desc(pdata, ring, ring->dirty, 1, 0);
1839
1840                 if (hw_if->is_last_desc(rdesc)) {
1841                         tx_packets += rdata->tx.packets;
1842                         tx_bytes += rdata->tx.bytes;
1843                 }
1844
1845                 /* Free the SKB and reset the descriptor for re-use */
1846                 desc_if->unmap_rdata(pdata, rdata);
1847                 hw_if->tx_desc_reset(rdata);
1848
1849                 processed++;
1850                 ring->dirty++;
1851         }
1852
1853         if (!processed)
1854                 return 0;
1855
1856         netdev_tx_completed_queue(txq, tx_packets, tx_bytes);
1857
1858         if ((ring->tx.queue_stopped == 1) &&
1859             (xgbe_tx_avail_desc(ring) > XGBE_TX_DESC_MIN_FREE)) {
1860                 ring->tx.queue_stopped = 0;
1861                 netif_tx_wake_queue(txq);
1862         }
1863
1864         DBGPR("<--xgbe_tx_poll: processed=%d\n", processed);
1865
1866         return processed;
1867 }
1868
1869 static int xgbe_rx_poll(struct xgbe_channel *channel, int budget)
1870 {
1871         struct xgbe_prv_data *pdata = channel->pdata;
1872         struct xgbe_hw_if *hw_if = &pdata->hw_if;
1873         struct xgbe_ring *ring = channel->rx_ring;
1874         struct xgbe_ring_data *rdata;
1875         struct xgbe_packet_data *packet;
1876         struct net_device *netdev = pdata->netdev;
1877         struct napi_struct *napi;
1878         struct sk_buff *skb;
1879         struct skb_shared_hwtstamps *hwtstamps;
1880         unsigned int incomplete, error, context_next, context;
1881         unsigned int len, rdesc_len, max_len;
1882         unsigned int received = 0;
1883         int packet_count = 0;
1884
1885         DBGPR("-->xgbe_rx_poll: budget=%d\n", budget);
1886
1887         /* Nothing to do if there isn't a Rx ring for this channel */
1888         if (!ring)
1889                 return 0;
1890
1891         incomplete = 0;
1892         context_next = 0;
1893
1894         napi = (pdata->per_channel_irq) ? &channel->napi : &pdata->napi;
1895
1896         rdata = XGBE_GET_DESC_DATA(ring, ring->cur);
1897         packet = &ring->packet_data;
1898         while (packet_count < budget) {
1899                 DBGPR("  cur = %d\n", ring->cur);
1900
1901                 /* First time in loop see if we need to restore state */
1902                 if (!received && rdata->state_saved) {
1903                         skb = rdata->state.skb;
1904                         error = rdata->state.error;
1905                         len = rdata->state.len;
1906                 } else {
1907                         memset(packet, 0, sizeof(*packet));
1908                         skb = NULL;
1909                         error = 0;
1910                         len = 0;
1911                 }
1912
1913 read_again:
1914                 rdata = XGBE_GET_DESC_DATA(ring, ring->cur);
1915
1916                 if (xgbe_rx_dirty_desc(ring) > (XGBE_RX_DESC_CNT >> 3))
1917                         xgbe_rx_refresh(channel);
1918
1919                 if (hw_if->dev_read(channel))
1920                         break;
1921
1922                 received++;
1923                 ring->cur++;
1924
1925                 incomplete = XGMAC_GET_BITS(packet->attributes,
1926                                             RX_PACKET_ATTRIBUTES,
1927                                             INCOMPLETE);
1928                 context_next = XGMAC_GET_BITS(packet->attributes,
1929                                               RX_PACKET_ATTRIBUTES,
1930                                               CONTEXT_NEXT);
1931                 context = XGMAC_GET_BITS(packet->attributes,
1932                                          RX_PACKET_ATTRIBUTES,
1933                                          CONTEXT);
1934
1935                 /* Earlier error, just drain the remaining data */
1936                 if ((incomplete || context_next) && error)
1937                         goto read_again;
1938
1939                 if (error || packet->errors) {
1940                         if (packet->errors)
1941                                 netif_err(pdata, rx_err, netdev,
1942                                           "error in received packet\n");
1943                         dev_kfree_skb(skb);
1944                         goto next_packet;
1945                 }
1946
1947                 if (!context) {
1948                         /* Length is cumulative, get this descriptor's length */
1949                         rdesc_len = rdata->rx.len - len;
1950                         len += rdesc_len;
1951
1952                         if (rdesc_len && !skb) {
1953                                 skb = xgbe_create_skb(pdata, napi, rdata,
1954                                                       rdesc_len);
1955                                 if (!skb)
1956                                         error = 1;
1957                         } else if (rdesc_len) {
1958                                 dma_sync_single_range_for_cpu(pdata->dev,
1959                                                         rdata->rx.buf.dma_base,
1960                                                         rdata->rx.buf.dma_off,
1961                                                         rdata->rx.buf.dma_len,
1962                                                         DMA_FROM_DEVICE);
1963
1964                                 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags,
1965                                                 rdata->rx.buf.pa.pages,
1966                                                 rdata->rx.buf.pa.pages_offset,
1967                                                 rdesc_len,
1968                                                 rdata->rx.buf.dma_len);
1969                                 rdata->rx.buf.pa.pages = NULL;
1970                         }
1971                 }
1972
1973                 if (incomplete || context_next)
1974                         goto read_again;
1975
1976                 if (!skb)
1977                         goto next_packet;
1978
1979                 /* Be sure we don't exceed the configured MTU */
1980                 max_len = netdev->mtu + ETH_HLEN;
1981                 if (!(netdev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
1982                     (skb->protocol == htons(ETH_P_8021Q)))
1983                         max_len += VLAN_HLEN;
1984
1985                 if (skb->len > max_len) {
1986                         netif_err(pdata, rx_err, netdev,
1987                                   "packet length exceeds configured MTU\n");
1988                         dev_kfree_skb(skb);
1989                         goto next_packet;
1990                 }
1991
1992                 if (netif_msg_pktdata(pdata))
1993                         xgbe_print_pkt(netdev, skb, false);
1994
1995                 skb_checksum_none_assert(skb);
1996                 if (XGMAC_GET_BITS(packet->attributes,
1997                                    RX_PACKET_ATTRIBUTES, CSUM_DONE))
1998                         skb->ip_summed = CHECKSUM_UNNECESSARY;
1999
2000                 if (XGMAC_GET_BITS(packet->attributes,
2001                                    RX_PACKET_ATTRIBUTES, VLAN_CTAG))
2002                         __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
2003                                                packet->vlan_ctag);
2004
2005                 if (XGMAC_GET_BITS(packet->attributes,
2006                                    RX_PACKET_ATTRIBUTES, RX_TSTAMP)) {
2007                         u64 nsec;
2008
2009                         nsec = timecounter_cyc2time(&pdata->tstamp_tc,
2010                                                     packet->rx_tstamp);
2011                         hwtstamps = skb_hwtstamps(skb);
2012                         hwtstamps->hwtstamp = ns_to_ktime(nsec);
2013                 }
2014
2015                 if (XGMAC_GET_BITS(packet->attributes,
2016                                    RX_PACKET_ATTRIBUTES, RSS_HASH))
2017                         skb_set_hash(skb, packet->rss_hash,
2018                                      packet->rss_hash_type);
2019
2020                 skb->dev = netdev;
2021                 skb->protocol = eth_type_trans(skb, netdev);
2022                 skb_record_rx_queue(skb, channel->queue_index);
2023                 skb_mark_napi_id(skb, napi);
2024
2025                 napi_gro_receive(napi, skb);
2026
2027 next_packet:
2028                 packet_count++;
2029         }
2030
2031         /* Check if we need to save state before leaving */
2032         if (received && (incomplete || context_next)) {
2033                 rdata = XGBE_GET_DESC_DATA(ring, ring->cur);
2034                 rdata->state_saved = 1;
2035                 rdata->state.skb = skb;
2036                 rdata->state.len = len;
2037                 rdata->state.error = error;
2038         }
2039
2040         DBGPR("<--xgbe_rx_poll: packet_count = %d\n", packet_count);
2041
2042         return packet_count;
2043 }
2044
2045 static int xgbe_one_poll(struct napi_struct *napi, int budget)
2046 {
2047         struct xgbe_channel *channel = container_of(napi, struct xgbe_channel,
2048                                                     napi);
2049         int processed = 0;
2050
2051         DBGPR("-->xgbe_one_poll: budget=%d\n", budget);
2052
2053         /* Cleanup Tx ring first */
2054         xgbe_tx_poll(channel);
2055
2056         /* Process Rx ring next */
2057         processed = xgbe_rx_poll(channel, budget);
2058
2059         /* If we processed everything, we are done */
2060         if (processed < budget) {
2061                 /* Turn off polling */
2062                 napi_complete(napi);
2063
2064                 /* Enable Tx and Rx interrupts */
2065                 enable_irq(channel->dma_irq);
2066         }
2067
2068         DBGPR("<--xgbe_one_poll: received = %d\n", processed);
2069
2070         return processed;
2071 }
2072
2073 static int xgbe_all_poll(struct napi_struct *napi, int budget)
2074 {
2075         struct xgbe_prv_data *pdata = container_of(napi, struct xgbe_prv_data,
2076                                                    napi);
2077         struct xgbe_channel *channel;
2078         int ring_budget;
2079         int processed, last_processed;
2080         unsigned int i;
2081
2082         DBGPR("-->xgbe_all_poll: budget=%d\n", budget);
2083
2084         processed = 0;
2085         ring_budget = budget / pdata->rx_ring_count;
2086         do {
2087                 last_processed = processed;
2088
2089                 channel = pdata->channel;
2090                 for (i = 0; i < pdata->channel_count; i++, channel++) {
2091                         /* Cleanup Tx ring first */
2092                         xgbe_tx_poll(channel);
2093
2094                         /* Process Rx ring next */
2095                         if (ring_budget > (budget - processed))
2096                                 ring_budget = budget - processed;
2097                         processed += xgbe_rx_poll(channel, ring_budget);
2098                 }
2099         } while ((processed < budget) && (processed != last_processed));
2100
2101         /* If we processed everything, we are done */
2102         if (processed < budget) {
2103                 /* Turn off polling */
2104                 napi_complete(napi);
2105
2106                 /* Enable Tx and Rx interrupts */
2107                 xgbe_enable_rx_tx_ints(pdata);
2108         }
2109
2110         DBGPR("<--xgbe_all_poll: received = %d\n", processed);
2111
2112         return processed;
2113 }
2114
2115 void xgbe_dump_tx_desc(struct xgbe_prv_data *pdata, struct xgbe_ring *ring,
2116                        unsigned int idx, unsigned int count, unsigned int flag)
2117 {
2118         struct xgbe_ring_data *rdata;
2119         struct xgbe_ring_desc *rdesc;
2120
2121         while (count--) {
2122                 rdata = XGBE_GET_DESC_DATA(ring, idx);
2123                 rdesc = rdata->rdesc;
2124                 netdev_dbg(pdata->netdev,
2125                            "TX_NORMAL_DESC[%d %s] = %08x:%08x:%08x:%08x\n", idx,
2126                            (flag == 1) ? "QUEUED FOR TX" : "TX BY DEVICE",
2127                            le32_to_cpu(rdesc->desc0),
2128                            le32_to_cpu(rdesc->desc1),
2129                            le32_to_cpu(rdesc->desc2),
2130                            le32_to_cpu(rdesc->desc3));
2131                 idx++;
2132         }
2133 }
2134
2135 void xgbe_dump_rx_desc(struct xgbe_prv_data *pdata, struct xgbe_ring *ring,
2136                        unsigned int idx)
2137 {
2138         struct xgbe_ring_data *rdata;
2139         struct xgbe_ring_desc *rdesc;
2140
2141         rdata = XGBE_GET_DESC_DATA(ring, idx);
2142         rdesc = rdata->rdesc;
2143         netdev_dbg(pdata->netdev,
2144                    "RX_NORMAL_DESC[%d RX BY DEVICE] = %08x:%08x:%08x:%08x\n",
2145                    idx, le32_to_cpu(rdesc->desc0), le32_to_cpu(rdesc->desc1),
2146                    le32_to_cpu(rdesc->desc2), le32_to_cpu(rdesc->desc3));
2147 }
2148
2149 void xgbe_print_pkt(struct net_device *netdev, struct sk_buff *skb, bool tx_rx)
2150 {
2151         struct ethhdr *eth = (struct ethhdr *)skb->data;
2152         unsigned char *buf = skb->data;
2153         unsigned char buffer[128];
2154         unsigned int i, j;
2155
2156         netdev_dbg(netdev, "\n************** SKB dump ****************\n");
2157
2158         netdev_dbg(netdev, "%s packet of %d bytes\n",
2159                    (tx_rx ? "TX" : "RX"), skb->len);
2160
2161         netdev_dbg(netdev, "Dst MAC addr: %pM\n", eth->h_dest);
2162         netdev_dbg(netdev, "Src MAC addr: %pM\n", eth->h_source);
2163         netdev_dbg(netdev, "Protocol: %#06hx\n", ntohs(eth->h_proto));
2164
2165         for (i = 0, j = 0; i < skb->len;) {
2166                 j += snprintf(buffer + j, sizeof(buffer) - j, "%02hhx",
2167                               buf[i++]);
2168
2169                 if ((i % 32) == 0) {
2170                         netdev_dbg(netdev, "  %#06x: %s\n", i - 32, buffer);
2171                         j = 0;
2172                 } else if ((i % 16) == 0) {
2173                         buffer[j++] = ' ';
2174                         buffer[j++] = ' ';
2175                 } else if ((i % 4) == 0) {
2176                         buffer[j++] = ' ';
2177                 }
2178         }
2179         if (i % 32)
2180                 netdev_dbg(netdev, "  %#06x: %s\n", i - (i % 32), buffer);
2181
2182         netdev_dbg(netdev, "\n************** SKB dump ****************\n");
2183 }