drivers/net/ethernet/qlogic/qed/qed_main.c

   1 /* QLogic qed NIC Driver
   2  * Copyright (c) 2015 QLogic Corporation
   3  *
   4  * This software is available under the terms of the GNU General Public License
   5  * (GPL) Version 2, available from the file COPYING in the main directory of
   6  * this source tree.
   7  */
   8
   9 #include <linux/stddef.h>
  10 #include <linux/pci.h>
  11 #include <linux/kernel.h>
  12 #include <linux/slab.h>
  13 #include <linux/version.h>
  14 #include <linux/delay.h>
  15 #include <asm/byteorder.h>
  16 #include <linux/dma-mapping.h>
  17 #include <linux/string.h>
  18 #include <linux/module.h>
  19 #include <linux/interrupt.h>
  20 #include <linux/workqueue.h>
  21 #include <linux/ethtool.h>
  22 #include <linux/etherdevice.h>
  23 #include <linux/vmalloc.h>
  24 #include <linux/qed/qed_if.h>
  25
  26 #include "qed.h"
  27 #include "qed_sp.h"
  28 #include "qed_dev_api.h"
  29 #include "qed_mcp.h"
  30 #include "qed_hw.h"
  31
  32 static const char version[] =
  33         "QLogic QL4xxx 40G/100G Ethernet Driver qed " DRV_MODULE_VERSION "\n";
  34
  35 MODULE_DESCRIPTION("QLogic 25G/40G/50G/100G Core Module");
  36 MODULE_LICENSE("GPL");
  37 MODULE_VERSION(DRV_MODULE_VERSION);
  38
  39 #define FW_FILE_VERSION                         \
  40         __stringify(FW_MAJOR_VERSION) "."       \
  41         __stringify(FW_MINOR_VERSION) "."       \
  42         __stringify(FW_REVISION_VERSION) "."    \
  43         __stringify(FW_ENGINEERING_VERSION)
  44
  45 #define QED_FW_FILE_NAME        \
  46         "qed/qed_init_values_zipped-" FW_FILE_VERSION ".bin"
  47
  48 static int __init qed_init(void)
  49 {
  50         pr_notice("qed_init called\n");
  51
  52         pr_info("%s", version);
  53
  54         return 0;
  55 }
  56
  57 static void __exit qed_cleanup(void)
  58 {
  59         pr_notice("qed_cleanup called\n");
  60 }
  61
  62 module_init(qed_init);
  63 module_exit(qed_cleanup);
  64
  65 /* Check if the DMA controller on the machine can properly handle the DMA
  66  * addressing required by the device.
  67 */
  68 static int qed_set_coherency_mask(struct qed_dev *cdev)
  69 {
  70         struct device *dev = &cdev->pdev->dev;
  71
  72         if (dma_set_mask(dev, DMA_BIT_MASK(64)) == 0) {
  73                 if (dma_set_coherent_mask(dev, DMA_BIT_MASK(64)) != 0) {
  74                         DP_NOTICE(cdev,
  75                                   "Can't request 64-bit consistent allocations\n");
  76                         return -EIO;
  77                 }
  78         } else if (dma_set_mask(dev, DMA_BIT_MASK(32)) != 0) {
  79                 DP_NOTICE(cdev, "Can't request 64b/32b DMA addresses\n");
  80                 return -EIO;
  81         }
  82
  83         return 0;
  84 }
  85
  86 static void qed_free_pci(struct qed_dev *cdev)
  87 {
  88         struct pci_dev *pdev = cdev->pdev;
  89
  90         if (cdev->doorbells)
  91                 iounmap(cdev->doorbells);
  92         if (cdev->regview)
  93                 iounmap(cdev->regview);
  94         if (atomic_read(&pdev->enable_cnt) == 1)
  95                 pci_release_regions(pdev);
  96
  97         pci_disable_device(pdev);
  98 }
  99
 100 /* Performs PCI initializations as well as initializing PCI-related parameters
 101  * in the device structrue. Returns 0 in case of success.
 102  */
 103 static int qed_init_pci(struct qed_dev *cdev,
 104                         struct pci_dev *pdev)
 105 {
 106         int rc;
 107
 108         cdev->pdev = pdev;
 109
 110         rc = pci_enable_device(pdev);
 111         if (rc) {
 112                 DP_NOTICE(cdev, "Cannot enable PCI device\n");
 113                 goto err0;
 114         }
 115
 116         if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) {
 117                 DP_NOTICE(cdev, "No memory region found in bar #0\n");
 118                 rc = -EIO;
 119                 goto err1;
 120         }
 121
 122         if (!(pci_resource_flags(pdev, 2) & IORESOURCE_MEM)) {
 123                 DP_NOTICE(cdev, "No memory region found in bar #2\n");
 124                 rc = -EIO;
 125                 goto err1;
 126         }
 127
 128         if (atomic_read(&pdev->enable_cnt) == 1) {
 129                 rc = pci_request_regions(pdev, "qed");
 130                 if (rc) {
 131                         DP_NOTICE(cdev,
 132                                   "Failed to request PCI memory resources\n");
 133                         goto err1;
 134                 }
 135                 pci_set_master(pdev);
 136                 pci_save_state(pdev);
 137         }
 138
 139         if (!pci_is_pcie(pdev)) {
 140                 DP_NOTICE(cdev, "The bus is not PCI Express\n");
 141                 rc = -EIO;
 142                 goto err2;
 143         }
 144
 145         cdev->pci_params.pm_cap = pci_find_capability(pdev, PCI_CAP_ID_PM);
 146         if (cdev->pci_params.pm_cap == 0)
 147                 DP_NOTICE(cdev, "Cannot find power management capability\n");
 148
 149         rc = qed_set_coherency_mask(cdev);
 150         if (rc)
 151                 goto err2;
 152
 153         cdev->pci_params.mem_start = pci_resource_start(pdev, 0);
 154         cdev->pci_params.mem_end = pci_resource_end(pdev, 0);
 155         cdev->pci_params.irq = pdev->irq;
 156
 157         cdev->regview = pci_ioremap_bar(pdev, 0);
 158         if (!cdev->regview) {
 159                 DP_NOTICE(cdev, "Cannot map register space, aborting\n");
 160                 rc = -ENOMEM;
 161                 goto err2;
 162         }
 163
 164         cdev->db_phys_addr = pci_resource_start(cdev->pdev, 2);
 165         cdev->db_size = pci_resource_len(cdev->pdev, 2);
 166         cdev->doorbells = ioremap_wc(cdev->db_phys_addr, cdev->db_size);
 167         if (!cdev->doorbells) {
 168                 DP_NOTICE(cdev, "Cannot map doorbell space\n");
 169                 return -ENOMEM;
 170         }
 171
 172         return 0;
 173
 174 err2:
 175         pci_release_regions(pdev);
 176 err1:
 177         pci_disable_device(pdev);
 178 err0:
 179         return rc;
 180 }
 181
 182 int qed_fill_dev_info(struct qed_dev *cdev,
 183                       struct qed_dev_info *dev_info)
 184 {
 185         struct qed_ptt  *ptt;
 186
 187         memset(dev_info, 0, sizeof(struct qed_dev_info));
 188
 189         dev_info->num_hwfns = cdev->num_hwfns;
 190         dev_info->pci_mem_start = cdev->pci_params.mem_start;
 191         dev_info->pci_mem_end = cdev->pci_params.mem_end;
 192         dev_info->pci_irq = cdev->pci_params.irq;
 193         dev_info->is_mf = IS_MF(&cdev->hwfns[0]);
 194         ether_addr_copy(dev_info->hw_mac, cdev->hwfns[0].hw_info.hw_mac_addr);
 195
 196         dev_info->fw_major = FW_MAJOR_VERSION;
 197         dev_info->fw_minor = FW_MINOR_VERSION;
 198         dev_info->fw_rev = FW_REVISION_VERSION;
 199         dev_info->fw_eng = FW_ENGINEERING_VERSION;
 200         dev_info->mf_mode = cdev->mf_mode;
 201
 202         qed_mcp_get_mfw_ver(cdev, &dev_info->mfw_rev);
 203
 204         ptt = qed_ptt_acquire(QED_LEADING_HWFN(cdev));
 205         if (ptt) {
 206                 qed_mcp_get_flash_size(QED_LEADING_HWFN(cdev), ptt,
 207                                        &dev_info->flash_size);
 208
 209                 qed_ptt_release(QED_LEADING_HWFN(cdev), ptt);
 210         }
 211
 212         return 0;
 213 }
 214
 215 static void qed_free_cdev(struct qed_dev *cdev)
 216 {
 217         kfree((void *)cdev);
 218 }
 219
 220 static struct qed_dev *qed_alloc_cdev(struct pci_dev *pdev)
 221 {
 222         struct qed_dev *cdev;
 223
 224         cdev = kzalloc(sizeof(*cdev), GFP_KERNEL);
 225         if (!cdev)
 226                 return cdev;
 227
 228         qed_init_struct(cdev);
 229
 230         return cdev;
 231 }
 232
 233 /* Sets the requested power state */
 234 static int qed_set_power_state(struct qed_dev *cdev,
 235                                pci_power_t state)
 236 {
 237         if (!cdev)
 238                 return -ENODEV;
 239
 240         DP_VERBOSE(cdev, NETIF_MSG_DRV, "Omitting Power state change\n");
 241         return 0;
 242 }
 243
 244 /* probing */
 245 static struct qed_dev *qed_probe(struct pci_dev *pdev,
 246                                  enum qed_protocol protocol,
 247                                  u32 dp_module,
 248                                  u8 dp_level)
 249 {
 250         struct qed_dev *cdev;
 251         int rc;
 252
 253         cdev = qed_alloc_cdev(pdev);
 254         if (!cdev)
 255                 goto err0;
 256
 257         cdev->protocol = protocol;
 258
 259         qed_init_dp(cdev, dp_module, dp_level);
 260
 261         rc = qed_init_pci(cdev, pdev);
 262         if (rc) {
 263                 DP_ERR(cdev, "init pci failed\n");
 264                 goto err1;
 265         }
 266         DP_INFO(cdev, "PCI init completed successfully\n");
 267
 268         rc = qed_hw_prepare(cdev, QED_PCI_DEFAULT);
 269         if (rc) {
 270                 DP_ERR(cdev, "hw prepare failed\n");
 271                 goto err2;
 272         }
 273
 274         DP_INFO(cdev, "qed_probe completed successffuly\n");
 275
 276         return cdev;
 277
 278 err2:
 279         qed_free_pci(cdev);
 280 err1:
 281         qed_free_cdev(cdev);
 282 err0:
 283         return NULL;
 284 }
 285
 286 static void qed_remove(struct qed_dev *cdev)
 287 {
 288         if (!cdev)
 289                 return;
 290
 291         qed_hw_remove(cdev);
 292
 293         qed_free_pci(cdev);
 294
 295         qed_set_power_state(cdev, PCI_D3hot);
 296
 297         qed_free_cdev(cdev);
 298 }
 299
 300 static void qed_disable_msix(struct qed_dev *cdev)
 301 {
 302         if (cdev->int_params.out.int_mode == QED_INT_MODE_MSIX) {
 303                 pci_disable_msix(cdev->pdev);
 304                 kfree(cdev->int_params.msix_table);
 305         } else if (cdev->int_params.out.int_mode == QED_INT_MODE_MSI) {
 306                 pci_disable_msi(cdev->pdev);
 307         }
 308
 309         memset(&cdev->int_params.out, 0, sizeof(struct qed_int_param));
 310 }
 311
 312 static int qed_enable_msix(struct qed_dev *cdev,
 313                            struct qed_int_params *int_params)
 314 {
 315         int i, rc, cnt;
 316
 317         cnt = int_params->in.num_vectors;
 318
 319         for (i = 0; i < cnt; i++)
 320                 int_params->msix_table[i].entry = i;
 321
 322         rc = pci_enable_msix_range(cdev->pdev, int_params->msix_table,
 323                                    int_params->in.min_msix_cnt, cnt);
 324         if (rc < cnt && rc >= int_params->in.min_msix_cnt &&
 325             (rc % cdev->num_hwfns)) {
 326                 pci_disable_msix(cdev->pdev);
 327
 328                 /* If fastpath is initialized, we need at least one interrupt
 329                  * per hwfn [and the slow path interrupts]. New requested number
 330                  * should be a multiple of the number of hwfns.
 331                  */
 332                 cnt = (rc / cdev->num_hwfns) * cdev->num_hwfns;
 333                 DP_NOTICE(cdev,
 334                           "Trying to enable MSI-X with less vectors (%d out of %d)\n",
 335                           cnt, int_params->in.num_vectors);
 336                 rc = pci_enable_msix_exact(cdev->pdev,
 337                                            int_params->msix_table, cnt);
 338                 if (!rc)
 339                         rc = cnt;
 340         }
 341
 342         if (rc > 0) {
 343                 /* MSI-x configuration was achieved */
 344                 int_params->out.int_mode = QED_INT_MODE_MSIX;
 345                 int_params->out.num_vectors = rc;
 346                 rc = 0;
 347         } else {
 348                 DP_NOTICE(cdev,
 349                           "Failed to enable MSI-X [Requested %d vectors][rc %d]\n",
 350                           cnt, rc);
 351         }
 352
 353         return rc;
 354 }
 355
 356 /* This function outputs the int mode and the number of enabled msix vector */
 357 static int qed_set_int_mode(struct qed_dev *cdev, bool force_mode)
 358 {
 359         struct qed_int_params *int_params = &cdev->int_params;
 360         struct msix_entry *tbl;
 361         int rc = 0, cnt;
 362
 363         switch (int_params->in.int_mode) {
 364         case QED_INT_MODE_MSIX:
 365                 /* Allocate MSIX table */
 366                 cnt = int_params->in.num_vectors;
 367                 int_params->msix_table = kcalloc(cnt, sizeof(*tbl), GFP_KERNEL);
 368                 if (!int_params->msix_table) {
 369                         rc = -ENOMEM;
 370                         goto out;
 371                 }
 372
 373                 /* Enable MSIX */
 374                 rc = qed_enable_msix(cdev, int_params);
 375                 if (!rc)
 376                         goto out;
 377
 378                 DP_NOTICE(cdev, "Failed to enable MSI-X\n");
 379                 kfree(int_params->msix_table);
 380                 if (force_mode)
 381                         goto out;
 382                 /* Fallthrough */
 383
 384         case QED_INT_MODE_MSI:
 385                 rc = pci_enable_msi(cdev->pdev);
 386                 if (!rc) {
 387                         int_params->out.int_mode = QED_INT_MODE_MSI;
 388                         goto out;
 389                 }
 390
 391                 DP_NOTICE(cdev, "Failed to enable MSI\n");
 392                 if (force_mode)
 393                         goto out;
 394                 /* Fallthrough */
 395
 396         case QED_INT_MODE_INTA:
 397                         int_params->out.int_mode = QED_INT_MODE_INTA;
 398                         rc = 0;
 399                         goto out;
 400         default:
 401                 DP_NOTICE(cdev, "Unknown int_mode value %d\n",
 402                           int_params->in.int_mode);
 403                 rc = -EINVAL;
 404         }
 405
 406 out:
 407         cdev->int_coalescing_mode = QED_COAL_MODE_ENABLE;
 408
 409         return rc;
 410 }
 411
 412 static void qed_simd_handler_config(struct qed_dev *cdev, void *token,
 413                                     int index, void(*handler)(void *))
 414 {
 415         struct qed_hwfn *hwfn = &cdev->hwfns[index % cdev->num_hwfns];
 416         int relative_idx = index / cdev->num_hwfns;
 417
 418         hwfn->simd_proto_handler[relative_idx].func = handler;
 419         hwfn->simd_proto_handler[relative_idx].token = token;
 420 }
 421
 422 static void qed_simd_handler_clean(struct qed_dev *cdev, int index)
 423 {
 424         struct qed_hwfn *hwfn = &cdev->hwfns[index % cdev->num_hwfns];
 425         int relative_idx = index / cdev->num_hwfns;
 426
 427         memset(&hwfn->simd_proto_handler[relative_idx], 0,
 428                sizeof(struct qed_simd_fp_handler));
 429 }
 430
 431 static irqreturn_t qed_msix_sp_int(int irq, void *tasklet)
 432 {
 433         tasklet_schedule((struct tasklet_struct *)tasklet);
 434         return IRQ_HANDLED;
 435 }
 436
 437 static irqreturn_t qed_single_int(int irq, void *dev_instance)
 438 {
 439         struct qed_dev *cdev = (struct qed_dev *)dev_instance;
 440         struct qed_hwfn *hwfn;
 441         irqreturn_t rc = IRQ_NONE;
 442         u64 status;
 443         int i, j;
 444
 445         for (i = 0; i < cdev->num_hwfns; i++) {
 446                 status = qed_int_igu_read_sisr_reg(&cdev->hwfns[i]);
 447
 448                 if (!status)
 449                         continue;
 450
 451                 hwfn = &cdev->hwfns[i];
 452
 453                 /* Slowpath interrupt */
 454                 if (unlikely(status & 0x1)) {
 455                         tasklet_schedule(hwfn->sp_dpc);
 456                         status &= ~0x1;
 457                         rc = IRQ_HANDLED;
 458                 }
 459
 460                 /* Fastpath interrupts */
 461                 for (j = 0; j < 64; j++) {
 462                         if ((0x2ULL << j) & status) {
 463                                 hwfn->simd_proto_handler[j].func(
 464                                         hwfn->simd_proto_handler[j].token);
 465                                 status &= ~(0x2ULL << j);
 466                                 rc = IRQ_HANDLED;
 467                         }
 468                 }
 469
 470                 if (unlikely(status))
 471                         DP_VERBOSE(hwfn, NETIF_MSG_INTR,
 472                                    "got an unknown interrupt status 0x%llx\n",
 473                                    status);
 474         }
 475
 476         return rc;
 477 }
 478
 479 static int qed_slowpath_irq_req(struct qed_dev *cdev)
 480 {
 481         int i = 0, rc = 0;
 482
 483         if (cdev->int_params.out.int_mode == QED_INT_MODE_MSIX) {
 484                 /* Request all the slowpath MSI-X vectors */
 485                 for (i = 0; i < cdev->num_hwfns; i++) {
 486                         snprintf(cdev->hwfns[i].name, NAME_SIZE,
 487                                  "sp-%d-%02x:%02x.%02x",
 488                                  i, cdev->pdev->bus->number,
 489                                  PCI_SLOT(cdev->pdev->devfn),
 490                                  cdev->hwfns[i].abs_pf_id);
 491
 492                         rc = request_irq(cdev->int_params.msix_table[i].vector,
 493                                          qed_msix_sp_int, 0,
 494                                          cdev->hwfns[i].name,
 495                                          cdev->hwfns[i].sp_dpc);
 496                         if (rc)
 497                                 break;
 498
 499                         DP_VERBOSE(&cdev->hwfns[i],
 500                                    (NETIF_MSG_INTR | QED_MSG_SP),
 501                                    "Requested slowpath MSI-X\n");
 502                 }
 503
 504                 if (i != cdev->num_hwfns) {
 505                         /* Free already request MSI-X vectors */
 506                         for (i--; i >= 0; i--) {
 507                                 unsigned int vec =
 508                                         cdev->int_params.msix_table[i].vector;
 509                                 synchronize_irq(vec);
 510                                 free_irq(cdev->int_params.msix_table[i].vector,
 511                                          cdev->hwfns[i].sp_dpc);
 512                         }
 513                 }
 514         } else {
 515                 unsigned long flags = 0;
 516
 517                 snprintf(cdev->name, NAME_SIZE, "%02x:%02x.%02x",
 518                          cdev->pdev->bus->number, PCI_SLOT(cdev->pdev->devfn),
 519                          PCI_FUNC(cdev->pdev->devfn));
 520
 521                 if (cdev->int_params.out.int_mode == QED_INT_MODE_INTA)
 522                         flags |= IRQF_SHARED;
 523
 524                 rc = request_irq(cdev->pdev->irq, qed_single_int,
 525                                  flags, cdev->name, cdev);
 526         }
 527
 528         return rc;
 529 }
 530
 531 static void qed_slowpath_irq_free(struct qed_dev *cdev)
 532 {
 533         int i;
 534
 535         if (cdev->int_params.out.int_mode == QED_INT_MODE_MSIX) {
 536                 for_each_hwfn(cdev, i) {
 537                         synchronize_irq(cdev->int_params.msix_table[i].vector);
 538                         free_irq(cdev->int_params.msix_table[i].vector,
 539                                  cdev->hwfns[i].sp_dpc);
 540                 }
 541         } else {
 542                 free_irq(cdev->pdev->irq, cdev);
 543         }
 544 }
 545
 546 static int qed_nic_stop(struct qed_dev *cdev)
 547 {
 548         int i, rc;
 549
 550         rc = qed_hw_stop(cdev);
 551
 552         for (i = 0; i < cdev->num_hwfns; i++) {
 553                 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
 554
 555                 if (p_hwfn->b_sp_dpc_enabled) {
 556                         tasklet_disable(p_hwfn->sp_dpc);
 557                         p_hwfn->b_sp_dpc_enabled = false;
 558                         DP_VERBOSE(cdev, NETIF_MSG_IFDOWN,
 559                                    "Disabled sp taskelt [hwfn %d] at %p\n",
 560                                    i, p_hwfn->sp_dpc);
 561                 }
 562         }
 563
 564         return rc;
 565 }
 566
 567 static int qed_nic_reset(struct qed_dev *cdev)
 568 {
 569         int rc;
 570
 571         rc = qed_hw_reset(cdev);
 572         if (rc)
 573                 return rc;
 574
 575         qed_resc_free(cdev);
 576
 577         return 0;
 578 }
 579
 580 static int qed_nic_setup(struct qed_dev *cdev)
 581 {
 582         int rc;
 583
 584         rc = qed_resc_alloc(cdev);
 585         if (rc)
 586                 return rc;
 587
 588         DP_INFO(cdev, "Allocated qed resources\n");
 589
 590         qed_resc_setup(cdev);
 591
 592         return rc;
 593 }
 594
 595 static int qed_set_int_fp(struct qed_dev *cdev, u16 cnt)
 596 {
 597         int limit = 0;
 598
 599         /* Mark the fastpath as free/used */
 600         cdev->int_params.fp_initialized = cnt ? true : false;
 601
 602         if (cdev->int_params.out.int_mode != QED_INT_MODE_MSIX)
 603                 limit = cdev->num_hwfns * 63;
 604         else if (cdev->int_params.fp_msix_cnt)
 605                 limit = cdev->int_params.fp_msix_cnt;
 606
 607         if (!limit)
 608                 return -ENOMEM;
 609
 610         return min_t(int, cnt, limit);
 611 }
 612
 613 static int qed_get_int_fp(struct qed_dev *cdev, struct qed_int_info *info)
 614 {
 615         memset(info, 0, sizeof(struct qed_int_info));
 616
 617         if (!cdev->int_params.fp_initialized) {
 618                 DP_INFO(cdev,
 619                         "Protocol driver requested interrupt information, but its support is not yet configured\n");
 620                 return -EINVAL;
 621         }
 622
 623         /* Need to expose only MSI-X information; Single IRQ is handled solely
 624          * by qed.
 625          */
 626         if (cdev->int_params.out.int_mode == QED_INT_MODE_MSIX) {
 627                 int msix_base = cdev->int_params.fp_msix_base;
 628
 629                 info->msix_cnt = cdev->int_params.fp_msix_cnt;
 630                 info->msix = &cdev->int_params.msix_table[msix_base];
 631         }
 632
 633         return 0;
 634 }
 635
 636 static int qed_slowpath_setup_int(struct qed_dev *cdev,
 637                                   enum qed_int_mode int_mode)
 638 {
 639         int rc, i;
 640         u8 num_vectors = 0;
 641
 642         memset(&cdev->int_params, 0, sizeof(struct qed_int_params));
 643
 644         cdev->int_params.in.int_mode = int_mode;
 645         for_each_hwfn(cdev, i)
 646                 num_vectors +=  qed_int_get_num_sbs(&cdev->hwfns[i], NULL) + 1;
 647         cdev->int_params.in.num_vectors = num_vectors;
 648
 649         /* We want a minimum of one slowpath and one fastpath vector per hwfn */
 650         cdev->int_params.in.min_msix_cnt = cdev->num_hwfns * 2;
 651
 652         rc = qed_set_int_mode(cdev, false);
 653         if (rc)  {
 654                 DP_ERR(cdev, "qed_slowpath_setup_int ERR\n");
 655                 return rc;
 656         }
 657
 658         cdev->int_params.fp_msix_base = cdev->num_hwfns;
 659         cdev->int_params.fp_msix_cnt = cdev->int_params.out.num_vectors -
 660                                        cdev->num_hwfns;
 661
 662         return 0;
 663 }
 664
 665 u32 qed_unzip_data(struct qed_hwfn *p_hwfn, u32 input_len,
 666                    u8 *input_buf, u32 max_size, u8 *unzip_buf)
 667 {
 668         int rc;
 669
 670         p_hwfn->stream->next_in = input_buf;
 671         p_hwfn->stream->avail_in = input_len;
 672         p_hwfn->stream->next_out = unzip_buf;
 673         p_hwfn->stream->avail_out = max_size;
 674
 675         rc = zlib_inflateInit2(p_hwfn->stream, MAX_WBITS);
 676
 677         if (rc != Z_OK) {
 678                 DP_VERBOSE(p_hwfn, NETIF_MSG_DRV, "zlib init failed, rc = %d\n",
 679                            rc);
 680                 return 0;
 681         }
 682
 683         rc = zlib_inflate(p_hwfn->stream, Z_FINISH);
 684         zlib_inflateEnd(p_hwfn->stream);
 685
 686         if (rc != Z_OK && rc != Z_STREAM_END) {
 687                 DP_VERBOSE(p_hwfn, NETIF_MSG_DRV, "FW unzip error: %s, rc=%d\n",
 688                            p_hwfn->stream->msg, rc);
 689                 return 0;
 690         }
 691
 692         return p_hwfn->stream->total_out / 4;
 693 }
 694
 695 static int qed_alloc_stream_mem(struct qed_dev *cdev)
 696 {
 697         int i;
 698         void *workspace;
 699
 700         for_each_hwfn(cdev, i) {
 701                 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
 702
 703                 p_hwfn->stream = kzalloc(sizeof(*p_hwfn->stream), GFP_KERNEL);
 704                 if (!p_hwfn->stream)
 705                         return -ENOMEM;
 706
 707                 workspace = vzalloc(zlib_inflate_workspacesize());
 708                 if (!workspace)
 709                         return -ENOMEM;
 710                 p_hwfn->stream->workspace = workspace;
 711         }
 712
 713         return 0;
 714 }
 715
 716 static void qed_free_stream_mem(struct qed_dev *cdev)
 717 {
 718         int i;
 719
 720         for_each_hwfn(cdev, i) {
 721                 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
 722
 723                 if (!p_hwfn->stream)
 724                         return;
 725
 726                 vfree(p_hwfn->stream->workspace);
 727                 kfree(p_hwfn->stream);
 728         }
 729 }
 730
 731 static void qed_update_pf_params(struct qed_dev *cdev,
 732                                  struct qed_pf_params *params)
 733 {
 734         int i;
 735
 736         for (i = 0; i < cdev->num_hwfns; i++) {
 737                 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
 738
 739                 p_hwfn->pf_params = *params;
 740         }
 741 }
 742
 743 static int qed_slowpath_start(struct qed_dev *cdev,
 744                               struct qed_slowpath_params *params)
 745 {
 746         struct qed_mcp_drv_version drv_version;
 747         const u8 *data = NULL;
 748         struct qed_hwfn *hwfn;
 749         int rc;
 750
 751         rc = request_firmware(&cdev->firmware, QED_FW_FILE_NAME,
 752                               &cdev->pdev->dev);
 753         if (rc) {
 754                 DP_NOTICE(cdev,
 755                           "Failed to find fw file - /lib/firmware/%s\n",
 756                           QED_FW_FILE_NAME);
 757                 goto err;
 758         }
 759
 760         rc = qed_nic_setup(cdev);
 761         if (rc)
 762                 goto err;
 763
 764         rc = qed_slowpath_setup_int(cdev, params->int_mode);
 765         if (rc)
 766                 goto err1;
 767
 768         /* Request the slowpath IRQ */
 769         rc = qed_slowpath_irq_req(cdev);
 770         if (rc)
 771                 goto err2;
 772
 773         /* Allocate stream for unzipping */
 774         rc = qed_alloc_stream_mem(cdev);
 775         if (rc) {
 776                 DP_NOTICE(cdev, "Failed to allocate stream memory\n");
 777                 goto err3;
 778         }
 779
 780         /* Start the slowpath */
 781         data = cdev->firmware->data;
 782
 783         rc = qed_hw_init(cdev, true, cdev->int_params.out.int_mode,
 784                          true, data);
 785         if (rc)
 786                 goto err3;
 787
 788         DP_INFO(cdev,
 789                 "HW initialization and function start completed successfully\n");
 790
 791         hwfn = QED_LEADING_HWFN(cdev);
 792         drv_version.version = (params->drv_major << 24) |
 793                               (params->drv_minor << 16) |
 794                               (params->drv_rev << 8) |
 795                               (params->drv_eng);
 796         strlcpy(drv_version.name, params->name,
 797                 MCP_DRV_VER_STR_SIZE - 4);
 798         rc = qed_mcp_send_drv_version(hwfn, hwfn->p_main_ptt,
 799                                       &drv_version);
 800         if (rc) {
 801                 DP_NOTICE(cdev, "Failed sending drv version command\n");
 802                 return rc;
 803         }
 804
 805         return 0;
 806
 807 err3:
 808         qed_free_stream_mem(cdev);
 809         qed_slowpath_irq_free(cdev);
 810 err2:
 811         qed_disable_msix(cdev);
 812 err1:
 813         qed_resc_free(cdev);
 814 err:
 815         release_firmware(cdev->firmware);
 816
 817         return rc;
 818 }
 819
 820 static int qed_slowpath_stop(struct qed_dev *cdev)
 821 {
 822         if (!cdev)
 823                 return -ENODEV;
 824
 825         qed_free_stream_mem(cdev);
 826
 827         qed_nic_stop(cdev);
 828         qed_slowpath_irq_free(cdev);
 829
 830         qed_disable_msix(cdev);
 831         qed_nic_reset(cdev);
 832
 833         release_firmware(cdev->firmware);
 834
 835         return 0;
 836 }
 837
 838 static void qed_set_id(struct qed_dev *cdev, char name[NAME_SIZE],
 839                        char ver_str[VER_SIZE])
 840 {
 841         int i;
 842
 843         memcpy(cdev->name, name, NAME_SIZE);
 844         for_each_hwfn(cdev, i)
 845                 snprintf(cdev->hwfns[i].name, NAME_SIZE, "%s-%d", name, i);
 846
 847         memcpy(cdev->ver_str, ver_str, VER_SIZE);
 848         cdev->drv_type = DRV_ID_DRV_TYPE_LINUX;
 849 }
 850
 851 static u32 qed_sb_init(struct qed_dev *cdev,
 852                        struct qed_sb_info *sb_info,
 853                        void *sb_virt_addr,
 854                        dma_addr_t sb_phy_addr, u16 sb_id,
 855                        enum qed_sb_type type)
 856 {
 857         struct qed_hwfn *p_hwfn;
 858         int hwfn_index;
 859         u16 rel_sb_id;
 860         u8 n_hwfns;
 861         u32 rc;
 862
 863         /* RoCE uses single engine and CMT uses two engines. When using both
 864          * we force only a single engine. Storage uses only engine 0 too.
 865          */
 866         if (type == QED_SB_TYPE_L2_QUEUE)
 867                 n_hwfns = cdev->num_hwfns;
 868         else
 869                 n_hwfns = 1;
 870
 871         hwfn_index = sb_id % n_hwfns;
 872         p_hwfn = &cdev->hwfns[hwfn_index];
 873         rel_sb_id = sb_id / n_hwfns;
 874
 875         DP_VERBOSE(cdev, NETIF_MSG_INTR,
 876                    "hwfn [%d] <--[init]-- SB %04x [0x%04x upper]\n",
 877                    hwfn_index, rel_sb_id, sb_id);
 878
 879         rc = qed_int_sb_init(p_hwfn, p_hwfn->p_main_ptt, sb_info,
 880                              sb_virt_addr, sb_phy_addr, rel_sb_id);
 881
 882         return rc;
 883 }
 884
 885 static u32 qed_sb_release(struct qed_dev *cdev,
 886                           struct qed_sb_info *sb_info,
 887                           u16 sb_id)
 888 {
 889         struct qed_hwfn *p_hwfn;
 890         int hwfn_index;
 891         u16 rel_sb_id;
 892         u32 rc;
 893
 894         hwfn_index = sb_id % cdev->num_hwfns;
 895         p_hwfn = &cdev->hwfns[hwfn_index];
 896         rel_sb_id = sb_id / cdev->num_hwfns;
 897
 898         DP_VERBOSE(cdev, NETIF_MSG_INTR,
 899                    "hwfn [%d] <--[init]-- SB %04x [0x%04x upper]\n",
 900                    hwfn_index, rel_sb_id, sb_id);
 901
 902         rc = qed_int_sb_release(p_hwfn, sb_info, rel_sb_id);
 903
 904         return rc;
 905 }
 906
 907 static int qed_set_link(struct qed_dev *cdev,
 908                         struct qed_link_params *params)
 909 {
 910         struct qed_hwfn *hwfn;
 911         struct qed_mcp_link_params *link_params;
 912         struct qed_ptt *ptt;
 913         int rc;
 914
 915         if (!cdev)
 916                 return -ENODEV;
 917
 918         /* The link should be set only once per PF */
 919         hwfn = &cdev->hwfns[0];
 920
 921         ptt = qed_ptt_acquire(hwfn);
 922         if (!ptt)
 923                 return -EBUSY;
 924
 925         link_params = qed_mcp_get_link_params(hwfn);
 926         if (params->override_flags & QED_LINK_OVERRIDE_SPEED_AUTONEG)
 927                 link_params->speed.autoneg = params->autoneg;
 928         if (params->override_flags & QED_LINK_OVERRIDE_SPEED_ADV_SPEEDS) {
 929                 link_params->speed.advertised_speeds = 0;
 930                 if ((params->adv_speeds & SUPPORTED_1000baseT_Half) ||
 931                     (params->adv_speeds & SUPPORTED_1000baseT_Full))
 932                         link_params->speed.advertised_speeds |=
 933                                 NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_1G;
 934                 if (params->adv_speeds & SUPPORTED_10000baseKR_Full)
 935                         link_params->speed.advertised_speeds |=
 936                                 NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_10G;
 937                 if (params->adv_speeds & SUPPORTED_40000baseLR4_Full)
 938                         link_params->speed.advertised_speeds |=
 939                                 NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_40G;
 940                 if (params->adv_speeds & 0)
 941                         link_params->speed.advertised_speeds |=
 942                                 NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_50G;
 943                 if (params->adv_speeds & 0)
 944                         link_params->speed.advertised_speeds |=
 945                                 NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_100G;
 946         }
 947         if (params->override_flags & QED_LINK_OVERRIDE_SPEED_FORCED_SPEED)
 948                 link_params->speed.forced_speed = params->forced_speed;
 949
 950         rc = qed_mcp_set_link(hwfn, ptt, params->link_up);
 951
 952         qed_ptt_release(hwfn, ptt);
 953
 954         return rc;
 955 }
 956
 957 static int qed_get_port_type(u32 media_type)
 958 {
 959         int port_type;
 960
 961         switch (media_type) {
 962         case MEDIA_SFPP_10G_FIBER:
 963         case MEDIA_SFP_1G_FIBER:
 964         case MEDIA_XFP_FIBER:
 965         case MEDIA_KR:
 966                 port_type = PORT_FIBRE;
 967                 break;
 968         case MEDIA_DA_TWINAX:
 969                 port_type = PORT_DA;
 970                 break;
 971         case MEDIA_BASE_T:
 972                 port_type = PORT_TP;
 973                 break;
 974         case MEDIA_NOT_PRESENT:
 975                 port_type = PORT_NONE;
 976                 break;
 977         case MEDIA_UNSPECIFIED:
 978         default:
 979                 port_type = PORT_OTHER;
 980                 break;
 981         }
 982         return port_type;
 983 }
 984
 985 static void qed_fill_link(struct qed_hwfn *hwfn,
 986                           struct qed_link_output *if_link)
 987 {
 988         struct qed_mcp_link_params params;
 989         struct qed_mcp_link_state link;
 990         struct qed_mcp_link_capabilities link_caps;
 991         u32 media_type;
 992
 993         memset(if_link, 0, sizeof(*if_link));
 994
 995         /* Prepare source inputs */
 996         memcpy(&params, qed_mcp_get_link_params(hwfn), sizeof(params));
 997         memcpy(&link, qed_mcp_get_link_state(hwfn), sizeof(link));
 998         memcpy(&link_caps, qed_mcp_get_link_capabilities(hwfn),
 999                sizeof(link_caps));
1000
1001         /* Set the link parameters to pass to protocol driver */
1002         if (link.link_up)
1003                 if_link->link_up = true;
1004
1005         /* TODO - at the moment assume supported and advertised speed equal */
1006         if_link->supported_caps = SUPPORTED_FIBRE;
1007         if (params.speed.autoneg)
1008                 if_link->supported_caps |= SUPPORTED_Autoneg;
1009         if (params.pause.autoneg ||
1010             (params.pause.forced_rx && params.pause.forced_tx))
1011                 if_link->supported_caps |= SUPPORTED_Asym_Pause;
1012         if (params.pause.autoneg || params.pause.forced_rx ||
1013             params.pause.forced_tx)
1014                 if_link->supported_caps |= SUPPORTED_Pause;
1015
1016         if_link->advertised_caps = if_link->supported_caps;
1017         if (params.speed.advertised_speeds &
1018             NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_1G)
1019                 if_link->advertised_caps |= SUPPORTED_1000baseT_Half |
1020                                            SUPPORTED_1000baseT_Full;
1021         if (params.speed.advertised_speeds &
1022             NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_10G)
1023                 if_link->advertised_caps |= SUPPORTED_10000baseKR_Full;
1024         if (params.speed.advertised_speeds &
1025                 NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_40G)
1026                 if_link->advertised_caps |= SUPPORTED_40000baseLR4_Full;
1027         if (params.speed.advertised_speeds &
1028                 NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_50G)
1029                 if_link->advertised_caps |= 0;
1030         if (params.speed.advertised_speeds &
1031                 NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_100G)
1032                 if_link->advertised_caps |= 0;
1033
1034         if (link_caps.speed_capabilities &
1035             NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_1G)
1036                 if_link->supported_caps |= SUPPORTED_1000baseT_Half |
1037                                            SUPPORTED_1000baseT_Full;
1038         if (link_caps.speed_capabilities &
1039             NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_10G)
1040                 if_link->supported_caps |= SUPPORTED_10000baseKR_Full;
1041         if (link_caps.speed_capabilities &
1042                 NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_40G)
1043                 if_link->supported_caps |= SUPPORTED_40000baseLR4_Full;
1044         if (link_caps.speed_capabilities &
1045                 NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_50G)
1046                 if_link->supported_caps |= 0;
1047         if (link_caps.speed_capabilities &
1048                 NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_100G)
1049                 if_link->supported_caps |= 0;
1050
1051         if (link.link_up)
1052                 if_link->speed = link.speed;
1053
1054         /* TODO - fill duplex properly */
1055         if_link->duplex = DUPLEX_FULL;
1056         qed_mcp_get_media_type(hwfn->cdev, &media_type);
1057         if_link->port = qed_get_port_type(media_type);
1058
1059         if_link->autoneg = params.speed.autoneg;
1060
1061         if (params.pause.autoneg)
1062                 if_link->pause_config |= QED_LINK_PAUSE_AUTONEG_ENABLE;
1063         if (params.pause.forced_rx)
1064                 if_link->pause_config |= QED_LINK_PAUSE_RX_ENABLE;
1065         if (params.pause.forced_tx)
1066                 if_link->pause_config |= QED_LINK_PAUSE_TX_ENABLE;
1067
1068         /* Link partner capabilities */
1069         if (link.partner_adv_speed &
1070             QED_LINK_PARTNER_SPEED_1G_HD)
1071                 if_link->lp_caps |= SUPPORTED_1000baseT_Half;
1072         if (link.partner_adv_speed &
1073             QED_LINK_PARTNER_SPEED_1G_FD)
1074                 if_link->lp_caps |= SUPPORTED_1000baseT_Full;
1075         if (link.partner_adv_speed &
1076             QED_LINK_PARTNER_SPEED_10G)
1077                 if_link->lp_caps |= SUPPORTED_10000baseKR_Full;
1078         if (link.partner_adv_speed &
1079             QED_LINK_PARTNER_SPEED_40G)
1080                 if_link->lp_caps |= SUPPORTED_40000baseLR4_Full;
1081         if (link.partner_adv_speed &
1082             QED_LINK_PARTNER_SPEED_50G)
1083                 if_link->lp_caps |= 0;
1084         if (link.partner_adv_speed &
1085             QED_LINK_PARTNER_SPEED_100G)
1086                 if_link->lp_caps |= 0;
1087
1088         if (link.an_complete)
1089                 if_link->lp_caps |= SUPPORTED_Autoneg;
1090
1091         if (link.partner_adv_pause)
1092                 if_link->lp_caps |= SUPPORTED_Pause;
1093         if (link.partner_adv_pause == QED_LINK_PARTNER_ASYMMETRIC_PAUSE ||
1094             link.partner_adv_pause == QED_LINK_PARTNER_BOTH_PAUSE)
1095                 if_link->lp_caps |= SUPPORTED_Asym_Pause;
1096 }
1097
1098 static void qed_get_current_link(struct qed_dev *cdev,
1099                                  struct qed_link_output *if_link)
1100 {
1101         qed_fill_link(&cdev->hwfns[0], if_link);
1102 }
1103
1104 void qed_link_update(struct qed_hwfn *hwfn)
1105 {
1106         void *cookie = hwfn->cdev->ops_cookie;
1107         struct qed_common_cb_ops *op = hwfn->cdev->protocol_ops.common;
1108         struct qed_link_output if_link;
1109
1110         qed_fill_link(hwfn, &if_link);
1111
1112         if (IS_LEAD_HWFN(hwfn) && cookie)
1113                 op->link_update(cookie, &if_link);
1114 }
1115
1116 static int qed_drain(struct qed_dev *cdev)
1117 {
1118         struct qed_hwfn *hwfn;
1119         struct qed_ptt *ptt;
1120         int i, rc;
1121
1122         for_each_hwfn(cdev, i) {
1123                 hwfn = &cdev->hwfns[i];
1124                 ptt = qed_ptt_acquire(hwfn);
1125                 if (!ptt) {
1126                         DP_NOTICE(hwfn, "Failed to drain NIG; No PTT\n");
1127                         return -EBUSY;
1128                 }
1129                 rc = qed_mcp_drain(hwfn, ptt);
1130                 if (rc)
1131                         return rc;
1132                 qed_ptt_release(hwfn, ptt);
1133         }
1134
1135         return 0;
1136 }
1137
1138 const struct qed_common_ops qed_common_ops_pass = {
1139         .probe = &qed_probe,
1140         .remove = &qed_remove,
1141         .set_power_state = &qed_set_power_state,
1142         .set_id = &qed_set_id,
1143         .update_pf_params = &qed_update_pf_params,
1144         .slowpath_start = &qed_slowpath_start,
1145         .slowpath_stop = &qed_slowpath_stop,
1146         .set_fp_int = &qed_set_int_fp,
1147         .get_fp_int = &qed_get_int_fp,
1148         .sb_init = &qed_sb_init,
1149         .sb_release = &qed_sb_release,
1150         .simd_handler_config = &qed_simd_handler_config,
1151         .simd_handler_clean = &qed_simd_handler_clean,
1152         .set_link = &qed_set_link,
1153         .get_link = &qed_get_current_link,
1154         .drain = &qed_drain,
1155         .update_msglvl = &qed_init_dp,
1156         .chain_alloc = &qed_chain_alloc,
1157         .chain_free = &qed_chain_free,
1158 };
1159
1160 u32 qed_get_protocol_version(enum qed_protocol protocol)
1161 {
1162         switch (protocol) {
1163         case QED_PROTOCOL_ETH:
1164                 return QED_ETH_INTERFACE_VERSION;
1165         default:
1166                 return 0;
1167         }
1168 }
1169 EXPORT_SYMBOL(qed_get_protocol_version);