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Merge branch 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6
[karo-tx-linux.git] / drivers / net / wireless / realtek / rtlwifi / rtl8723be / trx.c
1 /******************************************************************************
2  *
3  * Copyright(c) 2009-2014  Realtek Corporation.
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms of version 2 of the GNU General Public License as
7  * published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope that it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
12  * more details.
13  *
14  * The full GNU General Public License is included in this distribution in the
15  * file called LICENSE.
16  *
17  * Contact Information:
18  * wlanfae <wlanfae@realtek.com>
19  * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
20  * Hsinchu 300, Taiwan.
21  *
22  * Larry Finger <Larry.Finger@lwfinger.net>
23  *
24  *****************************************************************************/
25
26 #include "../wifi.h"
27 #include "../pci.h"
28 #include "../base.h"
29 #include "../stats.h"
30 #include "reg.h"
31 #include "def.h"
32 #include "phy.h"
33 #include "trx.h"
34 #include "led.h"
35 #include "dm.h"
36 #include "fw.h"
37
38 static u8 _rtl8723be_map_hwqueue_to_fwqueue(struct sk_buff *skb, u8 hw_queue)
39 {
40         __le16 fc = rtl_get_fc(skb);
41
42         if (unlikely(ieee80211_is_beacon(fc)))
43                 return QSLT_BEACON;
44         if (ieee80211_is_mgmt(fc) || ieee80211_is_ctl(fc))
45                 return QSLT_MGNT;
46
47         return skb->priority;
48 }
49
50 static void _rtl8723be_query_rxphystatus(struct ieee80211_hw *hw,
51                                          struct rtl_stats *pstatus, u8 *pdesc,
52                                          struct rx_fwinfo_8723be *p_drvinfo,
53                                          bool bpacket_match_bssid,
54                                          bool bpacket_toself,
55                                          bool packet_beacon)
56 {
57         struct rtl_priv *rtlpriv = rtl_priv(hw);
58         struct phy_status_rpt *p_phystrpt = (struct phy_status_rpt *)p_drvinfo;
59         char rx_pwr_all = 0, rx_pwr[4];
60         u8 rf_rx_num = 0, evm, pwdb_all, pwdb_all_bt = 0;
61         u8 i, max_spatial_stream;
62         u32 rssi, total_rssi = 0;
63         bool is_cck = pstatus->is_cck;
64         u8 lan_idx, vga_idx;
65
66         /* Record it for next packet processing */
67         pstatus->packet_matchbssid = bpacket_match_bssid;
68         pstatus->packet_toself = bpacket_toself;
69         pstatus->packet_beacon = packet_beacon;
70         pstatus->rx_mimo_signalquality[0] = -1;
71         pstatus->rx_mimo_signalquality[1] = -1;
72
73         if (is_cck) {
74                 u8 cck_highpwr;
75                 u8 cck_agc_rpt;
76
77                 cck_agc_rpt = p_phystrpt->cck_agc_rpt_ofdm_cfosho_a;
78
79                 /* (1)Hardware does not provide RSSI for CCK */
80                 /* (2)PWDB, Average PWDB cacluated by
81                  * hardware (for rate adaptive)
82                  */
83                 cck_highpwr = (u8)rtl_get_bbreg(hw, RFPGA0_XA_HSSIPARAMETER2,
84                                                  BIT(9));
85
86                 lan_idx = ((cck_agc_rpt & 0xE0) >> 5);
87                 vga_idx = (cck_agc_rpt & 0x1f);
88
89                 switch (lan_idx) {
90                 /* 46 53 73 95 201301231630 */
91                 /* 46 53 77 99 201301241630 */
92                 case 6:
93                         rx_pwr_all = -34 - (2 * vga_idx);
94                         break;
95                 case 4:
96                         rx_pwr_all = -14 - (2 * vga_idx);
97                         break;
98                 case 1:
99                         rx_pwr_all = 6 - (2 * vga_idx);
100                         break;
101                 case 0:
102                         rx_pwr_all = 16 - (2 * vga_idx);
103                         break;
104                 default:
105                         break;
106                 }
107
108                 pwdb_all = rtl_query_rxpwrpercentage(rx_pwr_all);
109                 if (pwdb_all > 100)
110                         pwdb_all = 100;
111
112                 pstatus->rx_pwdb_all = pwdb_all;
113                 pstatus->bt_rx_rssi_percentage = pwdb_all;
114                 pstatus->recvsignalpower = rx_pwr_all;
115
116                 /* (3) Get Signal Quality (EVM) */
117                 if (bpacket_match_bssid) {
118                         u8 sq, sq_rpt;
119                         if (pstatus->rx_pwdb_all > 40) {
120                                 sq = 100;
121                         } else {
122                                 sq_rpt = p_phystrpt->cck_sig_qual_ofdm_pwdb_all;
123                                 if (sq_rpt > 64)
124                                         sq = 0;
125                                 else if (sq_rpt < 20)
126                                         sq = 100;
127                                 else
128                                         sq = ((64 - sq_rpt) * 100) / 44;
129                         }
130                         pstatus->signalquality = sq;
131                         pstatus->rx_mimo_signalquality[0] = sq;
132                         pstatus->rx_mimo_signalquality[1] = -1;
133                 }
134         } else {
135                 /* (1)Get RSSI for HT rate */
136                 for (i = RF90_PATH_A; i < RF6052_MAX_PATH; i++) {
137                         /* we will judge RF RX path now. */
138                         if (rtlpriv->dm.rfpath_rxenable[i])
139                                 rf_rx_num++;
140
141                         rx_pwr[i] = ((p_phystrpt->path_agc[i].gain & 0x3f) * 2)
142                                     - 110;
143
144                         pstatus->rx_pwr[i] = rx_pwr[i];
145                         /* Translate DBM to percentage. */
146                         rssi = rtl_query_rxpwrpercentage(rx_pwr[i]);
147                         total_rssi += rssi;
148
149                         pstatus->rx_mimo_signalstrength[i] = (u8)rssi;
150                 }
151
152                 /* (2)PWDB, Average PWDB cacluated by
153                  * hardware (for rate adaptive)
154                  */
155                 rx_pwr_all = ((p_phystrpt->cck_sig_qual_ofdm_pwdb_all >> 1) &
156                              0x7f) - 110;
157
158                 pwdb_all = rtl_query_rxpwrpercentage(rx_pwr_all);
159                 pwdb_all_bt = pwdb_all;
160                 pstatus->rx_pwdb_all = pwdb_all;
161                 pstatus->bt_rx_rssi_percentage = pwdb_all_bt;
162                 pstatus->rxpower = rx_pwr_all;
163                 pstatus->recvsignalpower = rx_pwr_all;
164
165                 /* (3)EVM of HT rate */
166                 if (pstatus->rate >= DESC92C_RATEMCS8 &&
167                     pstatus->rate <= DESC92C_RATEMCS15)
168                         max_spatial_stream = 2;
169                 else
170                         max_spatial_stream = 1;
171
172                 for (i = 0; i < max_spatial_stream; i++) {
173                         evm = rtl_evm_db_to_percentage(
174                                                 p_phystrpt->stream_rxevm[i]);
175
176                         if (bpacket_match_bssid) {
177                                 /* Fill value in RFD, Get the first
178                                  * spatial stream only
179                                  */
180                                 if (i == 0)
181                                         pstatus->signalquality =
182                                                         (u8)(evm & 0xff);
183                                 pstatus->rx_mimo_signalquality[i] =
184                                                         (u8)(evm & 0xff);
185                         }
186                 }
187
188                 if (bpacket_match_bssid) {
189                         for (i = RF90_PATH_A; i <= RF90_PATH_B; i++)
190                                 rtl_priv(hw)->dm.cfo_tail[i] =
191                                         (int)p_phystrpt->path_cfotail[i];
192
193                         if (rtl_priv(hw)->dm.packet_count == 0xffffffff)
194                                 rtl_priv(hw)->dm.packet_count = 0;
195                         else
196                                 rtl_priv(hw)->dm.packet_count++;
197                 }
198         }
199
200         /* UI BSS List signal strength(in percentage),
201          * make it good looking, from 0~100.
202          */
203         if (is_cck)
204                 pstatus->signalstrength = (u8)(rtl_signal_scale_mapping(hw,
205                                                                 pwdb_all));
206         else if (rf_rx_num != 0)
207                 pstatus->signalstrength = (u8)(rtl_signal_scale_mapping(hw,
208                                                 total_rssi /= rf_rx_num));
209 }
210
211 static void _rtl8723be_translate_rx_signal_stuff(struct ieee80211_hw *hw,
212                                         struct sk_buff *skb,
213                                         struct rtl_stats *pstatus,
214                                         u8 *pdesc,
215                                         struct rx_fwinfo_8723be *p_drvinfo)
216 {
217         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
218         struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
219         struct ieee80211_hdr *hdr;
220         u8 *tmp_buf;
221         u8 *praddr;
222         u8 *psaddr;
223         u16 fc, type;
224         bool packet_matchbssid, packet_toself, packet_beacon;
225
226         tmp_buf = skb->data + pstatus->rx_drvinfo_size + pstatus->rx_bufshift;
227
228         hdr = (struct ieee80211_hdr *)tmp_buf;
229         fc = le16_to_cpu(hdr->frame_control);
230         type = WLAN_FC_GET_TYPE(hdr->frame_control);
231         praddr = hdr->addr1;
232         psaddr = ieee80211_get_SA(hdr);
233         memcpy(pstatus->psaddr, psaddr, ETH_ALEN);
234
235         packet_matchbssid = ((IEEE80211_FTYPE_CTL != type) &&
236              (ether_addr_equal(mac->bssid, (fc & IEEE80211_FCTL_TODS) ?
237                                   hdr->addr1 : (fc & IEEE80211_FCTL_FROMDS) ?
238                                   hdr->addr2 : hdr->addr3)) &&
239                                   (!pstatus->hwerror) &&
240                                   (!pstatus->crc) && (!pstatus->icv));
241
242         packet_toself = packet_matchbssid &&
243             (ether_addr_equal(praddr, rtlefuse->dev_addr));
244
245         /* YP: packet_beacon is not initialized,
246          * this assignment is neccesary,
247          * otherwise it counld be true in this case
248          * the situation is much worse in Kernel 3.10
249          */
250         if (ieee80211_is_beacon(hdr->frame_control))
251                 packet_beacon = true;
252         else
253                 packet_beacon = false;
254
255         if (packet_beacon && packet_matchbssid)
256                 rtl_priv(hw)->dm.dbginfo.num_qry_beacon_pkt++;
257
258         _rtl8723be_query_rxphystatus(hw, pstatus, pdesc, p_drvinfo,
259                                      packet_matchbssid,
260                                      packet_toself,
261                                      packet_beacon);
262
263         rtl_process_phyinfo(hw, tmp_buf, pstatus);
264 }
265
266 static void _rtl8723be_insert_emcontent(struct rtl_tcb_desc *ptcb_desc,
267                                         u8 *virtualaddress)
268 {
269         u32 dwtmp = 0;
270         memset(virtualaddress, 0, 8);
271
272         SET_EARLYMODE_PKTNUM(virtualaddress, ptcb_desc->empkt_num);
273         if (ptcb_desc->empkt_num == 1) {
274                 dwtmp = ptcb_desc->empkt_len[0];
275         } else {
276                 dwtmp = ptcb_desc->empkt_len[0];
277                 dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4;
278                 dwtmp += ptcb_desc->empkt_len[1];
279         }
280         SET_EARLYMODE_LEN0(virtualaddress, dwtmp);
281
282         if (ptcb_desc->empkt_num <= 3) {
283                 dwtmp = ptcb_desc->empkt_len[2];
284         } else {
285                 dwtmp = ptcb_desc->empkt_len[2];
286                 dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4;
287                 dwtmp += ptcb_desc->empkt_len[3];
288         }
289         SET_EARLYMODE_LEN1(virtualaddress, dwtmp);
290         if (ptcb_desc->empkt_num <= 5) {
291                 dwtmp = ptcb_desc->empkt_len[4];
292         } else {
293                 dwtmp = ptcb_desc->empkt_len[4];
294                 dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4;
295                 dwtmp += ptcb_desc->empkt_len[5];
296         }
297         SET_EARLYMODE_LEN2_1(virtualaddress, dwtmp & 0xF);
298         SET_EARLYMODE_LEN2_2(virtualaddress, dwtmp >> 4);
299         if (ptcb_desc->empkt_num <= 7) {
300                 dwtmp = ptcb_desc->empkt_len[6];
301         } else {
302                 dwtmp = ptcb_desc->empkt_len[6];
303                 dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4;
304                 dwtmp += ptcb_desc->empkt_len[7];
305         }
306         SET_EARLYMODE_LEN3(virtualaddress, dwtmp);
307         if (ptcb_desc->empkt_num <= 9) {
308                 dwtmp = ptcb_desc->empkt_len[8];
309         } else {
310                 dwtmp = ptcb_desc->empkt_len[8];
311                 dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4;
312                 dwtmp += ptcb_desc->empkt_len[9];
313         }
314         SET_EARLYMODE_LEN4(virtualaddress, dwtmp);
315 }
316
317 bool rtl8723be_rx_query_desc(struct ieee80211_hw *hw,
318                              struct rtl_stats *status,
319                              struct ieee80211_rx_status *rx_status,
320                              u8 *pdesc, struct sk_buff *skb)
321 {
322         struct rtl_priv *rtlpriv = rtl_priv(hw);
323         struct rx_fwinfo_8723be *p_drvinfo;
324         struct ieee80211_hdr *hdr;
325
326         u32 phystatus = GET_RX_DESC_PHYST(pdesc);
327
328         status->length = (u16)GET_RX_DESC_PKT_LEN(pdesc);
329         status->rx_drvinfo_size = (u8)GET_RX_DESC_DRV_INFO_SIZE(pdesc) *
330                                   RX_DRV_INFO_SIZE_UNIT;
331         status->rx_bufshift = (u8)(GET_RX_DESC_SHIFT(pdesc) & 0x03);
332         status->icv = (u16) GET_RX_DESC_ICV(pdesc);
333         status->crc = (u16) GET_RX_DESC_CRC32(pdesc);
334         status->hwerror = (status->crc | status->icv);
335         status->decrypted = !GET_RX_DESC_SWDEC(pdesc);
336         status->rate = (u8)GET_RX_DESC_RXMCS(pdesc);
337         status->shortpreamble = (u16)GET_RX_DESC_SPLCP(pdesc);
338         status->isampdu = (bool)(GET_RX_DESC_PAGGR(pdesc) == 1);
339         status->isfirst_ampdu = (bool)(GET_RX_DESC_PAGGR(pdesc) == 1);
340         status->timestamp_low = GET_RX_DESC_TSFL(pdesc);
341         status->rx_is40Mhzpacket = (bool)GET_RX_DESC_BW(pdesc);
342         status->bandwidth = (u8)GET_RX_DESC_BW(pdesc);
343         status->macid = GET_RX_DESC_MACID(pdesc);
344         status->is_ht = (bool)GET_RX_DESC_RXHT(pdesc);
345
346         status->is_cck = RX_HAL_IS_CCK_RATE(status->rate);
347
348         if (GET_RX_STATUS_DESC_RPT_SEL(pdesc))
349                 status->packet_report_type = C2H_PACKET;
350         else
351                 status->packet_report_type = NORMAL_RX;
352
353
354         if (GET_RX_STATUS_DESC_MAGIC_MATCH(pdesc))
355                 status->wake_match = BIT(2);
356         else if (GET_RX_STATUS_DESC_MAGIC_MATCH(pdesc))
357                 status->wake_match = BIT(1);
358         else if (GET_RX_STATUS_DESC_UNICAST_MATCH(pdesc))
359                 status->wake_match = BIT(0);
360         else
361                 status->wake_match = 0;
362         if (status->wake_match)
363                 RT_TRACE(rtlpriv, COMP_RXDESC, DBG_LOUD,
364                 "GGGGGGGGGGGGGet Wakeup Packet!! WakeMatch=%d\n",
365                 status->wake_match);
366         rx_status->freq = hw->conf.chandef.chan->center_freq;
367         rx_status->band = hw->conf.chandef.chan->band;
368
369         hdr = (struct ieee80211_hdr *)(skb->data + status->rx_drvinfo_size +
370                                        status->rx_bufshift);
371
372         if (status->crc)
373                 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
374
375         if (status->rx_is40Mhzpacket)
376                 rx_status->flag |= RX_FLAG_40MHZ;
377
378         if (status->is_ht)
379                 rx_status->flag |= RX_FLAG_HT;
380
381         rx_status->flag |= RX_FLAG_MACTIME_START;
382
383         /* hw will set status->decrypted true, if it finds the
384          * frame is open data frame or mgmt frame.
385          * So hw will not decryption robust managment frame
386          * for IEEE80211w but still set status->decrypted
387          * true, so here we should set it back to undecrypted
388          * for IEEE80211w frame, and mac80211 sw will help
389          * to decrypt it
390          */
391         if (status->decrypted) {
392                 if ((!_ieee80211_is_robust_mgmt_frame(hdr)) &&
393                     (ieee80211_has_protected(hdr->frame_control)))
394                         rx_status->flag |= RX_FLAG_DECRYPTED;
395                 else
396                         rx_status->flag &= ~RX_FLAG_DECRYPTED;
397         }
398
399         /* rate_idx: index of data rate into band's
400          * supported rates or MCS index if HT rates
401          * are use (RX_FLAG_HT)
402          */
403         rx_status->rate_idx = rtlwifi_rate_mapping(hw, status->is_ht,
404                                                    false, status->rate);
405
406         rx_status->mactime = status->timestamp_low;
407         if (phystatus) {
408                 p_drvinfo = (struct rx_fwinfo_8723be *)(skb->data +
409                                                         status->rx_bufshift);
410
411                 _rtl8723be_translate_rx_signal_stuff(hw, skb, status,
412                                                      pdesc, p_drvinfo);
413         }
414         rx_status->signal = status->recvsignalpower + 10;
415         if (status->packet_report_type == TX_REPORT2) {
416                 status->macid_valid_entry[0] =
417                   GET_RX_RPT2_DESC_MACID_VALID_1(pdesc);
418                 status->macid_valid_entry[1] =
419                   GET_RX_RPT2_DESC_MACID_VALID_2(pdesc);
420         }
421         return true;
422 }
423
424 void rtl8723be_tx_fill_desc(struct ieee80211_hw *hw,
425                             struct ieee80211_hdr *hdr, u8 *pdesc_tx,
426                             u8 *txbd, struct ieee80211_tx_info *info,
427                             struct ieee80211_sta *sta, struct sk_buff *skb,
428                             u8 hw_queue, struct rtl_tcb_desc *ptcb_desc)
429 {
430         struct rtl_priv *rtlpriv = rtl_priv(hw);
431         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
432         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
433         struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
434         u8 *pdesc = (u8 *)pdesc_tx;
435         u16 seq_number;
436         __le16 fc = hdr->frame_control;
437         unsigned int buf_len = 0;
438         unsigned int skb_len = skb->len;
439         u8 fw_qsel = _rtl8723be_map_hwqueue_to_fwqueue(skb, hw_queue);
440         bool firstseg = ((hdr->seq_ctrl &
441                             cpu_to_le16(IEEE80211_SCTL_FRAG)) == 0);
442         bool lastseg = ((hdr->frame_control &
443                            cpu_to_le16(IEEE80211_FCTL_MOREFRAGS)) == 0);
444         dma_addr_t mapping;
445         u8 bw_40 = 0;
446         u8 short_gi = 0;
447
448         if (mac->opmode == NL80211_IFTYPE_STATION) {
449                 bw_40 = mac->bw_40;
450         } else if (mac->opmode == NL80211_IFTYPE_AP ||
451                 mac->opmode == NL80211_IFTYPE_ADHOC) {
452                 if (sta)
453                         bw_40 = sta->ht_cap.cap &
454                                 IEEE80211_HT_CAP_SUP_WIDTH_20_40;
455         }
456         seq_number = (le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4;
457         rtl_get_tcb_desc(hw, info, sta, skb, ptcb_desc);
458         /* reserve 8 byte for AMPDU early mode */
459         if (rtlhal->earlymode_enable) {
460                 skb_push(skb, EM_HDR_LEN);
461                 memset(skb->data, 0, EM_HDR_LEN);
462         }
463         buf_len = skb->len;
464         mapping = pci_map_single(rtlpci->pdev, skb->data, skb->len,
465                                  PCI_DMA_TODEVICE);
466         if (pci_dma_mapping_error(rtlpci->pdev, mapping)) {
467                 RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE, "DMA mapping error");
468                 return;
469         }
470         CLEAR_PCI_TX_DESC_CONTENT(pdesc, sizeof(struct tx_desc_8723be));
471         if (ieee80211_is_nullfunc(fc) || ieee80211_is_ctl(fc)) {
472                 firstseg = true;
473                 lastseg = true;
474         }
475         if (firstseg) {
476                 if (rtlhal->earlymode_enable) {
477                         SET_TX_DESC_PKT_OFFSET(pdesc, 1);
478                         SET_TX_DESC_OFFSET(pdesc, USB_HWDESC_HEADER_LEN +
479                                            EM_HDR_LEN);
480                         if (ptcb_desc->empkt_num) {
481                                 RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
482                                          "Insert 8 byte.pTcb->EMPktNum:%d\n",
483                                           ptcb_desc->empkt_num);
484                                 _rtl8723be_insert_emcontent(ptcb_desc,
485                                                             (u8 *)(skb->data));
486                         }
487                 } else {
488                         SET_TX_DESC_OFFSET(pdesc, USB_HWDESC_HEADER_LEN);
489                 }
490
491                 /* ptcb_desc->use_driver_rate = true; */
492                 SET_TX_DESC_TX_RATE(pdesc, ptcb_desc->hw_rate);
493                 if (ptcb_desc->hw_rate > DESC92C_RATEMCS0)
494                         short_gi = (ptcb_desc->use_shortgi) ? 1 : 0;
495                 else
496                         short_gi = (ptcb_desc->use_shortpreamble) ? 1 : 0;
497
498                 SET_TX_DESC_DATA_SHORTGI(pdesc, short_gi);
499
500                 if (info->flags & IEEE80211_TX_CTL_AMPDU) {
501                         SET_TX_DESC_AGG_ENABLE(pdesc, 1);
502                         SET_TX_DESC_MAX_AGG_NUM(pdesc, 0x14);
503                 }
504                 SET_TX_DESC_SEQ(pdesc, seq_number);
505                 SET_TX_DESC_RTS_ENABLE(pdesc, ((ptcb_desc->rts_enable &&
506                                                 !ptcb_desc->cts_enable) ?
507                                                 1 : 0));
508                 SET_TX_DESC_HW_RTS_ENABLE(pdesc, 0);
509                 SET_TX_DESC_CTS2SELF(pdesc, ((ptcb_desc->cts_enable) ?
510                                               1 : 0));
511
512                 SET_TX_DESC_RTS_RATE(pdesc, ptcb_desc->rts_rate);
513
514                 SET_TX_DESC_RTS_SC(pdesc, ptcb_desc->rts_sc);
515                 SET_TX_DESC_RTS_SHORT(pdesc,
516                         ((ptcb_desc->rts_rate <= DESC92C_RATE54M) ?
517                          (ptcb_desc->rts_use_shortpreamble ? 1 : 0) :
518                          (ptcb_desc->rts_use_shortgi ? 1 : 0)));
519
520                 if (ptcb_desc->tx_enable_sw_calc_duration)
521                         SET_TX_DESC_NAV_USE_HDR(pdesc, 1);
522
523                 if (bw_40) {
524                         if (ptcb_desc->packet_bw == HT_CHANNEL_WIDTH_20_40) {
525                                 SET_TX_DESC_DATA_BW(pdesc, 1);
526                                 SET_TX_DESC_TX_SUB_CARRIER(pdesc, 3);
527                         } else {
528                                 SET_TX_DESC_DATA_BW(pdesc, 0);
529                                 SET_TX_DESC_TX_SUB_CARRIER(pdesc, mac->cur_40_prime_sc);
530                         }
531                 } else {
532                         SET_TX_DESC_DATA_BW(pdesc, 0);
533                         SET_TX_DESC_TX_SUB_CARRIER(pdesc, 0);
534                 }
535
536                 SET_TX_DESC_LINIP(pdesc, 0);
537                 SET_TX_DESC_PKT_SIZE(pdesc, (u16) skb_len);
538                 if (sta) {
539                         u8 ampdu_density = sta->ht_cap.ampdu_density;
540                         SET_TX_DESC_AMPDU_DENSITY(pdesc, ampdu_density);
541                 }
542                 if (info->control.hw_key) {
543                         struct ieee80211_key_conf *keyconf =
544                                                 info->control.hw_key;
545                         switch (keyconf->cipher) {
546                         case WLAN_CIPHER_SUITE_WEP40:
547                         case WLAN_CIPHER_SUITE_WEP104:
548                         case WLAN_CIPHER_SUITE_TKIP:
549                                 SET_TX_DESC_SEC_TYPE(pdesc, 0x1);
550                                 break;
551                         case WLAN_CIPHER_SUITE_CCMP:
552                                 SET_TX_DESC_SEC_TYPE(pdesc, 0x3);
553                                 break;
554                         default:
555                                 SET_TX_DESC_SEC_TYPE(pdesc, 0x0);
556                                 break;
557                         }
558                 }
559
560                 SET_TX_DESC_QUEUE_SEL(pdesc, fw_qsel);
561                 SET_TX_DESC_DATA_RATE_FB_LIMIT(pdesc, 0x1F);
562                 SET_TX_DESC_RTS_RATE_FB_LIMIT(pdesc, 0xF);
563                 SET_TX_DESC_DISABLE_FB(pdesc, ptcb_desc->disable_ratefallback ?
564                                               1 : 0);
565                 SET_TX_DESC_USE_RATE(pdesc, ptcb_desc->use_driver_rate ? 1 : 0);
566
567                 /* Set TxRate and RTSRate in TxDesc  */
568                 /* This prevent Tx initial rate of new-coming packets */
569                 /* from being overwritten by retried  packet rate.*/
570                 if (ieee80211_is_data_qos(fc)) {
571                         if (mac->rdg_en) {
572                                 RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
573                                          "Enable RDG function.\n");
574                                 SET_TX_DESC_RDG_ENABLE(pdesc, 1);
575                                 SET_TX_DESC_HTC(pdesc, 1);
576                         }
577                 }
578         }
579
580         SET_TX_DESC_FIRST_SEG(pdesc, (firstseg ? 1 : 0));
581         SET_TX_DESC_LAST_SEG(pdesc, (lastseg ? 1 : 0));
582         SET_TX_DESC_TX_BUFFER_SIZE(pdesc, (u16) buf_len);
583         SET_TX_DESC_TX_BUFFER_ADDRESS(pdesc, mapping);
584         /* if (rtlpriv->dm.useramask) { */
585         if (1) {
586                 SET_TX_DESC_RATE_ID(pdesc, ptcb_desc->ratr_index);
587                 SET_TX_DESC_MACID(pdesc, ptcb_desc->mac_id);
588         } else {
589                 SET_TX_DESC_RATE_ID(pdesc, 0xC + ptcb_desc->ratr_index);
590                 SET_TX_DESC_MACID(pdesc, ptcb_desc->mac_id);
591         }
592         if (!ieee80211_is_data_qos(fc))  {
593                 SET_TX_DESC_HWSEQ_EN(pdesc, 1);
594                 SET_TX_DESC_HWSEQ_SEL(pdesc, 0);
595         }
596         SET_TX_DESC_MORE_FRAG(pdesc, (lastseg ? 0 : 1));
597         if (is_multicast_ether_addr(ieee80211_get_DA(hdr)) ||
598             is_broadcast_ether_addr(ieee80211_get_DA(hdr))) {
599                 SET_TX_DESC_BMC(pdesc, 1);
600         }
601
602         RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE, "\n");
603 }
604
605 void rtl8723be_tx_fill_cmddesc(struct ieee80211_hw *hw, u8 *pdesc,
606                                bool firstseg, bool lastseg,
607                                struct sk_buff *skb)
608 {
609         struct rtl_priv *rtlpriv = rtl_priv(hw);
610         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
611         u8 fw_queue = QSLT_BEACON;
612
613         dma_addr_t mapping = pci_map_single(rtlpci->pdev,
614                                             skb->data, skb->len,
615                                             PCI_DMA_TODEVICE);
616
617         if (pci_dma_mapping_error(rtlpci->pdev, mapping)) {
618                 RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
619                          "DMA mapping error");
620                 return;
621         }
622         CLEAR_PCI_TX_DESC_CONTENT(pdesc, TX_DESC_SIZE);
623
624         SET_TX_DESC_OFFSET(pdesc, USB_HWDESC_HEADER_LEN);
625
626         SET_TX_DESC_TX_RATE(pdesc, DESC92C_RATE1M);
627
628         SET_TX_DESC_SEQ(pdesc, 0);
629
630         SET_TX_DESC_LINIP(pdesc, 0);
631
632         SET_TX_DESC_QUEUE_SEL(pdesc, fw_queue);
633
634         SET_TX_DESC_FIRST_SEG(pdesc, 1);
635         SET_TX_DESC_LAST_SEG(pdesc, 1);
636
637         SET_TX_DESC_TX_BUFFER_SIZE(pdesc, (u16)(skb->len));
638
639         SET_TX_DESC_TX_BUFFER_ADDRESS(pdesc, mapping);
640
641         SET_TX_DESC_RATE_ID(pdesc, 0);
642         SET_TX_DESC_MACID(pdesc, 0);
643
644         SET_TX_DESC_OWN(pdesc, 1);
645
646         SET_TX_DESC_PKT_SIZE((u8 *)pdesc, (u16)(skb->len));
647
648         SET_TX_DESC_FIRST_SEG(pdesc, 1);
649         SET_TX_DESC_LAST_SEG(pdesc, 1);
650
651         SET_TX_DESC_USE_RATE(pdesc, 1);
652
653         RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_LOUD,
654                       "H2C Tx Cmd Content\n", pdesc, TX_DESC_SIZE);
655 }
656
657 void rtl8723be_set_desc(struct ieee80211_hw *hw, u8 *pdesc,
658                         bool istx, u8 desc_name, u8 *val)
659 {
660         if (istx) {
661                 switch (desc_name) {
662                 case HW_DESC_OWN:
663                         SET_TX_DESC_OWN(pdesc, 1);
664                         break;
665                 case HW_DESC_TX_NEXTDESC_ADDR:
666                         SET_TX_DESC_NEXT_DESC_ADDRESS(pdesc, *(u32 *)val);
667                         break;
668                 default:
669                         RT_ASSERT(false, "ERR txdesc :%d not process\n",
670                                           desc_name);
671                         break;
672                 }
673         } else {
674                 switch (desc_name) {
675                 case HW_DESC_RXOWN:
676                         SET_RX_DESC_OWN(pdesc, 1);
677                         break;
678                 case HW_DESC_RXBUFF_ADDR:
679                         SET_RX_DESC_BUFF_ADDR(pdesc, *(u32 *)val);
680                         break;
681                 case HW_DESC_RXPKT_LEN:
682                         SET_RX_DESC_PKT_LEN(pdesc, *(u32 *)val);
683                         break;
684                 case HW_DESC_RXERO:
685                         SET_RX_DESC_EOR(pdesc, 1);
686                         break;
687                 default:
688                         RT_ASSERT(false, "ERR rxdesc :%d not process\n",
689                                           desc_name);
690                         break;
691                 }
692         }
693 }
694
695 u32 rtl8723be_get_desc(u8 *pdesc, bool istx, u8 desc_name)
696 {
697         u32 ret = 0;
698
699         if (istx) {
700                 switch (desc_name) {
701                 case HW_DESC_OWN:
702                         ret = GET_TX_DESC_OWN(pdesc);
703                         break;
704                 case HW_DESC_TXBUFF_ADDR:
705                         ret = GET_TX_DESC_TX_BUFFER_ADDRESS(pdesc);
706                         break;
707                 default:
708                         RT_ASSERT(false, "ERR txdesc :%d not process\n",
709                                           desc_name);
710                         break;
711                 }
712         } else {
713                 switch (desc_name) {
714                 case HW_DESC_OWN:
715                         ret = GET_RX_DESC_OWN(pdesc);
716                         break;
717                 case HW_DESC_RXPKT_LEN:
718                         ret = GET_RX_DESC_PKT_LEN(pdesc);
719                         break;
720                 case HW_DESC_RXBUFF_ADDR:
721                         ret = GET_RX_DESC_BUFF_ADDR(pdesc);
722                         break;
723                 default:
724                         RT_ASSERT(false, "ERR rxdesc :%d not process\n",
725                                   desc_name);
726                         break;
727                 }
728         }
729         return ret;
730 }
731
732 bool rtl8723be_is_tx_desc_closed(struct ieee80211_hw *hw,
733                                  u8 hw_queue, u16 index)
734 {
735         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
736         struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[hw_queue];
737         u8 *entry = (u8 *)(&ring->desc[ring->idx]);
738         u8 own = (u8)rtl8723be_get_desc(entry, true, HW_DESC_OWN);
739
740         /*beacon packet will only use the first
741          *descriptor defautly,and the own may not
742          *be cleared by the hardware
743          */
744         if (own)
745                 return false;
746         return true;
747 }
748
749 void rtl8723be_tx_polling(struct ieee80211_hw *hw, u8 hw_queue)
750 {
751         struct rtl_priv *rtlpriv = rtl_priv(hw);
752         if (hw_queue == BEACON_QUEUE) {
753                 rtl_write_word(rtlpriv, REG_PCIE_CTRL_REG, BIT(4));
754         } else {
755                 rtl_write_word(rtlpriv, REG_PCIE_CTRL_REG,
756                                BIT(0) << (hw_queue));
757         }
758 }
759
760 u32 rtl8723be_rx_command_packet(struct ieee80211_hw *hw,
761                                 struct rtl_stats status,
762                                 struct sk_buff *skb)
763 {
764         u32 result = 0;
765         struct rtl_priv *rtlpriv = rtl_priv(hw);
766
767         switch (status.packet_report_type) {
768         case NORMAL_RX:
769                         result = 0;
770                         break;
771         case C2H_PACKET:
772                         rtl8723be_c2h_packet_handler(hw, skb->data,
773                                                      (u8)skb->len);
774                         result = 1;
775                         break;
776         default:
777                         RT_TRACE(rtlpriv, COMP_RECV, DBG_TRACE,
778                                  "No this packet type!!\n");
779                         break;
780         }
781
782         return result;
783 }