drivers/net/wireless/realtek/rtlwifi/rtl8821ae/phy.h

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2009-2010  Realtek Corporation.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * The full GNU General Public License is included in this distribution in the
  15  * file called LICENSE.
  16  *
  17  * Contact Information:
  18  * wlanfae <wlanfae@realtek.com>
  19  * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  20  * Hsinchu 300, Taiwan.
  21  *
  22  * Larry Finger <Larry.Finger@lwfinger.net>
  23  *
  24  *****************************************************************************/
  25
  26 #ifndef __RTL8821AE_PHY_H__
  27 #define __RTL8821AE_PHY_H__
  28
  29 /* MAX_TX_COUNT must always be set to 4, otherwise read
  30  * efuse table sequence will be wrong.
  31  */
  32 #define MAX_TX_COUNT                            4
  33 #define TX_1S                                   0
  34 #define TX_2S                                   1
  35 #define TX_3S                                   2
  36 #define TX_4S                                   3
  37
  38 #define MAX_POWER_INDEX                         0x3F
  39
  40 #define MAX_PRECMD_CNT                          16
  41 #define MAX_RFDEPENDCMD_CNT                     16
  42 #define MAX_POSTCMD_CNT                         16
  43
  44 #define MAX_DOZE_WAITING_TIMES_9x               64
  45
  46 #define RT_CANNOT_IO(hw)                        false
  47 #define HIGHPOWER_RADIOA_ARRAYLEN               22
  48
  49 #define IQK_ADDA_REG_NUM                        16
  50 #define IQK_BB_REG_NUM                          9
  51 #define MAX_TOLERANCE                           5
  52 #define IQK_DELAY_TIME                          10
  53 #define index_mapping_NUM                       15
  54
  55 #define APK_BB_REG_NUM                          5
  56 #define APK_AFE_REG_NUM                         16
  57 #define APK_CURVE_REG_NUM                       4
  58 #define PATH_NUM                                2
  59
  60 #define LOOP_LIMIT                              5
  61 #define MAX_STALL_TIME                          50
  62 #define AntennaDiversityValue                   0x80
  63 #define MAX_TXPWR_IDX_NMODE_92S                 63
  64 #define Reset_Cnt_Limit                         3
  65
  66 #define IQK_ADDA_REG_NUM                        16
  67 #define IQK_MAC_REG_NUM                         4
  68
  69 #define RF6052_MAX_PATH                         2
  70
  71 #define CT_OFFSET_MAC_ADDR                      0X16
  72
  73 #define CT_OFFSET_CCK_TX_PWR_IDX                0x5A
  74 #define CT_OFFSET_HT401S_TX_PWR_IDX             0x60
  75 #define CT_OFFSET_HT402S_TX_PWR_IDX_DIFF        0x66
  76 #define CT_OFFSET_HT20_TX_PWR_IDX_DIFF          0x69
  77 #define CT_OFFSET_OFDM_TX_PWR_IDX_DIFF          0x6C
  78
  79 #define CT_OFFSET_HT40_MAX_PWR_OFFSET           0x6F
  80 #define CT_OFFSET_HT20_MAX_PWR_OFFSET           0x72
  81
  82 #define CT_OFFSET_CHANNEL_PLAH                  0x75
  83 #define CT_OFFSET_THERMAL_METER                 0x78
  84 #define CT_OFFSET_RF_OPTION                     0x79
  85 #define CT_OFFSET_VERSION                       0x7E
  86 #define CT_OFFSET_CUSTOMER_ID                   0x7F
  87
  88 #define RTL8821AE_MAX_PATH_NUM                  2
  89
  90 #define TARGET_CHNL_NUM_2G_5G_8812              59
  91
  92 enum swchnlcmd_id {
  93         CMDID_END,
  94         CMDID_SET_TXPOWEROWER_LEVEL,
  95         CMDID_BBREGWRITE10,
  96         CMDID_WRITEPORT_ULONG,
  97         CMDID_WRITEPORT_USHORT,
  98         CMDID_WRITEPORT_UCHAR,
  99         CMDID_RF_WRITEREG,
 100 };
 101
 102 struct swchnlcmd {
 103         enum swchnlcmd_id cmdid;
 104         u32 para1;
 105         u32 para2;
 106         u32 msdelay;
 107 };
 108
 109 enum hw90_block_e {
 110         HW90_BLOCK_MAC = 0,
 111         HW90_BLOCK_PHY0 = 1,
 112         HW90_BLOCK_PHY1 = 2,
 113         HW90_BLOCK_RF = 3,
 114         HW90_BLOCK_MAXIMUM = 4,
 115 };
 116
 117 enum baseband_config_type {
 118         BASEBAND_CONFIG_PHY_REG = 0,
 119         BASEBAND_CONFIG_AGC_TAB = 1,
 120 };
 121
 122 enum ra_offset_area {
 123         RA_OFFSET_LEGACY_OFDM1,
 124         RA_OFFSET_LEGACY_OFDM2,
 125         RA_OFFSET_HT_OFDM1,
 126         RA_OFFSET_HT_OFDM2,
 127         RA_OFFSET_HT_OFDM3,
 128         RA_OFFSET_HT_OFDM4,
 129         RA_OFFSET_HT_CCK,
 130 };
 131
 132 enum antenna_path {
 133         ANTENNA_NONE,
 134         ANTENNA_D,
 135         ANTENNA_C,
 136         ANTENNA_CD,
 137         ANTENNA_B,
 138         ANTENNA_BD,
 139         ANTENNA_BC,
 140         ANTENNA_BCD,
 141         ANTENNA_A,
 142         ANTENNA_AD,
 143         ANTENNA_AC,
 144         ANTENNA_ACD,
 145         ANTENNA_AB,
 146         ANTENNA_ABD,
 147         ANTENNA_ABC,
 148         ANTENNA_ABCD
 149 };
 150
 151 struct r_antenna_select_ofdm {
 152         u32 r_tx_antenna:4;
 153         u32 r_ant_l:4;
 154         u32 r_ant_non_ht:4;
 155         u32 r_ant_ht1:4;
 156         u32 r_ant_ht2:4;
 157         u32 r_ant_ht_s1:4;
 158         u32 r_ant_non_ht_s1:4;
 159         u32 ofdm_txsc:2;
 160         u32 reserved:2;
 161 };
 162
 163 struct r_antenna_select_cck {
 164         u8 r_cckrx_enable_2:2;
 165         u8 r_cckrx_enable:2;
 166         u8 r_ccktx_enable:4;
 167 };
 168
 169 struct efuse_contents {
 170         u8 mac_addr[ETH_ALEN];
 171         u8 cck_tx_power_idx[6];
 172         u8 ht40_1s_tx_power_idx[6];
 173         u8 ht40_2s_tx_power_idx_diff[3];
 174         u8 ht20_tx_power_idx_diff[3];
 175         u8 ofdm_tx_power_idx_diff[3];
 176         u8 ht40_max_power_offset[3];
 177         u8 ht20_max_power_offset[3];
 178         u8 channel_plan;
 179         u8 thermal_meter;
 180         u8 rf_option[5];
 181         u8 version;
 182         u8 oem_id;
 183         u8 regulatory;
 184 };
 185
 186 struct tx_power_struct {
 187         u8 cck[RTL8821AE_MAX_PATH_NUM][CHANNEL_MAX_NUMBER];
 188         u8 ht40_1s[RTL8821AE_MAX_PATH_NUM][CHANNEL_MAX_NUMBER];
 189         u8 ht40_2s[RTL8821AE_MAX_PATH_NUM][CHANNEL_MAX_NUMBER];
 190         u8 ht20_diff[RTL8821AE_MAX_PATH_NUM][CHANNEL_MAX_NUMBER];
 191         u8 legacy_ht_diff[RTL8821AE_MAX_PATH_NUM][CHANNEL_MAX_NUMBER];
 192         u8 legacy_ht_txpowerdiff;
 193         u8 groupht20[RTL8821AE_MAX_PATH_NUM][CHANNEL_MAX_NUMBER];
 194         u8 groupht40[RTL8821AE_MAX_PATH_NUM][CHANNEL_MAX_NUMBER];
 195         u8 pwrgroup_cnt;
 196         u32 mcs_original_offset[4][16];
 197 };
 198 enum _ANT_DIV_TYPE {
 199         NO_ANTDIV                       = 0xFF,
 200         CG_TRX_HW_ANTDIV                = 0x01,
 201         CGCS_RX_HW_ANTDIV               = 0x02,
 202         FIXED_HW_ANTDIV                 = 0x03,
 203         CG_TRX_SMART_ANTDIV             = 0x04,
 204         CGCS_RX_SW_ANTDIV               = 0x05,
 205
 206 };
 207
 208 u32 rtl8821ae_phy_query_bb_reg(struct ieee80211_hw *hw,
 209                                u32 regaddr, u32 bitmask);
 210 void rtl8821ae_phy_set_bb_reg(struct ieee80211_hw *hw,
 211                               u32 regaddr, u32 bitmask, u32 data);
 212 u32 rtl8821ae_phy_query_rf_reg(struct ieee80211_hw *hw,
 213                                enum radio_path rfpath, u32 regaddr,
 214                                u32 bitmask);
 215 void rtl8821ae_phy_set_rf_reg(struct ieee80211_hw *hw,
 216                               enum radio_path rfpath, u32 regaddr,
 217                               u32 bitmask, u32 data);
 218 bool rtl8821ae_phy_mac_config(struct ieee80211_hw *hw);
 219 bool rtl8821ae_phy_bb_config(struct ieee80211_hw *hw);
 220 bool rtl8821ae_phy_rf_config(struct ieee80211_hw *hw);
 221 void rtl8821ae_phy_switch_wirelessband(struct ieee80211_hw *hw,
 222                                        u8 band);
 223 void rtl8821ae_phy_get_hw_reg_originalvalue(struct ieee80211_hw *hw);
 224 void rtl8821ae_phy_get_txpower_level(struct ieee80211_hw *hw,
 225                                      long *powerlevel);
 226 void rtl8821ae_phy_set_txpower_level(struct ieee80211_hw *hw,
 227                                      u8 channel);
 228 void rtl8821ae_phy_scan_operation_backup(struct ieee80211_hw *hw,
 229                                          u8 operation);
 230 void rtl8821ae_phy_set_bw_mode_callback(struct ieee80211_hw *hw);
 231 void rtl8821ae_phy_set_bw_mode(struct ieee80211_hw *hw,
 232                                enum nl80211_channel_type ch_type);
 233 void rtl8821ae_phy_sw_chnl_callback(struct ieee80211_hw *hw);
 234 u8 rtl8821ae_phy_sw_chnl(struct ieee80211_hw *hw);
 235 void rtl8821ae_phy_iq_calibrate(struct ieee80211_hw *hw,
 236                                 bool b_recovery);
 237 void rtl8812ae_phy_iq_calibrate(struct ieee80211_hw *hw,
 238                                 bool b_recovery);
 239 void rtl8821ae_phy_ap_calibrate(struct ieee80211_hw *hw, char delta);
 240 void rtl8821ae_phy_lc_calibrate(struct ieee80211_hw *hw);
 241 void rtl8821ae_phy_set_rfpath_switch(struct ieee80211_hw *hw, bool bmain);
 242 bool rtl8812ae_phy_config_rf_with_headerfile(struct ieee80211_hw *hw,
 243                                              enum radio_path rfpath);
 244 bool rtl8821ae_phy_config_rf_with_headerfile(struct ieee80211_hw *hw,
 245                                              enum radio_path rfpath);
 246 bool rtl8821ae_phy_set_io_cmd(struct ieee80211_hw *hw, enum io_type iotype);
 247 bool rtl8821ae_phy_set_rf_power_state(struct ieee80211_hw *hw,
 248                                       enum rf_pwrstate rfpwr_state);
 249 u8 _rtl8812ae_get_right_chnl_place_for_iqk(u8 chnl);
 250 void rtl8821ae_phy_set_txpower_level_by_path(struct ieee80211_hw *hw,
 251                                              u8 channel, u8 path);
 252 void rtl8812ae_do_iqk(struct ieee80211_hw *hw, u8 delta_thermal_index,
 253         u8 thermal_value, u8 threshold);
 254 void rtl8821ae_do_iqk(struct ieee80211_hw *hw, u8 delta_thermal_index,
 255                       u8 thermal_value, u8 threshold);
 256 void rtl8821ae_reset_iqk_result(struct ieee80211_hw *hw);
 257 u32 phy_get_tx_swing_8812A(struct ieee80211_hw *hw, u8 band, u8 rf_path);
 258
 259 #endif