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[karo-tx-linux.git] / drivers / nvme / host / pci.c
1 /*
2  * NVM Express device driver
3  * Copyright (c) 2011-2014, Intel Corporation.
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms and conditions of the GNU General Public License,
7  * version 2, as published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
12  * more details.
13  */
14
15 #include <linux/bitops.h>
16 #include <linux/blkdev.h>
17 #include <linux/blk-mq.h>
18 #include <linux/cpu.h>
19 #include <linux/delay.h>
20 #include <linux/errno.h>
21 #include <linux/fs.h>
22 #include <linux/genhd.h>
23 #include <linux/hdreg.h>
24 #include <linux/idr.h>
25 #include <linux/init.h>
26 #include <linux/interrupt.h>
27 #include <linux/io.h>
28 #include <linux/kdev_t.h>
29 #include <linux/kthread.h>
30 #include <linux/kernel.h>
31 #include <linux/list_sort.h>
32 #include <linux/mm.h>
33 #include <linux/module.h>
34 #include <linux/moduleparam.h>
35 #include <linux/pci.h>
36 #include <linux/poison.h>
37 #include <linux/ptrace.h>
38 #include <linux/sched.h>
39 #include <linux/slab.h>
40 #include <linux/t10-pi.h>
41 #include <linux/types.h>
42 #include <linux/pr.h>
43 #include <scsi/sg.h>
44 #include <asm-generic/io-64-nonatomic-lo-hi.h>
45 #include <asm/unaligned.h>
46
47 #include <uapi/linux/nvme_ioctl.h>
48 #include "nvme.h"
49
50 #define NVME_MINORS             (1U << MINORBITS)
51 #define NVME_Q_DEPTH            1024
52 #define NVME_AQ_DEPTH           256
53 #define SQ_SIZE(depth)          (depth * sizeof(struct nvme_command))
54 #define CQ_SIZE(depth)          (depth * sizeof(struct nvme_completion))
55 #define ADMIN_TIMEOUT           (admin_timeout * HZ)
56 #define SHUTDOWN_TIMEOUT        (shutdown_timeout * HZ)
57
58 static unsigned char admin_timeout = 60;
59 module_param(admin_timeout, byte, 0644);
60 MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands");
61
62 unsigned char nvme_io_timeout = 30;
63 module_param_named(io_timeout, nvme_io_timeout, byte, 0644);
64 MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O");
65
66 static unsigned char shutdown_timeout = 5;
67 module_param(shutdown_timeout, byte, 0644);
68 MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown");
69
70 static int nvme_major;
71 module_param(nvme_major, int, 0);
72
73 static int nvme_char_major;
74 module_param(nvme_char_major, int, 0);
75
76 static int use_threaded_interrupts;
77 module_param(use_threaded_interrupts, int, 0);
78
79 static bool use_cmb_sqes = true;
80 module_param(use_cmb_sqes, bool, 0644);
81 MODULE_PARM_DESC(use_cmb_sqes, "use controller's memory buffer for I/O SQes");
82
83 static DEFINE_SPINLOCK(dev_list_lock);
84 static LIST_HEAD(dev_list);
85 static struct task_struct *nvme_thread;
86 static struct workqueue_struct *nvme_workq;
87 static wait_queue_head_t nvme_kthread_wait;
88
89 static struct class *nvme_class;
90
91 static int __nvme_reset(struct nvme_dev *dev);
92 static int nvme_reset(struct nvme_dev *dev);
93 static int nvme_process_cq(struct nvme_queue *nvmeq);
94 static void nvme_dead_ctrl(struct nvme_dev *dev);
95
96 struct async_cmd_info {
97         struct kthread_work work;
98         struct kthread_worker *worker;
99         struct request *req;
100         u32 result;
101         int status;
102         void *ctx;
103 };
104
105 /*
106  * An NVM Express queue.  Each device has at least two (one for admin
107  * commands and one for I/O commands).
108  */
109 struct nvme_queue {
110         struct device *q_dmadev;
111         struct nvme_dev *dev;
112         char irqname[24];       /* nvme4294967295-65535\0 */
113         spinlock_t q_lock;
114         struct nvme_command *sq_cmds;
115         struct nvme_command __iomem *sq_cmds_io;
116         volatile struct nvme_completion *cqes;
117         struct blk_mq_tags **tags;
118         dma_addr_t sq_dma_addr;
119         dma_addr_t cq_dma_addr;
120         u32 __iomem *q_db;
121         u16 q_depth;
122         s16 cq_vector;
123         u16 sq_head;
124         u16 sq_tail;
125         u16 cq_head;
126         u16 qid;
127         u8 cq_phase;
128         u8 cqe_seen;
129         struct async_cmd_info cmdinfo;
130 };
131
132 /*
133  * Check we didin't inadvertently grow the command struct
134  */
135 static inline void _nvme_check_size(void)
136 {
137         BUILD_BUG_ON(sizeof(struct nvme_rw_command) != 64);
138         BUILD_BUG_ON(sizeof(struct nvme_create_cq) != 64);
139         BUILD_BUG_ON(sizeof(struct nvme_create_sq) != 64);
140         BUILD_BUG_ON(sizeof(struct nvme_delete_queue) != 64);
141         BUILD_BUG_ON(sizeof(struct nvme_features) != 64);
142         BUILD_BUG_ON(sizeof(struct nvme_format_cmd) != 64);
143         BUILD_BUG_ON(sizeof(struct nvme_abort_cmd) != 64);
144         BUILD_BUG_ON(sizeof(struct nvme_command) != 64);
145         BUILD_BUG_ON(sizeof(struct nvme_id_ctrl) != 4096);
146         BUILD_BUG_ON(sizeof(struct nvme_id_ns) != 4096);
147         BUILD_BUG_ON(sizeof(struct nvme_lba_range_type) != 64);
148         BUILD_BUG_ON(sizeof(struct nvme_smart_log) != 512);
149 }
150
151 typedef void (*nvme_completion_fn)(struct nvme_queue *, void *,
152                                                 struct nvme_completion *);
153
154 struct nvme_cmd_info {
155         nvme_completion_fn fn;
156         void *ctx;
157         int aborted;
158         struct nvme_queue *nvmeq;
159         struct nvme_iod iod[0];
160 };
161
162 /*
163  * Max size of iod being embedded in the request payload
164  */
165 #define NVME_INT_PAGES          2
166 #define NVME_INT_BYTES(dev)     (NVME_INT_PAGES * (dev)->page_size)
167 #define NVME_INT_MASK           0x01
168
169 /*
170  * Will slightly overestimate the number of pages needed.  This is OK
171  * as it only leads to a small amount of wasted memory for the lifetime of
172  * the I/O.
173  */
174 static int nvme_npages(unsigned size, struct nvme_dev *dev)
175 {
176         unsigned nprps = DIV_ROUND_UP(size + dev->page_size, dev->page_size);
177         return DIV_ROUND_UP(8 * nprps, PAGE_SIZE - 8);
178 }
179
180 static unsigned int nvme_cmd_size(struct nvme_dev *dev)
181 {
182         unsigned int ret = sizeof(struct nvme_cmd_info);
183
184         ret += sizeof(struct nvme_iod);
185         ret += sizeof(__le64 *) * nvme_npages(NVME_INT_BYTES(dev), dev);
186         ret += sizeof(struct scatterlist) * NVME_INT_PAGES;
187
188         return ret;
189 }
190
191 static int nvme_admin_init_hctx(struct blk_mq_hw_ctx *hctx, void *data,
192                                 unsigned int hctx_idx)
193 {
194         struct nvme_dev *dev = data;
195         struct nvme_queue *nvmeq = dev->queues[0];
196
197         WARN_ON(hctx_idx != 0);
198         WARN_ON(dev->admin_tagset.tags[0] != hctx->tags);
199         WARN_ON(nvmeq->tags);
200
201         hctx->driver_data = nvmeq;
202         nvmeq->tags = &dev->admin_tagset.tags[0];
203         return 0;
204 }
205
206 static void nvme_admin_exit_hctx(struct blk_mq_hw_ctx *hctx, unsigned int hctx_idx)
207 {
208         struct nvme_queue *nvmeq = hctx->driver_data;
209
210         nvmeq->tags = NULL;
211 }
212
213 static int nvme_admin_init_request(void *data, struct request *req,
214                                 unsigned int hctx_idx, unsigned int rq_idx,
215                                 unsigned int numa_node)
216 {
217         struct nvme_dev *dev = data;
218         struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
219         struct nvme_queue *nvmeq = dev->queues[0];
220
221         BUG_ON(!nvmeq);
222         cmd->nvmeq = nvmeq;
223         return 0;
224 }
225
226 static int nvme_init_hctx(struct blk_mq_hw_ctx *hctx, void *data,
227                           unsigned int hctx_idx)
228 {
229         struct nvme_dev *dev = data;
230         struct nvme_queue *nvmeq = dev->queues[hctx_idx + 1];
231
232         if (!nvmeq->tags)
233                 nvmeq->tags = &dev->tagset.tags[hctx_idx];
234
235         WARN_ON(dev->tagset.tags[hctx_idx] != hctx->tags);
236         hctx->driver_data = nvmeq;
237         return 0;
238 }
239
240 static int nvme_init_request(void *data, struct request *req,
241                                 unsigned int hctx_idx, unsigned int rq_idx,
242                                 unsigned int numa_node)
243 {
244         struct nvme_dev *dev = data;
245         struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
246         struct nvme_queue *nvmeq = dev->queues[hctx_idx + 1];
247
248         BUG_ON(!nvmeq);
249         cmd->nvmeq = nvmeq;
250         return 0;
251 }
252
253 static void nvme_set_info(struct nvme_cmd_info *cmd, void *ctx,
254                                 nvme_completion_fn handler)
255 {
256         cmd->fn = handler;
257         cmd->ctx = ctx;
258         cmd->aborted = 0;
259         blk_mq_start_request(blk_mq_rq_from_pdu(cmd));
260 }
261
262 static void *iod_get_private(struct nvme_iod *iod)
263 {
264         return (void *) (iod->private & ~0x1UL);
265 }
266
267 /*
268  * If bit 0 is set, the iod is embedded in the request payload.
269  */
270 static bool iod_should_kfree(struct nvme_iod *iod)
271 {
272         return (iod->private & NVME_INT_MASK) == 0;
273 }
274
275 /* Special values must be less than 0x1000 */
276 #define CMD_CTX_BASE            ((void *)POISON_POINTER_DELTA)
277 #define CMD_CTX_CANCELLED       (0x30C + CMD_CTX_BASE)
278 #define CMD_CTX_COMPLETED       (0x310 + CMD_CTX_BASE)
279 #define CMD_CTX_INVALID         (0x314 + CMD_CTX_BASE)
280
281 static void special_completion(struct nvme_queue *nvmeq, void *ctx,
282                                                 struct nvme_completion *cqe)
283 {
284         if (ctx == CMD_CTX_CANCELLED)
285                 return;
286         if (ctx == CMD_CTX_COMPLETED) {
287                 dev_warn(nvmeq->q_dmadev,
288                                 "completed id %d twice on queue %d\n",
289                                 cqe->command_id, le16_to_cpup(&cqe->sq_id));
290                 return;
291         }
292         if (ctx == CMD_CTX_INVALID) {
293                 dev_warn(nvmeq->q_dmadev,
294                                 "invalid id %d completed on queue %d\n",
295                                 cqe->command_id, le16_to_cpup(&cqe->sq_id));
296                 return;
297         }
298         dev_warn(nvmeq->q_dmadev, "Unknown special completion %p\n", ctx);
299 }
300
301 static void *cancel_cmd_info(struct nvme_cmd_info *cmd, nvme_completion_fn *fn)
302 {
303         void *ctx;
304
305         if (fn)
306                 *fn = cmd->fn;
307         ctx = cmd->ctx;
308         cmd->fn = special_completion;
309         cmd->ctx = CMD_CTX_CANCELLED;
310         return ctx;
311 }
312
313 static void async_req_completion(struct nvme_queue *nvmeq, void *ctx,
314                                                 struct nvme_completion *cqe)
315 {
316         u32 result = le32_to_cpup(&cqe->result);
317         u16 status = le16_to_cpup(&cqe->status) >> 1;
318
319         if (status == NVME_SC_SUCCESS || status == NVME_SC_ABORT_REQ)
320                 ++nvmeq->dev->event_limit;
321         if (status != NVME_SC_SUCCESS)
322                 return;
323
324         switch (result & 0xff07) {
325         case NVME_AER_NOTICE_NS_CHANGED:
326                 dev_info(nvmeq->q_dmadev, "rescanning\n");
327                 schedule_work(&nvmeq->dev->scan_work);
328         default:
329                 dev_warn(nvmeq->q_dmadev, "async event result %08x\n", result);
330         }
331 }
332
333 static void abort_completion(struct nvme_queue *nvmeq, void *ctx,
334                                                 struct nvme_completion *cqe)
335 {
336         struct request *req = ctx;
337
338         u16 status = le16_to_cpup(&cqe->status) >> 1;
339         u32 result = le32_to_cpup(&cqe->result);
340
341         blk_mq_free_request(req);
342
343         dev_warn(nvmeq->q_dmadev, "Abort status:%x result:%x", status, result);
344         ++nvmeq->dev->abort_limit;
345 }
346
347 static void async_completion(struct nvme_queue *nvmeq, void *ctx,
348                                                 struct nvme_completion *cqe)
349 {
350         struct async_cmd_info *cmdinfo = ctx;
351         cmdinfo->result = le32_to_cpup(&cqe->result);
352         cmdinfo->status = le16_to_cpup(&cqe->status) >> 1;
353         queue_kthread_work(cmdinfo->worker, &cmdinfo->work);
354         blk_mq_free_request(cmdinfo->req);
355 }
356
357 static inline struct nvme_cmd_info *get_cmd_from_tag(struct nvme_queue *nvmeq,
358                                   unsigned int tag)
359 {
360         struct request *req = blk_mq_tag_to_rq(*nvmeq->tags, tag);
361
362         return blk_mq_rq_to_pdu(req);
363 }
364
365 /*
366  * Called with local interrupts disabled and the q_lock held.  May not sleep.
367  */
368 static void *nvme_finish_cmd(struct nvme_queue *nvmeq, int tag,
369                                                 nvme_completion_fn *fn)
370 {
371         struct nvme_cmd_info *cmd = get_cmd_from_tag(nvmeq, tag);
372         void *ctx;
373         if (tag >= nvmeq->q_depth) {
374                 *fn = special_completion;
375                 return CMD_CTX_INVALID;
376         }
377         if (fn)
378                 *fn = cmd->fn;
379         ctx = cmd->ctx;
380         cmd->fn = special_completion;
381         cmd->ctx = CMD_CTX_COMPLETED;
382         return ctx;
383 }
384
385 /**
386  * nvme_submit_cmd() - Copy a command into a queue and ring the doorbell
387  * @nvmeq: The queue to use
388  * @cmd: The command to send
389  *
390  * Safe to use from interrupt context
391  */
392 static void __nvme_submit_cmd(struct nvme_queue *nvmeq,
393                                                 struct nvme_command *cmd)
394 {
395         u16 tail = nvmeq->sq_tail;
396
397         if (nvmeq->sq_cmds_io)
398                 memcpy_toio(&nvmeq->sq_cmds_io[tail], cmd, sizeof(*cmd));
399         else
400                 memcpy(&nvmeq->sq_cmds[tail], cmd, sizeof(*cmd));
401
402         if (++tail == nvmeq->q_depth)
403                 tail = 0;
404         writel(tail, nvmeq->q_db);
405         nvmeq->sq_tail = tail;
406 }
407
408 static void nvme_submit_cmd(struct nvme_queue *nvmeq, struct nvme_command *cmd)
409 {
410         unsigned long flags;
411         spin_lock_irqsave(&nvmeq->q_lock, flags);
412         __nvme_submit_cmd(nvmeq, cmd);
413         spin_unlock_irqrestore(&nvmeq->q_lock, flags);
414 }
415
416 static __le64 **iod_list(struct nvme_iod *iod)
417 {
418         return ((void *)iod) + iod->offset;
419 }
420
421 static inline void iod_init(struct nvme_iod *iod, unsigned nbytes,
422                             unsigned nseg, unsigned long private)
423 {
424         iod->private = private;
425         iod->offset = offsetof(struct nvme_iod, sg[nseg]);
426         iod->npages = -1;
427         iod->length = nbytes;
428         iod->nents = 0;
429 }
430
431 static struct nvme_iod *
432 __nvme_alloc_iod(unsigned nseg, unsigned bytes, struct nvme_dev *dev,
433                  unsigned long priv, gfp_t gfp)
434 {
435         struct nvme_iod *iod = kmalloc(sizeof(struct nvme_iod) +
436                                 sizeof(__le64 *) * nvme_npages(bytes, dev) +
437                                 sizeof(struct scatterlist) * nseg, gfp);
438
439         if (iod)
440                 iod_init(iod, bytes, nseg, priv);
441
442         return iod;
443 }
444
445 static struct nvme_iod *nvme_alloc_iod(struct request *rq, struct nvme_dev *dev,
446                                        gfp_t gfp)
447 {
448         unsigned size = !(rq->cmd_flags & REQ_DISCARD) ? blk_rq_bytes(rq) :
449                                                 sizeof(struct nvme_dsm_range);
450         struct nvme_iod *iod;
451
452         if (rq->nr_phys_segments <= NVME_INT_PAGES &&
453             size <= NVME_INT_BYTES(dev)) {
454                 struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(rq);
455
456                 iod = cmd->iod;
457                 iod_init(iod, size, rq->nr_phys_segments,
458                                 (unsigned long) rq | NVME_INT_MASK);
459                 return iod;
460         }
461
462         return __nvme_alloc_iod(rq->nr_phys_segments, size, dev,
463                                 (unsigned long) rq, gfp);
464 }
465
466 static void nvme_free_iod(struct nvme_dev *dev, struct nvme_iod *iod)
467 {
468         const int last_prp = dev->page_size / 8 - 1;
469         int i;
470         __le64 **list = iod_list(iod);
471         dma_addr_t prp_dma = iod->first_dma;
472
473         if (iod->npages == 0)
474                 dma_pool_free(dev->prp_small_pool, list[0], prp_dma);
475         for (i = 0; i < iod->npages; i++) {
476                 __le64 *prp_list = list[i];
477                 dma_addr_t next_prp_dma = le64_to_cpu(prp_list[last_prp]);
478                 dma_pool_free(dev->prp_page_pool, prp_list, prp_dma);
479                 prp_dma = next_prp_dma;
480         }
481
482         if (iod_should_kfree(iod))
483                 kfree(iod);
484 }
485
486 static int nvme_error_status(u16 status)
487 {
488         switch (status & 0x7ff) {
489         case NVME_SC_SUCCESS:
490                 return 0;
491         case NVME_SC_CAP_EXCEEDED:
492                 return -ENOSPC;
493         default:
494                 return -EIO;
495         }
496 }
497
498 #ifdef CONFIG_BLK_DEV_INTEGRITY
499 static void nvme_dif_prep(u32 p, u32 v, struct t10_pi_tuple *pi)
500 {
501         if (be32_to_cpu(pi->ref_tag) == v)
502                 pi->ref_tag = cpu_to_be32(p);
503 }
504
505 static void nvme_dif_complete(u32 p, u32 v, struct t10_pi_tuple *pi)
506 {
507         if (be32_to_cpu(pi->ref_tag) == p)
508                 pi->ref_tag = cpu_to_be32(v);
509 }
510
511 /**
512  * nvme_dif_remap - remaps ref tags to bip seed and physical lba
513  *
514  * The virtual start sector is the one that was originally submitted by the
515  * block layer. Due to partitioning, MD/DM cloning, etc. the actual physical
516  * start sector may be different. Remap protection information to match the
517  * physical LBA on writes, and back to the original seed on reads.
518  *
519  * Type 0 and 3 do not have a ref tag, so no remapping required.
520  */
521 static void nvme_dif_remap(struct request *req,
522                         void (*dif_swap)(u32 p, u32 v, struct t10_pi_tuple *pi))
523 {
524         struct nvme_ns *ns = req->rq_disk->private_data;
525         struct bio_integrity_payload *bip;
526         struct t10_pi_tuple *pi;
527         void *p, *pmap;
528         u32 i, nlb, ts, phys, virt;
529
530         if (!ns->pi_type || ns->pi_type == NVME_NS_DPS_PI_TYPE3)
531                 return;
532
533         bip = bio_integrity(req->bio);
534         if (!bip)
535                 return;
536
537         pmap = kmap_atomic(bip->bip_vec->bv_page) + bip->bip_vec->bv_offset;
538
539         p = pmap;
540         virt = bip_get_seed(bip);
541         phys = nvme_block_nr(ns, blk_rq_pos(req));
542         nlb = (blk_rq_bytes(req) >> ns->lba_shift);
543         ts = ns->disk->queue->integrity.tuple_size;
544
545         for (i = 0; i < nlb; i++, virt++, phys++) {
546                 pi = (struct t10_pi_tuple *)p;
547                 dif_swap(phys, virt, pi);
548                 p += ts;
549         }
550         kunmap_atomic(pmap);
551 }
552
553 static void nvme_init_integrity(struct nvme_ns *ns)
554 {
555         struct blk_integrity integrity;
556
557         switch (ns->pi_type) {
558         case NVME_NS_DPS_PI_TYPE3:
559                 integrity.profile = &t10_pi_type3_crc;
560                 break;
561         case NVME_NS_DPS_PI_TYPE1:
562         case NVME_NS_DPS_PI_TYPE2:
563                 integrity.profile = &t10_pi_type1_crc;
564                 break;
565         default:
566                 integrity.profile = NULL;
567                 break;
568         }
569         integrity.tuple_size = ns->ms;
570         blk_integrity_register(ns->disk, &integrity);
571         blk_queue_max_integrity_segments(ns->queue, 1);
572 }
573 #else /* CONFIG_BLK_DEV_INTEGRITY */
574 static void nvme_dif_remap(struct request *req,
575                         void (*dif_swap)(u32 p, u32 v, struct t10_pi_tuple *pi))
576 {
577 }
578 static void nvme_dif_prep(u32 p, u32 v, struct t10_pi_tuple *pi)
579 {
580 }
581 static void nvme_dif_complete(u32 p, u32 v, struct t10_pi_tuple *pi)
582 {
583 }
584 static void nvme_init_integrity(struct nvme_ns *ns)
585 {
586 }
587 #endif
588
589 static void req_completion(struct nvme_queue *nvmeq, void *ctx,
590                                                 struct nvme_completion *cqe)
591 {
592         struct nvme_iod *iod = ctx;
593         struct request *req = iod_get_private(iod);
594         struct nvme_cmd_info *cmd_rq = blk_mq_rq_to_pdu(req);
595         u16 status = le16_to_cpup(&cqe->status) >> 1;
596         int error = 0;
597
598         if (unlikely(status)) {
599                 if (!(status & NVME_SC_DNR || blk_noretry_request(req))
600                     && (jiffies - req->start_time) < req->timeout) {
601                         unsigned long flags;
602
603                         blk_mq_requeue_request(req);
604                         spin_lock_irqsave(req->q->queue_lock, flags);
605                         if (!blk_queue_stopped(req->q))
606                                 blk_mq_kick_requeue_list(req->q);
607                         spin_unlock_irqrestore(req->q->queue_lock, flags);
608                         return;
609                 }
610
611                 if (req->cmd_type == REQ_TYPE_DRV_PRIV) {
612                         if (cmd_rq->ctx == CMD_CTX_CANCELLED)
613                                 error = -EINTR;
614                         else
615                                 error = status;
616                 } else {
617                         error = nvme_error_status(status);
618                 }
619         }
620
621         if (req->cmd_type == REQ_TYPE_DRV_PRIV) {
622                 u32 result = le32_to_cpup(&cqe->result);
623                 req->special = (void *)(uintptr_t)result;
624         }
625
626         if (cmd_rq->aborted)
627                 dev_warn(nvmeq->dev->dev,
628                         "completing aborted command with status:%04x\n",
629                         error);
630
631         if (iod->nents) {
632                 dma_unmap_sg(nvmeq->dev->dev, iod->sg, iod->nents,
633                         rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
634                 if (blk_integrity_rq(req)) {
635                         if (!rq_data_dir(req))
636                                 nvme_dif_remap(req, nvme_dif_complete);
637                         dma_unmap_sg(nvmeq->dev->dev, iod->meta_sg, 1,
638                                 rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
639                 }
640         }
641         nvme_free_iod(nvmeq->dev, iod);
642
643         blk_mq_complete_request(req, error);
644 }
645
646 /* length is in bytes.  gfp flags indicates whether we may sleep. */
647 static int nvme_setup_prps(struct nvme_dev *dev, struct nvme_iod *iod,
648                 int total_len, gfp_t gfp)
649 {
650         struct dma_pool *pool;
651         int length = total_len;
652         struct scatterlist *sg = iod->sg;
653         int dma_len = sg_dma_len(sg);
654         u64 dma_addr = sg_dma_address(sg);
655         u32 page_size = dev->page_size;
656         int offset = dma_addr & (page_size - 1);
657         __le64 *prp_list;
658         __le64 **list = iod_list(iod);
659         dma_addr_t prp_dma;
660         int nprps, i;
661
662         length -= (page_size - offset);
663         if (length <= 0)
664                 return total_len;
665
666         dma_len -= (page_size - offset);
667         if (dma_len) {
668                 dma_addr += (page_size - offset);
669         } else {
670                 sg = sg_next(sg);
671                 dma_addr = sg_dma_address(sg);
672                 dma_len = sg_dma_len(sg);
673         }
674
675         if (length <= page_size) {
676                 iod->first_dma = dma_addr;
677                 return total_len;
678         }
679
680         nprps = DIV_ROUND_UP(length, page_size);
681         if (nprps <= (256 / 8)) {
682                 pool = dev->prp_small_pool;
683                 iod->npages = 0;
684         } else {
685                 pool = dev->prp_page_pool;
686                 iod->npages = 1;
687         }
688
689         prp_list = dma_pool_alloc(pool, gfp, &prp_dma);
690         if (!prp_list) {
691                 iod->first_dma = dma_addr;
692                 iod->npages = -1;
693                 return (total_len - length) + page_size;
694         }
695         list[0] = prp_list;
696         iod->first_dma = prp_dma;
697         i = 0;
698         for (;;) {
699                 if (i == page_size >> 3) {
700                         __le64 *old_prp_list = prp_list;
701                         prp_list = dma_pool_alloc(pool, gfp, &prp_dma);
702                         if (!prp_list)
703                                 return total_len - length;
704                         list[iod->npages++] = prp_list;
705                         prp_list[0] = old_prp_list[i - 1];
706                         old_prp_list[i - 1] = cpu_to_le64(prp_dma);
707                         i = 1;
708                 }
709                 prp_list[i++] = cpu_to_le64(dma_addr);
710                 dma_len -= page_size;
711                 dma_addr += page_size;
712                 length -= page_size;
713                 if (length <= 0)
714                         break;
715                 if (dma_len > 0)
716                         continue;
717                 BUG_ON(dma_len < 0);
718                 sg = sg_next(sg);
719                 dma_addr = sg_dma_address(sg);
720                 dma_len = sg_dma_len(sg);
721         }
722
723         return total_len;
724 }
725
726 static void nvme_submit_priv(struct nvme_queue *nvmeq, struct request *req,
727                 struct nvme_iod *iod)
728 {
729         struct nvme_command cmnd;
730
731         memcpy(&cmnd, req->cmd, sizeof(cmnd));
732         cmnd.rw.command_id = req->tag;
733         if (req->nr_phys_segments) {
734                 cmnd.rw.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
735                 cmnd.rw.prp2 = cpu_to_le64(iod->first_dma);
736         }
737
738         __nvme_submit_cmd(nvmeq, &cmnd);
739 }
740
741 /*
742  * We reuse the small pool to allocate the 16-byte range here as it is not
743  * worth having a special pool for these or additional cases to handle freeing
744  * the iod.
745  */
746 static void nvme_submit_discard(struct nvme_queue *nvmeq, struct nvme_ns *ns,
747                 struct request *req, struct nvme_iod *iod)
748 {
749         struct nvme_dsm_range *range =
750                                 (struct nvme_dsm_range *)iod_list(iod)[0];
751         struct nvme_command cmnd;
752
753         range->cattr = cpu_to_le32(0);
754         range->nlb = cpu_to_le32(blk_rq_bytes(req) >> ns->lba_shift);
755         range->slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
756
757         memset(&cmnd, 0, sizeof(cmnd));
758         cmnd.dsm.opcode = nvme_cmd_dsm;
759         cmnd.dsm.command_id = req->tag;
760         cmnd.dsm.nsid = cpu_to_le32(ns->ns_id);
761         cmnd.dsm.prp1 = cpu_to_le64(iod->first_dma);
762         cmnd.dsm.nr = 0;
763         cmnd.dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD);
764
765         __nvme_submit_cmd(nvmeq, &cmnd);
766 }
767
768 static void nvme_submit_flush(struct nvme_queue *nvmeq, struct nvme_ns *ns,
769                                                                 int cmdid)
770 {
771         struct nvme_command cmnd;
772
773         memset(&cmnd, 0, sizeof(cmnd));
774         cmnd.common.opcode = nvme_cmd_flush;
775         cmnd.common.command_id = cmdid;
776         cmnd.common.nsid = cpu_to_le32(ns->ns_id);
777
778         __nvme_submit_cmd(nvmeq, &cmnd);
779 }
780
781 static int nvme_submit_iod(struct nvme_queue *nvmeq, struct nvme_iod *iod,
782                                                         struct nvme_ns *ns)
783 {
784         struct request *req = iod_get_private(iod);
785         struct nvme_command cmnd;
786         u16 control = 0;
787         u32 dsmgmt = 0;
788
789         if (req->cmd_flags & REQ_FUA)
790                 control |= NVME_RW_FUA;
791         if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD))
792                 control |= NVME_RW_LR;
793
794         if (req->cmd_flags & REQ_RAHEAD)
795                 dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH;
796
797         memset(&cmnd, 0, sizeof(cmnd));
798         cmnd.rw.opcode = (rq_data_dir(req) ? nvme_cmd_write : nvme_cmd_read);
799         cmnd.rw.command_id = req->tag;
800         cmnd.rw.nsid = cpu_to_le32(ns->ns_id);
801         cmnd.rw.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
802         cmnd.rw.prp2 = cpu_to_le64(iod->first_dma);
803         cmnd.rw.slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
804         cmnd.rw.length = cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1);
805
806         if (ns->ms) {
807                 switch (ns->pi_type) {
808                 case NVME_NS_DPS_PI_TYPE3:
809                         control |= NVME_RW_PRINFO_PRCHK_GUARD;
810                         break;
811                 case NVME_NS_DPS_PI_TYPE1:
812                 case NVME_NS_DPS_PI_TYPE2:
813                         control |= NVME_RW_PRINFO_PRCHK_GUARD |
814                                         NVME_RW_PRINFO_PRCHK_REF;
815                         cmnd.rw.reftag = cpu_to_le32(
816                                         nvme_block_nr(ns, blk_rq_pos(req)));
817                         break;
818                 }
819                 if (blk_integrity_rq(req))
820                         cmnd.rw.metadata =
821                                 cpu_to_le64(sg_dma_address(iod->meta_sg));
822                 else
823                         control |= NVME_RW_PRINFO_PRACT;
824         }
825
826         cmnd.rw.control = cpu_to_le16(control);
827         cmnd.rw.dsmgmt = cpu_to_le32(dsmgmt);
828
829         __nvme_submit_cmd(nvmeq, &cmnd);
830
831         return 0;
832 }
833
834 /*
835  * NOTE: ns is NULL when called on the admin queue.
836  */
837 static int nvme_queue_rq(struct blk_mq_hw_ctx *hctx,
838                          const struct blk_mq_queue_data *bd)
839 {
840         struct nvme_ns *ns = hctx->queue->queuedata;
841         struct nvme_queue *nvmeq = hctx->driver_data;
842         struct nvme_dev *dev = nvmeq->dev;
843         struct request *req = bd->rq;
844         struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
845         struct nvme_iod *iod;
846         enum dma_data_direction dma_dir;
847
848         /*
849          * If formated with metadata, require the block layer provide a buffer
850          * unless this namespace is formated such that the metadata can be
851          * stripped/generated by the controller with PRACT=1.
852          */
853         if (ns && ns->ms && !blk_integrity_rq(req)) {
854                 if (!(ns->pi_type && ns->ms == 8) &&
855                                         req->cmd_type != REQ_TYPE_DRV_PRIV) {
856                         blk_mq_complete_request(req, -EFAULT);
857                         return BLK_MQ_RQ_QUEUE_OK;
858                 }
859         }
860
861         iod = nvme_alloc_iod(req, dev, GFP_ATOMIC);
862         if (!iod)
863                 return BLK_MQ_RQ_QUEUE_BUSY;
864
865         if (req->cmd_flags & REQ_DISCARD) {
866                 void *range;
867                 /*
868                  * We reuse the small pool to allocate the 16-byte range here
869                  * as it is not worth having a special pool for these or
870                  * additional cases to handle freeing the iod.
871                  */
872                 range = dma_pool_alloc(dev->prp_small_pool, GFP_ATOMIC,
873                                                 &iod->first_dma);
874                 if (!range)
875                         goto retry_cmd;
876                 iod_list(iod)[0] = (__le64 *)range;
877                 iod->npages = 0;
878         } else if (req->nr_phys_segments) {
879                 dma_dir = rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE;
880
881                 sg_init_table(iod->sg, req->nr_phys_segments);
882                 iod->nents = blk_rq_map_sg(req->q, req, iod->sg);
883                 if (!iod->nents)
884                         goto error_cmd;
885
886                 if (!dma_map_sg(nvmeq->q_dmadev, iod->sg, iod->nents, dma_dir))
887                         goto retry_cmd;
888
889                 if (blk_rq_bytes(req) !=
890                     nvme_setup_prps(dev, iod, blk_rq_bytes(req), GFP_ATOMIC)) {
891                         dma_unmap_sg(dev->dev, iod->sg, iod->nents, dma_dir);
892                         goto retry_cmd;
893                 }
894                 if (blk_integrity_rq(req)) {
895                         if (blk_rq_count_integrity_sg(req->q, req->bio) != 1)
896                                 goto error_cmd;
897
898                         sg_init_table(iod->meta_sg, 1);
899                         if (blk_rq_map_integrity_sg(
900                                         req->q, req->bio, iod->meta_sg) != 1)
901                                 goto error_cmd;
902
903                         if (rq_data_dir(req))
904                                 nvme_dif_remap(req, nvme_dif_prep);
905
906                         if (!dma_map_sg(nvmeq->q_dmadev, iod->meta_sg, 1, dma_dir))
907                                 goto error_cmd;
908                 }
909         }
910
911         nvme_set_info(cmd, iod, req_completion);
912         spin_lock_irq(&nvmeq->q_lock);
913         if (req->cmd_type == REQ_TYPE_DRV_PRIV)
914                 nvme_submit_priv(nvmeq, req, iod);
915         else if (req->cmd_flags & REQ_DISCARD)
916                 nvme_submit_discard(nvmeq, ns, req, iod);
917         else if (req->cmd_flags & REQ_FLUSH)
918                 nvme_submit_flush(nvmeq, ns, req->tag);
919         else
920                 nvme_submit_iod(nvmeq, iod, ns);
921
922         nvme_process_cq(nvmeq);
923         spin_unlock_irq(&nvmeq->q_lock);
924         return BLK_MQ_RQ_QUEUE_OK;
925
926  error_cmd:
927         nvme_free_iod(dev, iod);
928         return BLK_MQ_RQ_QUEUE_ERROR;
929  retry_cmd:
930         nvme_free_iod(dev, iod);
931         return BLK_MQ_RQ_QUEUE_BUSY;
932 }
933
934 static int nvme_process_cq(struct nvme_queue *nvmeq)
935 {
936         u16 head, phase;
937
938         head = nvmeq->cq_head;
939         phase = nvmeq->cq_phase;
940
941         for (;;) {
942                 void *ctx;
943                 nvme_completion_fn fn;
944                 struct nvme_completion cqe = nvmeq->cqes[head];
945                 if ((le16_to_cpu(cqe.status) & 1) != phase)
946                         break;
947                 nvmeq->sq_head = le16_to_cpu(cqe.sq_head);
948                 if (++head == nvmeq->q_depth) {
949                         head = 0;
950                         phase = !phase;
951                 }
952                 ctx = nvme_finish_cmd(nvmeq, cqe.command_id, &fn);
953                 fn(nvmeq, ctx, &cqe);
954         }
955
956         /* If the controller ignores the cq head doorbell and continuously
957          * writes to the queue, it is theoretically possible to wrap around
958          * the queue twice and mistakenly return IRQ_NONE.  Linux only
959          * requires that 0.1% of your interrupts are handled, so this isn't
960          * a big problem.
961          */
962         if (head == nvmeq->cq_head && phase == nvmeq->cq_phase)
963                 return 0;
964
965         writel(head, nvmeq->q_db + nvmeq->dev->db_stride);
966         nvmeq->cq_head = head;
967         nvmeq->cq_phase = phase;
968
969         nvmeq->cqe_seen = 1;
970         return 1;
971 }
972
973 static irqreturn_t nvme_irq(int irq, void *data)
974 {
975         irqreturn_t result;
976         struct nvme_queue *nvmeq = data;
977         spin_lock(&nvmeq->q_lock);
978         nvme_process_cq(nvmeq);
979         result = nvmeq->cqe_seen ? IRQ_HANDLED : IRQ_NONE;
980         nvmeq->cqe_seen = 0;
981         spin_unlock(&nvmeq->q_lock);
982         return result;
983 }
984
985 static irqreturn_t nvme_irq_check(int irq, void *data)
986 {
987         struct nvme_queue *nvmeq = data;
988         struct nvme_completion cqe = nvmeq->cqes[nvmeq->cq_head];
989         if ((le16_to_cpu(cqe.status) & 1) != nvmeq->cq_phase)
990                 return IRQ_NONE;
991         return IRQ_WAKE_THREAD;
992 }
993
994 /*
995  * Returns 0 on success.  If the result is negative, it's a Linux error code;
996  * if the result is positive, it's an NVM Express status code
997  */
998 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
999                 void *buffer, void __user *ubuffer, unsigned bufflen,
1000                 u32 *result, unsigned timeout)
1001 {
1002         bool write = cmd->common.opcode & 1;
1003         struct bio *bio = NULL;
1004         struct request *req;
1005         int ret;
1006
1007         req = blk_mq_alloc_request(q, write, GFP_KERNEL, false);
1008         if (IS_ERR(req))
1009                 return PTR_ERR(req);
1010
1011         req->cmd_type = REQ_TYPE_DRV_PRIV;
1012         req->cmd_flags |= REQ_FAILFAST_DRIVER;
1013         req->__data_len = 0;
1014         req->__sector = (sector_t) -1;
1015         req->bio = req->biotail = NULL;
1016
1017         req->timeout = timeout ? timeout : ADMIN_TIMEOUT;
1018
1019         req->cmd = (unsigned char *)cmd;
1020         req->cmd_len = sizeof(struct nvme_command);
1021         req->special = (void *)0;
1022
1023         if (buffer && bufflen) {
1024                 ret = blk_rq_map_kern(q, req, buffer, bufflen, __GFP_WAIT);
1025                 if (ret)
1026                         goto out;
1027         } else if (ubuffer && bufflen) {
1028                 ret = blk_rq_map_user(q, req, NULL, ubuffer, bufflen, __GFP_WAIT);
1029                 if (ret)
1030                         goto out;
1031                 bio = req->bio;
1032         }
1033
1034         blk_execute_rq(req->q, NULL, req, 0);
1035         if (bio)
1036                 blk_rq_unmap_user(bio);
1037         if (result)
1038                 *result = (u32)(uintptr_t)req->special;
1039         ret = req->errors;
1040  out:
1041         blk_mq_free_request(req);
1042         return ret;
1043 }
1044
1045 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
1046                 void *buffer, unsigned bufflen)
1047 {
1048         return __nvme_submit_sync_cmd(q, cmd, buffer, NULL, bufflen, NULL, 0);
1049 }
1050
1051 static int nvme_submit_async_admin_req(struct nvme_dev *dev)
1052 {
1053         struct nvme_queue *nvmeq = dev->queues[0];
1054         struct nvme_command c;
1055         struct nvme_cmd_info *cmd_info;
1056         struct request *req;
1057
1058         req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_ATOMIC, true);
1059         if (IS_ERR(req))
1060                 return PTR_ERR(req);
1061
1062         req->cmd_flags |= REQ_NO_TIMEOUT;
1063         cmd_info = blk_mq_rq_to_pdu(req);
1064         nvme_set_info(cmd_info, NULL, async_req_completion);
1065
1066         memset(&c, 0, sizeof(c));
1067         c.common.opcode = nvme_admin_async_event;
1068         c.common.command_id = req->tag;
1069
1070         blk_mq_free_request(req);
1071         __nvme_submit_cmd(nvmeq, &c);
1072         return 0;
1073 }
1074
1075 static int nvme_submit_admin_async_cmd(struct nvme_dev *dev,
1076                         struct nvme_command *cmd,
1077                         struct async_cmd_info *cmdinfo, unsigned timeout)
1078 {
1079         struct nvme_queue *nvmeq = dev->queues[0];
1080         struct request *req;
1081         struct nvme_cmd_info *cmd_rq;
1082
1083         req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_KERNEL, false);
1084         if (IS_ERR(req))
1085                 return PTR_ERR(req);
1086
1087         req->timeout = timeout;
1088         cmd_rq = blk_mq_rq_to_pdu(req);
1089         cmdinfo->req = req;
1090         nvme_set_info(cmd_rq, cmdinfo, async_completion);
1091         cmdinfo->status = -EINTR;
1092
1093         cmd->common.command_id = req->tag;
1094
1095         nvme_submit_cmd(nvmeq, cmd);
1096         return 0;
1097 }
1098
1099 static int adapter_delete_queue(struct nvme_dev *dev, u8 opcode, u16 id)
1100 {
1101         struct nvme_command c;
1102
1103         memset(&c, 0, sizeof(c));
1104         c.delete_queue.opcode = opcode;
1105         c.delete_queue.qid = cpu_to_le16(id);
1106
1107         return nvme_submit_sync_cmd(dev->admin_q, &c, NULL, 0);
1108 }
1109
1110 static int adapter_alloc_cq(struct nvme_dev *dev, u16 qid,
1111                                                 struct nvme_queue *nvmeq)
1112 {
1113         struct nvme_command c;
1114         int flags = NVME_QUEUE_PHYS_CONTIG | NVME_CQ_IRQ_ENABLED;
1115
1116         /*
1117          * Note: we (ab)use the fact the the prp fields survive if no data
1118          * is attached to the request.
1119          */
1120         memset(&c, 0, sizeof(c));
1121         c.create_cq.opcode = nvme_admin_create_cq;
1122         c.create_cq.prp1 = cpu_to_le64(nvmeq->cq_dma_addr);
1123         c.create_cq.cqid = cpu_to_le16(qid);
1124         c.create_cq.qsize = cpu_to_le16(nvmeq->q_depth - 1);
1125         c.create_cq.cq_flags = cpu_to_le16(flags);
1126         c.create_cq.irq_vector = cpu_to_le16(nvmeq->cq_vector);
1127
1128         return nvme_submit_sync_cmd(dev->admin_q, &c, NULL, 0);
1129 }
1130
1131 static int adapter_alloc_sq(struct nvme_dev *dev, u16 qid,
1132                                                 struct nvme_queue *nvmeq)
1133 {
1134         struct nvme_command c;
1135         int flags = NVME_QUEUE_PHYS_CONTIG | NVME_SQ_PRIO_MEDIUM;
1136
1137         /*
1138          * Note: we (ab)use the fact the the prp fields survive if no data
1139          * is attached to the request.
1140          */
1141         memset(&c, 0, sizeof(c));
1142         c.create_sq.opcode = nvme_admin_create_sq;
1143         c.create_sq.prp1 = cpu_to_le64(nvmeq->sq_dma_addr);
1144         c.create_sq.sqid = cpu_to_le16(qid);
1145         c.create_sq.qsize = cpu_to_le16(nvmeq->q_depth - 1);
1146         c.create_sq.sq_flags = cpu_to_le16(flags);
1147         c.create_sq.cqid = cpu_to_le16(qid);
1148
1149         return nvme_submit_sync_cmd(dev->admin_q, &c, NULL, 0);
1150 }
1151
1152 static int adapter_delete_cq(struct nvme_dev *dev, u16 cqid)
1153 {
1154         return adapter_delete_queue(dev, nvme_admin_delete_cq, cqid);
1155 }
1156
1157 static int adapter_delete_sq(struct nvme_dev *dev, u16 sqid)
1158 {
1159         return adapter_delete_queue(dev, nvme_admin_delete_sq, sqid);
1160 }
1161
1162 int nvme_identify_ctrl(struct nvme_dev *dev, struct nvme_id_ctrl **id)
1163 {
1164         struct nvme_command c = { };
1165         int error;
1166
1167         /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
1168         c.identify.opcode = nvme_admin_identify;
1169         c.identify.cns = cpu_to_le32(1);
1170
1171         *id = kmalloc(sizeof(struct nvme_id_ctrl), GFP_KERNEL);
1172         if (!*id)
1173                 return -ENOMEM;
1174
1175         error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
1176                         sizeof(struct nvme_id_ctrl));
1177         if (error)
1178                 kfree(*id);
1179         return error;
1180 }
1181
1182 int nvme_identify_ns(struct nvme_dev *dev, unsigned nsid,
1183                 struct nvme_id_ns **id)
1184 {
1185         struct nvme_command c = { };
1186         int error;
1187
1188         /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
1189         c.identify.opcode = nvme_admin_identify,
1190         c.identify.nsid = cpu_to_le32(nsid),
1191
1192         *id = kmalloc(sizeof(struct nvme_id_ns), GFP_KERNEL);
1193         if (!*id)
1194                 return -ENOMEM;
1195
1196         error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
1197                         sizeof(struct nvme_id_ns));
1198         if (error)
1199                 kfree(*id);
1200         return error;
1201 }
1202
1203 int nvme_get_features(struct nvme_dev *dev, unsigned fid, unsigned nsid,
1204                                         dma_addr_t dma_addr, u32 *result)
1205 {
1206         struct nvme_command c;
1207
1208         memset(&c, 0, sizeof(c));
1209         c.features.opcode = nvme_admin_get_features;
1210         c.features.nsid = cpu_to_le32(nsid);
1211         c.features.prp1 = cpu_to_le64(dma_addr);
1212         c.features.fid = cpu_to_le32(fid);
1213
1214         return __nvme_submit_sync_cmd(dev->admin_q, &c, NULL, NULL, 0,
1215                         result, 0);
1216 }
1217
1218 int nvme_set_features(struct nvme_dev *dev, unsigned fid, unsigned dword11,
1219                                         dma_addr_t dma_addr, u32 *result)
1220 {
1221         struct nvme_command c;
1222
1223         memset(&c, 0, sizeof(c));
1224         c.features.opcode = nvme_admin_set_features;
1225         c.features.prp1 = cpu_to_le64(dma_addr);
1226         c.features.fid = cpu_to_le32(fid);
1227         c.features.dword11 = cpu_to_le32(dword11);
1228
1229         return __nvme_submit_sync_cmd(dev->admin_q, &c, NULL, NULL, 0,
1230                         result, 0);
1231 }
1232
1233 int nvme_get_log_page(struct nvme_dev *dev, struct nvme_smart_log **log)
1234 {
1235         struct nvme_command c = { };
1236         int error;
1237
1238         c.common.opcode = nvme_admin_get_log_page,
1239         c.common.nsid = cpu_to_le32(0xFFFFFFFF),
1240         c.common.cdw10[0] = cpu_to_le32(
1241                         (((sizeof(struct nvme_smart_log) / 4) - 1) << 16) |
1242                          NVME_LOG_SMART),
1243
1244         *log = kmalloc(sizeof(struct nvme_smart_log), GFP_KERNEL);
1245         if (!*log)
1246                 return -ENOMEM;
1247
1248         error = nvme_submit_sync_cmd(dev->admin_q, &c, *log,
1249                         sizeof(struct nvme_smart_log));
1250         if (error)
1251                 kfree(*log);
1252         return error;
1253 }
1254
1255 /**
1256  * nvme_abort_req - Attempt aborting a request
1257  *
1258  * Schedule controller reset if the command was already aborted once before and
1259  * still hasn't been returned to the driver, or if this is the admin queue.
1260  */
1261 static void nvme_abort_req(struct request *req)
1262 {
1263         struct nvme_cmd_info *cmd_rq = blk_mq_rq_to_pdu(req);
1264         struct nvme_queue *nvmeq = cmd_rq->nvmeq;
1265         struct nvme_dev *dev = nvmeq->dev;
1266         struct request *abort_req;
1267         struct nvme_cmd_info *abort_cmd;
1268         struct nvme_command cmd;
1269
1270         if (!nvmeq->qid || cmd_rq->aborted) {
1271                 spin_lock(&dev_list_lock);
1272                 if (!__nvme_reset(dev)) {
1273                         dev_warn(dev->dev,
1274                                  "I/O %d QID %d timeout, reset controller\n",
1275                                  req->tag, nvmeq->qid);
1276                 }
1277                 spin_unlock(&dev_list_lock);
1278                 return;
1279         }
1280
1281         if (!dev->abort_limit)
1282                 return;
1283
1284         abort_req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_ATOMIC,
1285                                                                         false);
1286         if (IS_ERR(abort_req))
1287                 return;
1288
1289         abort_cmd = blk_mq_rq_to_pdu(abort_req);
1290         nvme_set_info(abort_cmd, abort_req, abort_completion);
1291
1292         memset(&cmd, 0, sizeof(cmd));
1293         cmd.abort.opcode = nvme_admin_abort_cmd;
1294         cmd.abort.cid = req->tag;
1295         cmd.abort.sqid = cpu_to_le16(nvmeq->qid);
1296         cmd.abort.command_id = abort_req->tag;
1297
1298         --dev->abort_limit;
1299         cmd_rq->aborted = 1;
1300
1301         dev_warn(nvmeq->q_dmadev, "Aborting I/O %d QID %d\n", req->tag,
1302                                                         nvmeq->qid);
1303         nvme_submit_cmd(dev->queues[0], &cmd);
1304 }
1305
1306 static void nvme_cancel_queue_ios(struct request *req, void *data, bool reserved)
1307 {
1308         struct nvme_queue *nvmeq = data;
1309         void *ctx;
1310         nvme_completion_fn fn;
1311         struct nvme_cmd_info *cmd;
1312         struct nvme_completion cqe;
1313
1314         if (!blk_mq_request_started(req))
1315                 return;
1316
1317         cmd = blk_mq_rq_to_pdu(req);
1318
1319         if (cmd->ctx == CMD_CTX_CANCELLED)
1320                 return;
1321
1322         if (blk_queue_dying(req->q))
1323                 cqe.status = cpu_to_le16((NVME_SC_ABORT_REQ | NVME_SC_DNR) << 1);
1324         else
1325                 cqe.status = cpu_to_le16(NVME_SC_ABORT_REQ << 1);
1326
1327
1328         dev_warn(nvmeq->q_dmadev, "Cancelling I/O %d QID %d\n",
1329                                                 req->tag, nvmeq->qid);
1330         ctx = cancel_cmd_info(cmd, &fn);
1331         fn(nvmeq, ctx, &cqe);
1332 }
1333
1334 static enum blk_eh_timer_return nvme_timeout(struct request *req, bool reserved)
1335 {
1336         struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
1337         struct nvme_queue *nvmeq = cmd->nvmeq;
1338
1339         dev_warn(nvmeq->q_dmadev, "Timeout I/O %d QID %d\n", req->tag,
1340                                                         nvmeq->qid);
1341         spin_lock_irq(&nvmeq->q_lock);
1342         nvme_abort_req(req);
1343         spin_unlock_irq(&nvmeq->q_lock);
1344
1345         /*
1346          * The aborted req will be completed on receiving the abort req.
1347          * We enable the timer again. If hit twice, it'll cause a device reset,
1348          * as the device then is in a faulty state.
1349          */
1350         return BLK_EH_RESET_TIMER;
1351 }
1352
1353 static void nvme_free_queue(struct nvme_queue *nvmeq)
1354 {
1355         dma_free_coherent(nvmeq->q_dmadev, CQ_SIZE(nvmeq->q_depth),
1356                                 (void *)nvmeq->cqes, nvmeq->cq_dma_addr);
1357         if (nvmeq->sq_cmds)
1358                 dma_free_coherent(nvmeq->q_dmadev, SQ_SIZE(nvmeq->q_depth),
1359                                         nvmeq->sq_cmds, nvmeq->sq_dma_addr);
1360         kfree(nvmeq);
1361 }
1362
1363 static void nvme_free_queues(struct nvme_dev *dev, int lowest)
1364 {
1365         int i;
1366
1367         for (i = dev->queue_count - 1; i >= lowest; i--) {
1368                 struct nvme_queue *nvmeq = dev->queues[i];
1369                 dev->queue_count--;
1370                 dev->queues[i] = NULL;
1371                 nvme_free_queue(nvmeq);
1372         }
1373 }
1374
1375 /**
1376  * nvme_suspend_queue - put queue into suspended state
1377  * @nvmeq - queue to suspend
1378  */
1379 static int nvme_suspend_queue(struct nvme_queue *nvmeq)
1380 {
1381         int vector;
1382
1383         spin_lock_irq(&nvmeq->q_lock);
1384         if (nvmeq->cq_vector == -1) {
1385                 spin_unlock_irq(&nvmeq->q_lock);
1386                 return 1;
1387         }
1388         vector = nvmeq->dev->entry[nvmeq->cq_vector].vector;
1389         nvmeq->dev->online_queues--;
1390         nvmeq->cq_vector = -1;
1391         spin_unlock_irq(&nvmeq->q_lock);
1392
1393         if (!nvmeq->qid && nvmeq->dev->admin_q)
1394                 blk_mq_freeze_queue_start(nvmeq->dev->admin_q);
1395
1396         irq_set_affinity_hint(vector, NULL);
1397         free_irq(vector, nvmeq);
1398
1399         return 0;
1400 }
1401
1402 static void nvme_clear_queue(struct nvme_queue *nvmeq)
1403 {
1404         spin_lock_irq(&nvmeq->q_lock);
1405         if (nvmeq->tags && *nvmeq->tags)
1406                 blk_mq_all_tag_busy_iter(*nvmeq->tags, nvme_cancel_queue_ios, nvmeq);
1407         spin_unlock_irq(&nvmeq->q_lock);
1408 }
1409
1410 static void nvme_disable_queue(struct nvme_dev *dev, int qid)
1411 {
1412         struct nvme_queue *nvmeq = dev->queues[qid];
1413
1414         if (!nvmeq)
1415                 return;
1416         if (nvme_suspend_queue(nvmeq))
1417                 return;
1418
1419         /* Don't tell the adapter to delete the admin queue.
1420          * Don't tell a removed adapter to delete IO queues. */
1421         if (qid && readl(&dev->bar->csts) != -1) {
1422                 adapter_delete_sq(dev, qid);
1423                 adapter_delete_cq(dev, qid);
1424         }
1425
1426         spin_lock_irq(&nvmeq->q_lock);
1427         nvme_process_cq(nvmeq);
1428         spin_unlock_irq(&nvmeq->q_lock);
1429 }
1430
1431 static int nvme_cmb_qdepth(struct nvme_dev *dev, int nr_io_queues,
1432                                 int entry_size)
1433 {
1434         int q_depth = dev->q_depth;
1435         unsigned q_size_aligned = roundup(q_depth * entry_size, dev->page_size);
1436
1437         if (q_size_aligned * nr_io_queues > dev->cmb_size) {
1438                 u64 mem_per_q = div_u64(dev->cmb_size, nr_io_queues);
1439                 mem_per_q = round_down(mem_per_q, dev->page_size);
1440                 q_depth = div_u64(mem_per_q, entry_size);
1441
1442                 /*
1443                  * Ensure the reduced q_depth is above some threshold where it
1444                  * would be better to map queues in system memory with the
1445                  * original depth
1446                  */
1447                 if (q_depth < 64)
1448                         return -ENOMEM;
1449         }
1450
1451         return q_depth;
1452 }
1453
1454 static int nvme_alloc_sq_cmds(struct nvme_dev *dev, struct nvme_queue *nvmeq,
1455                                 int qid, int depth)
1456 {
1457         if (qid && dev->cmb && use_cmb_sqes && NVME_CMB_SQS(dev->cmbsz)) {
1458                 unsigned offset = (qid - 1) *
1459                                         roundup(SQ_SIZE(depth), dev->page_size);
1460                 nvmeq->sq_dma_addr = dev->cmb_dma_addr + offset;
1461                 nvmeq->sq_cmds_io = dev->cmb + offset;
1462         } else {
1463                 nvmeq->sq_cmds = dma_alloc_coherent(dev->dev, SQ_SIZE(depth),
1464                                         &nvmeq->sq_dma_addr, GFP_KERNEL);
1465                 if (!nvmeq->sq_cmds)
1466                         return -ENOMEM;
1467         }
1468
1469         return 0;
1470 }
1471
1472 static struct nvme_queue *nvme_alloc_queue(struct nvme_dev *dev, int qid,
1473                                                         int depth)
1474 {
1475         struct nvme_queue *nvmeq = kzalloc(sizeof(*nvmeq), GFP_KERNEL);
1476         if (!nvmeq)
1477                 return NULL;
1478
1479         nvmeq->cqes = dma_zalloc_coherent(dev->dev, CQ_SIZE(depth),
1480                                           &nvmeq->cq_dma_addr, GFP_KERNEL);
1481         if (!nvmeq->cqes)
1482                 goto free_nvmeq;
1483
1484         if (nvme_alloc_sq_cmds(dev, nvmeq, qid, depth))
1485                 goto free_cqdma;
1486
1487         nvmeq->q_dmadev = dev->dev;
1488         nvmeq->dev = dev;
1489         snprintf(nvmeq->irqname, sizeof(nvmeq->irqname), "nvme%dq%d",
1490                         dev->instance, qid);
1491         spin_lock_init(&nvmeq->q_lock);
1492         nvmeq->cq_head = 0;
1493         nvmeq->cq_phase = 1;
1494         nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride];
1495         nvmeq->q_depth = depth;
1496         nvmeq->qid = qid;
1497         nvmeq->cq_vector = -1;
1498         dev->queues[qid] = nvmeq;
1499
1500         /* make sure queue descriptor is set before queue count, for kthread */
1501         mb();
1502         dev->queue_count++;
1503
1504         return nvmeq;
1505
1506  free_cqdma:
1507         dma_free_coherent(dev->dev, CQ_SIZE(depth), (void *)nvmeq->cqes,
1508                                                         nvmeq->cq_dma_addr);
1509  free_nvmeq:
1510         kfree(nvmeq);
1511         return NULL;
1512 }
1513
1514 static int queue_request_irq(struct nvme_dev *dev, struct nvme_queue *nvmeq,
1515                                                         const char *name)
1516 {
1517         if (use_threaded_interrupts)
1518                 return request_threaded_irq(dev->entry[nvmeq->cq_vector].vector,
1519                                         nvme_irq_check, nvme_irq, IRQF_SHARED,
1520                                         name, nvmeq);
1521         return request_irq(dev->entry[nvmeq->cq_vector].vector, nvme_irq,
1522                                 IRQF_SHARED, name, nvmeq);
1523 }
1524
1525 static void nvme_init_queue(struct nvme_queue *nvmeq, u16 qid)
1526 {
1527         struct nvme_dev *dev = nvmeq->dev;
1528
1529         spin_lock_irq(&nvmeq->q_lock);
1530         nvmeq->sq_tail = 0;
1531         nvmeq->cq_head = 0;
1532         nvmeq->cq_phase = 1;
1533         nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride];
1534         memset((void *)nvmeq->cqes, 0, CQ_SIZE(nvmeq->q_depth));
1535         dev->online_queues++;
1536         spin_unlock_irq(&nvmeq->q_lock);
1537 }
1538
1539 static int nvme_create_queue(struct nvme_queue *nvmeq, int qid)
1540 {
1541         struct nvme_dev *dev = nvmeq->dev;
1542         int result;
1543
1544         nvmeq->cq_vector = qid - 1;
1545         result = adapter_alloc_cq(dev, qid, nvmeq);
1546         if (result < 0)
1547                 return result;
1548
1549         result = adapter_alloc_sq(dev, qid, nvmeq);
1550         if (result < 0)
1551                 goto release_cq;
1552
1553         result = queue_request_irq(dev, nvmeq, nvmeq->irqname);
1554         if (result < 0)
1555                 goto release_sq;
1556
1557         nvme_init_queue(nvmeq, qid);
1558         return result;
1559
1560  release_sq:
1561         adapter_delete_sq(dev, qid);
1562  release_cq:
1563         adapter_delete_cq(dev, qid);
1564         return result;
1565 }
1566
1567 static int nvme_wait_ready(struct nvme_dev *dev, u64 cap, bool enabled)
1568 {
1569         unsigned long timeout;
1570         u32 bit = enabled ? NVME_CSTS_RDY : 0;
1571
1572         timeout = ((NVME_CAP_TIMEOUT(cap) + 1) * HZ / 2) + jiffies;
1573
1574         while ((readl(&dev->bar->csts) & NVME_CSTS_RDY) != bit) {
1575                 msleep(100);
1576                 if (fatal_signal_pending(current))
1577                         return -EINTR;
1578                 if (time_after(jiffies, timeout)) {
1579                         dev_err(dev->dev,
1580                                 "Device not ready; aborting %s\n", enabled ?
1581                                                 "initialisation" : "reset");
1582                         return -ENODEV;
1583                 }
1584         }
1585
1586         return 0;
1587 }
1588
1589 /*
1590  * If the device has been passed off to us in an enabled state, just clear
1591  * the enabled bit.  The spec says we should set the 'shutdown notification
1592  * bits', but doing so may cause the device to complete commands to the
1593  * admin queue ... and we don't know what memory that might be pointing at!
1594  */
1595 static int nvme_disable_ctrl(struct nvme_dev *dev, u64 cap)
1596 {
1597         dev->ctrl_config &= ~NVME_CC_SHN_MASK;
1598         dev->ctrl_config &= ~NVME_CC_ENABLE;
1599         writel(dev->ctrl_config, &dev->bar->cc);
1600
1601         return nvme_wait_ready(dev, cap, false);
1602 }
1603
1604 static int nvme_enable_ctrl(struct nvme_dev *dev, u64 cap)
1605 {
1606         dev->ctrl_config &= ~NVME_CC_SHN_MASK;
1607         dev->ctrl_config |= NVME_CC_ENABLE;
1608         writel(dev->ctrl_config, &dev->bar->cc);
1609
1610         return nvme_wait_ready(dev, cap, true);
1611 }
1612
1613 static int nvme_shutdown_ctrl(struct nvme_dev *dev)
1614 {
1615         unsigned long timeout;
1616
1617         dev->ctrl_config &= ~NVME_CC_SHN_MASK;
1618         dev->ctrl_config |= NVME_CC_SHN_NORMAL;
1619
1620         writel(dev->ctrl_config, &dev->bar->cc);
1621
1622         timeout = SHUTDOWN_TIMEOUT + jiffies;
1623         while ((readl(&dev->bar->csts) & NVME_CSTS_SHST_MASK) !=
1624                                                         NVME_CSTS_SHST_CMPLT) {
1625                 msleep(100);
1626                 if (fatal_signal_pending(current))
1627                         return -EINTR;
1628                 if (time_after(jiffies, timeout)) {
1629                         dev_err(dev->dev,
1630                                 "Device shutdown incomplete; abort shutdown\n");
1631                         return -ENODEV;
1632                 }
1633         }
1634
1635         return 0;
1636 }
1637
1638 static struct blk_mq_ops nvme_mq_admin_ops = {
1639         .queue_rq       = nvme_queue_rq,
1640         .map_queue      = blk_mq_map_queue,
1641         .init_hctx      = nvme_admin_init_hctx,
1642         .exit_hctx      = nvme_admin_exit_hctx,
1643         .init_request   = nvme_admin_init_request,
1644         .timeout        = nvme_timeout,
1645 };
1646
1647 static struct blk_mq_ops nvme_mq_ops = {
1648         .queue_rq       = nvme_queue_rq,
1649         .map_queue      = blk_mq_map_queue,
1650         .init_hctx      = nvme_init_hctx,
1651         .init_request   = nvme_init_request,
1652         .timeout        = nvme_timeout,
1653 };
1654
1655 static void nvme_dev_remove_admin(struct nvme_dev *dev)
1656 {
1657         if (dev->admin_q && !blk_queue_dying(dev->admin_q)) {
1658                 blk_cleanup_queue(dev->admin_q);
1659                 blk_mq_free_tag_set(&dev->admin_tagset);
1660         }
1661 }
1662
1663 static int nvme_alloc_admin_tags(struct nvme_dev *dev)
1664 {
1665         if (!dev->admin_q) {
1666                 dev->admin_tagset.ops = &nvme_mq_admin_ops;
1667                 dev->admin_tagset.nr_hw_queues = 1;
1668                 dev->admin_tagset.queue_depth = NVME_AQ_DEPTH - 1;
1669                 dev->admin_tagset.reserved_tags = 1;
1670                 dev->admin_tagset.timeout = ADMIN_TIMEOUT;
1671                 dev->admin_tagset.numa_node = dev_to_node(dev->dev);
1672                 dev->admin_tagset.cmd_size = nvme_cmd_size(dev);
1673                 dev->admin_tagset.driver_data = dev;
1674
1675                 if (blk_mq_alloc_tag_set(&dev->admin_tagset))
1676                         return -ENOMEM;
1677
1678                 dev->admin_q = blk_mq_init_queue(&dev->admin_tagset);
1679                 if (IS_ERR(dev->admin_q)) {
1680                         blk_mq_free_tag_set(&dev->admin_tagset);
1681                         return -ENOMEM;
1682                 }
1683                 if (!blk_get_queue(dev->admin_q)) {
1684                         nvme_dev_remove_admin(dev);
1685                         dev->admin_q = NULL;
1686                         return -ENODEV;
1687                 }
1688         } else
1689                 blk_mq_unfreeze_queue(dev->admin_q);
1690
1691         return 0;
1692 }
1693
1694 static int nvme_configure_admin_queue(struct nvme_dev *dev)
1695 {
1696         int result;
1697         u32 aqa;
1698         u64 cap = readq(&dev->bar->cap);
1699         struct nvme_queue *nvmeq;
1700         unsigned page_shift = PAGE_SHIFT;
1701         unsigned dev_page_min = NVME_CAP_MPSMIN(cap) + 12;
1702         unsigned dev_page_max = NVME_CAP_MPSMAX(cap) + 12;
1703
1704         if (page_shift < dev_page_min) {
1705                 dev_err(dev->dev,
1706                                 "Minimum device page size (%u) too large for "
1707                                 "host (%u)\n", 1 << dev_page_min,
1708                                 1 << page_shift);
1709                 return -ENODEV;
1710         }
1711         if (page_shift > dev_page_max) {
1712                 dev_info(dev->dev,
1713                                 "Device maximum page size (%u) smaller than "
1714                                 "host (%u); enabling work-around\n",
1715                                 1 << dev_page_max, 1 << page_shift);
1716                 page_shift = dev_page_max;
1717         }
1718
1719         dev->subsystem = readl(&dev->bar->vs) >= NVME_VS(1, 1) ?
1720                                                 NVME_CAP_NSSRC(cap) : 0;
1721
1722         if (dev->subsystem && (readl(&dev->bar->csts) & NVME_CSTS_NSSRO))
1723                 writel(NVME_CSTS_NSSRO, &dev->bar->csts);
1724
1725         result = nvme_disable_ctrl(dev, cap);
1726         if (result < 0)
1727                 return result;
1728
1729         nvmeq = dev->queues[0];
1730         if (!nvmeq) {
1731                 nvmeq = nvme_alloc_queue(dev, 0, NVME_AQ_DEPTH);
1732                 if (!nvmeq)
1733                         return -ENOMEM;
1734         }
1735
1736         aqa = nvmeq->q_depth - 1;
1737         aqa |= aqa << 16;
1738
1739         dev->page_size = 1 << page_shift;
1740
1741         dev->ctrl_config = NVME_CC_CSS_NVM;
1742         dev->ctrl_config |= (page_shift - 12) << NVME_CC_MPS_SHIFT;
1743         dev->ctrl_config |= NVME_CC_ARB_RR | NVME_CC_SHN_NONE;
1744         dev->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES;
1745
1746         writel(aqa, &dev->bar->aqa);
1747         writeq(nvmeq->sq_dma_addr, &dev->bar->asq);
1748         writeq(nvmeq->cq_dma_addr, &dev->bar->acq);
1749
1750         result = nvme_enable_ctrl(dev, cap);
1751         if (result)
1752                 goto free_nvmeq;
1753
1754         nvmeq->cq_vector = 0;
1755         result = queue_request_irq(dev, nvmeq, nvmeq->irqname);
1756         if (result) {
1757                 nvmeq->cq_vector = -1;
1758                 goto free_nvmeq;
1759         }
1760
1761         return result;
1762
1763  free_nvmeq:
1764         nvme_free_queues(dev, 0);
1765         return result;
1766 }
1767
1768 static int nvme_submit_io(struct nvme_ns *ns, struct nvme_user_io __user *uio)
1769 {
1770         struct nvme_dev *dev = ns->dev;
1771         struct nvme_user_io io;
1772         struct nvme_command c;
1773         unsigned length, meta_len;
1774         int status, write;
1775         dma_addr_t meta_dma = 0;
1776         void *meta = NULL;
1777         void __user *metadata;
1778
1779         if (copy_from_user(&io, uio, sizeof(io)))
1780                 return -EFAULT;
1781
1782         switch (io.opcode) {
1783         case nvme_cmd_write:
1784         case nvme_cmd_read:
1785         case nvme_cmd_compare:
1786                 break;
1787         default:
1788                 return -EINVAL;
1789         }
1790
1791         length = (io.nblocks + 1) << ns->lba_shift;
1792         meta_len = (io.nblocks + 1) * ns->ms;
1793         metadata = (void __user *)(uintptr_t)io.metadata;
1794         write = io.opcode & 1;
1795
1796         if (ns->ext) {
1797                 length += meta_len;
1798                 meta_len = 0;
1799         }
1800         if (meta_len) {
1801                 if (((io.metadata & 3) || !io.metadata) && !ns->ext)
1802                         return -EINVAL;
1803
1804                 meta = dma_alloc_coherent(dev->dev, meta_len,
1805                                                 &meta_dma, GFP_KERNEL);
1806
1807                 if (!meta) {
1808                         status = -ENOMEM;
1809                         goto unmap;
1810                 }
1811                 if (write) {
1812                         if (copy_from_user(meta, metadata, meta_len)) {
1813                                 status = -EFAULT;
1814                                 goto unmap;
1815                         }
1816                 }
1817         }
1818
1819         memset(&c, 0, sizeof(c));
1820         c.rw.opcode = io.opcode;
1821         c.rw.flags = io.flags;
1822         c.rw.nsid = cpu_to_le32(ns->ns_id);
1823         c.rw.slba = cpu_to_le64(io.slba);
1824         c.rw.length = cpu_to_le16(io.nblocks);
1825         c.rw.control = cpu_to_le16(io.control);
1826         c.rw.dsmgmt = cpu_to_le32(io.dsmgmt);
1827         c.rw.reftag = cpu_to_le32(io.reftag);
1828         c.rw.apptag = cpu_to_le16(io.apptag);
1829         c.rw.appmask = cpu_to_le16(io.appmask);
1830         c.rw.metadata = cpu_to_le64(meta_dma);
1831
1832         status = __nvme_submit_sync_cmd(ns->queue, &c, NULL,
1833                         (void __user *)(uintptr_t)io.addr, length, NULL, 0);
1834  unmap:
1835         if (meta) {
1836                 if (status == NVME_SC_SUCCESS && !write) {
1837                         if (copy_to_user(metadata, meta, meta_len))
1838                                 status = -EFAULT;
1839                 }
1840                 dma_free_coherent(dev->dev, meta_len, meta, meta_dma);
1841         }
1842         return status;
1843 }
1844
1845 static int nvme_user_cmd(struct nvme_dev *dev, struct nvme_ns *ns,
1846                         struct nvme_passthru_cmd __user *ucmd)
1847 {
1848         struct nvme_passthru_cmd cmd;
1849         struct nvme_command c;
1850         unsigned timeout = 0;
1851         int status;
1852
1853         if (!capable(CAP_SYS_ADMIN))
1854                 return -EACCES;
1855         if (copy_from_user(&cmd, ucmd, sizeof(cmd)))
1856                 return -EFAULT;
1857
1858         memset(&c, 0, sizeof(c));
1859         c.common.opcode = cmd.opcode;
1860         c.common.flags = cmd.flags;
1861         c.common.nsid = cpu_to_le32(cmd.nsid);
1862         c.common.cdw2[0] = cpu_to_le32(cmd.cdw2);
1863         c.common.cdw2[1] = cpu_to_le32(cmd.cdw3);
1864         c.common.cdw10[0] = cpu_to_le32(cmd.cdw10);
1865         c.common.cdw10[1] = cpu_to_le32(cmd.cdw11);
1866         c.common.cdw10[2] = cpu_to_le32(cmd.cdw12);
1867         c.common.cdw10[3] = cpu_to_le32(cmd.cdw13);
1868         c.common.cdw10[4] = cpu_to_le32(cmd.cdw14);
1869         c.common.cdw10[5] = cpu_to_le32(cmd.cdw15);
1870
1871         if (cmd.timeout_ms)
1872                 timeout = msecs_to_jiffies(cmd.timeout_ms);
1873
1874         status = __nvme_submit_sync_cmd(ns ? ns->queue : dev->admin_q, &c,
1875                         NULL, (void __user *)(uintptr_t)cmd.addr, cmd.data_len,
1876                         &cmd.result, timeout);
1877         if (status >= 0) {
1878                 if (put_user(cmd.result, &ucmd->result))
1879                         return -EFAULT;
1880         }
1881
1882         return status;
1883 }
1884
1885 static int nvme_subsys_reset(struct nvme_dev *dev)
1886 {
1887         if (!dev->subsystem)
1888                 return -ENOTTY;
1889
1890         writel(0x4E564D65, &dev->bar->nssr); /* "NVMe" */
1891         return 0;
1892 }
1893
1894 static int nvme_ioctl(struct block_device *bdev, fmode_t mode, unsigned int cmd,
1895                                                         unsigned long arg)
1896 {
1897         struct nvme_ns *ns = bdev->bd_disk->private_data;
1898
1899         switch (cmd) {
1900         case NVME_IOCTL_ID:
1901                 force_successful_syscall_return();
1902                 return ns->ns_id;
1903         case NVME_IOCTL_ADMIN_CMD:
1904                 return nvme_user_cmd(ns->dev, NULL, (void __user *)arg);
1905         case NVME_IOCTL_IO_CMD:
1906                 return nvme_user_cmd(ns->dev, ns, (void __user *)arg);
1907         case NVME_IOCTL_SUBMIT_IO:
1908                 return nvme_submit_io(ns, (void __user *)arg);
1909         case SG_GET_VERSION_NUM:
1910                 return nvme_sg_get_version_num((void __user *)arg);
1911         case SG_IO:
1912                 return nvme_sg_io(ns, (void __user *)arg);
1913         default:
1914                 return -ENOTTY;
1915         }
1916 }
1917
1918 #ifdef CONFIG_COMPAT
1919 static int nvme_compat_ioctl(struct block_device *bdev, fmode_t mode,
1920                                         unsigned int cmd, unsigned long arg)
1921 {
1922         switch (cmd) {
1923         case SG_IO:
1924                 return -ENOIOCTLCMD;
1925         }
1926         return nvme_ioctl(bdev, mode, cmd, arg);
1927 }
1928 #else
1929 #define nvme_compat_ioctl       NULL
1930 #endif
1931
1932 static void nvme_free_dev(struct kref *kref);
1933 static void nvme_free_ns(struct kref *kref)
1934 {
1935         struct nvme_ns *ns = container_of(kref, struct nvme_ns, kref);
1936
1937         if (ns->type == NVME_NS_LIGHTNVM)
1938                 nvme_nvm_unregister(ns->queue, ns->disk->disk_name);
1939
1940         spin_lock(&dev_list_lock);
1941         ns->disk->private_data = NULL;
1942         spin_unlock(&dev_list_lock);
1943
1944         kref_put(&ns->dev->kref, nvme_free_dev);
1945         put_disk(ns->disk);
1946         kfree(ns);
1947 }
1948
1949 static int nvme_open(struct block_device *bdev, fmode_t mode)
1950 {
1951         int ret = 0;
1952         struct nvme_ns *ns;
1953
1954         spin_lock(&dev_list_lock);
1955         ns = bdev->bd_disk->private_data;
1956         if (!ns)
1957                 ret = -ENXIO;
1958         else if (!kref_get_unless_zero(&ns->kref))
1959                 ret = -ENXIO;
1960         spin_unlock(&dev_list_lock);
1961
1962         return ret;
1963 }
1964
1965 static void nvme_release(struct gendisk *disk, fmode_t mode)
1966 {
1967         struct nvme_ns *ns = disk->private_data;
1968         kref_put(&ns->kref, nvme_free_ns);
1969 }
1970
1971 static int nvme_getgeo(struct block_device *bd, struct hd_geometry *geo)
1972 {
1973         /* some standard values */
1974         geo->heads = 1 << 6;
1975         geo->sectors = 1 << 5;
1976         geo->cylinders = get_capacity(bd->bd_disk) >> 11;
1977         return 0;
1978 }
1979
1980 static void nvme_config_discard(struct nvme_ns *ns)
1981 {
1982         u32 logical_block_size = queue_logical_block_size(ns->queue);
1983         ns->queue->limits.discard_zeroes_data = 0;
1984         ns->queue->limits.discard_alignment = logical_block_size;
1985         ns->queue->limits.discard_granularity = logical_block_size;
1986         blk_queue_max_discard_sectors(ns->queue, 0xffffffff);
1987         queue_flag_set_unlocked(QUEUE_FLAG_DISCARD, ns->queue);
1988 }
1989
1990 static int nvme_revalidate_disk(struct gendisk *disk)
1991 {
1992         struct nvme_ns *ns = disk->private_data;
1993         struct nvme_dev *dev = ns->dev;
1994         struct nvme_id_ns *id;
1995         u8 lbaf, pi_type;
1996         u16 old_ms;
1997         unsigned short bs;
1998
1999         if (nvme_identify_ns(dev, ns->ns_id, &id)) {
2000                 dev_warn(dev->dev, "%s: Identify failure nvme%dn%d\n", __func__,
2001                                                 dev->instance, ns->ns_id);
2002                 return -ENODEV;
2003         }
2004         if (id->ncap == 0) {
2005                 kfree(id);
2006                 return -ENODEV;
2007         }
2008
2009         if (nvme_nvm_ns_supported(ns, id) && ns->type != NVME_NS_LIGHTNVM) {
2010                 if (nvme_nvm_register(ns->queue, disk->disk_name)) {
2011                         dev_warn(dev->dev,
2012                                 "%s: LightNVM init failure\n", __func__);
2013                         kfree(id);
2014                         return -ENODEV;
2015                 }
2016                 ns->type = NVME_NS_LIGHTNVM;
2017         }
2018
2019         old_ms = ns->ms;
2020         lbaf = id->flbas & NVME_NS_FLBAS_LBA_MASK;
2021         ns->lba_shift = id->lbaf[lbaf].ds;
2022         ns->ms = le16_to_cpu(id->lbaf[lbaf].ms);
2023         ns->ext = ns->ms && (id->flbas & NVME_NS_FLBAS_META_EXT);
2024
2025         /*
2026          * If identify namespace failed, use default 512 byte block size so
2027          * block layer can use before failing read/write for 0 capacity.
2028          */
2029         if (ns->lba_shift == 0)
2030                 ns->lba_shift = 9;
2031         bs = 1 << ns->lba_shift;
2032
2033         /* XXX: PI implementation requires metadata equal t10 pi tuple size */
2034         pi_type = ns->ms == sizeof(struct t10_pi_tuple) ?
2035                                         id->dps & NVME_NS_DPS_PI_MASK : 0;
2036
2037         blk_mq_freeze_queue(disk->queue);
2038         if (blk_get_integrity(disk) && (ns->pi_type != pi_type ||
2039                                 ns->ms != old_ms ||
2040                                 bs != queue_logical_block_size(disk->queue) ||
2041                                 (ns->ms && ns->ext)))
2042                 blk_integrity_unregister(disk);
2043
2044         ns->pi_type = pi_type;
2045         blk_queue_logical_block_size(ns->queue, bs);
2046
2047         if (ns->ms && !ns->ext)
2048                 nvme_init_integrity(ns);
2049
2050         if ((ns->ms && !(ns->ms == 8 && ns->pi_type) &&
2051                                                 !blk_get_integrity(disk)) ||
2052                                                 ns->type == NVME_NS_LIGHTNVM)
2053                 set_capacity(disk, 0);
2054         else
2055                 set_capacity(disk, le64_to_cpup(&id->nsze) << (ns->lba_shift - 9));
2056
2057         if (dev->oncs & NVME_CTRL_ONCS_DSM)
2058                 nvme_config_discard(ns);
2059         blk_mq_unfreeze_queue(disk->queue);
2060
2061         kfree(id);
2062         return 0;
2063 }
2064
2065 static char nvme_pr_type(enum pr_type type)
2066 {
2067         switch (type) {
2068         case PR_WRITE_EXCLUSIVE:
2069                 return 1;
2070         case PR_EXCLUSIVE_ACCESS:
2071                 return 2;
2072         case PR_WRITE_EXCLUSIVE_REG_ONLY:
2073                 return 3;
2074         case PR_EXCLUSIVE_ACCESS_REG_ONLY:
2075                 return 4;
2076         case PR_WRITE_EXCLUSIVE_ALL_REGS:
2077                 return 5;
2078         case PR_EXCLUSIVE_ACCESS_ALL_REGS:
2079                 return 6;
2080         default:
2081                 return 0;
2082         }
2083 };
2084
2085 static int nvme_pr_command(struct block_device *bdev, u32 cdw10,
2086                                 u64 key, u64 sa_key, u8 op)
2087 {
2088         struct nvme_ns *ns = bdev->bd_disk->private_data;
2089         struct nvme_command c;
2090         u8 data[16] = { 0, };
2091
2092         put_unaligned_le64(key, &data[0]);
2093         put_unaligned_le64(sa_key, &data[8]);
2094
2095         memset(&c, 0, sizeof(c));
2096         c.common.opcode = op;
2097         c.common.nsid = cpu_to_le32(ns->ns_id);
2098         c.common.cdw10[0] = cpu_to_le32(cdw10);
2099
2100         return nvme_submit_sync_cmd(ns->queue, &c, data, 16);
2101 }
2102
2103 static int nvme_pr_register(struct block_device *bdev, u64 old,
2104                 u64 new, unsigned flags)
2105 {
2106         u32 cdw10;
2107
2108         if (flags & ~PR_FL_IGNORE_KEY)
2109                 return -EOPNOTSUPP;
2110
2111         cdw10 = old ? 2 : 0;
2112         cdw10 |= (flags & PR_FL_IGNORE_KEY) ? 1 << 3 : 0;
2113         cdw10 |= (1 << 30) | (1 << 31); /* PTPL=1 */
2114         return nvme_pr_command(bdev, cdw10, old, new, nvme_cmd_resv_register);
2115 }
2116
2117 static int nvme_pr_reserve(struct block_device *bdev, u64 key,
2118                 enum pr_type type, unsigned flags)
2119 {
2120         u32 cdw10;
2121
2122         if (flags & ~PR_FL_IGNORE_KEY)
2123                 return -EOPNOTSUPP;
2124
2125         cdw10 = nvme_pr_type(type) << 8;
2126         cdw10 |= ((flags & PR_FL_IGNORE_KEY) ? 1 << 3 : 0);
2127         return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_acquire);
2128 }
2129
2130 static int nvme_pr_preempt(struct block_device *bdev, u64 old, u64 new,
2131                 enum pr_type type, bool abort)
2132 {
2133         u32 cdw10 = nvme_pr_type(type) << 8 | abort ? 2 : 1;
2134         return nvme_pr_command(bdev, cdw10, old, new, nvme_cmd_resv_acquire);
2135 }
2136
2137 static int nvme_pr_clear(struct block_device *bdev, u64 key)
2138 {
2139         u32 cdw10 = 1 | (key ? 1 << 3 : 0);
2140         return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_register);
2141 }
2142
2143 static int nvme_pr_release(struct block_device *bdev, u64 key, enum pr_type type)
2144 {
2145         u32 cdw10 = nvme_pr_type(type) << 8 | key ? 1 << 3 : 0;
2146         return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_release);
2147 }
2148
2149 static const struct pr_ops nvme_pr_ops = {
2150         .pr_register    = nvme_pr_register,
2151         .pr_reserve     = nvme_pr_reserve,
2152         .pr_release     = nvme_pr_release,
2153         .pr_preempt     = nvme_pr_preempt,
2154         .pr_clear       = nvme_pr_clear,
2155 };
2156
2157 static const struct block_device_operations nvme_fops = {
2158         .owner          = THIS_MODULE,
2159         .ioctl          = nvme_ioctl,
2160         .compat_ioctl   = nvme_compat_ioctl,
2161         .open           = nvme_open,
2162         .release        = nvme_release,
2163         .getgeo         = nvme_getgeo,
2164         .revalidate_disk= nvme_revalidate_disk,
2165         .pr_ops         = &nvme_pr_ops,
2166 };
2167
2168 static int nvme_kthread(void *data)
2169 {
2170         struct nvme_dev *dev, *next;
2171
2172         while (!kthread_should_stop()) {
2173                 set_current_state(TASK_INTERRUPTIBLE);
2174                 spin_lock(&dev_list_lock);
2175                 list_for_each_entry_safe(dev, next, &dev_list, node) {
2176                         int i;
2177                         u32 csts = readl(&dev->bar->csts);
2178
2179                         if ((dev->subsystem && (csts & NVME_CSTS_NSSRO)) ||
2180                                                         csts & NVME_CSTS_CFS) {
2181                                 if (!__nvme_reset(dev)) {
2182                                         dev_warn(dev->dev,
2183                                                 "Failed status: %x, reset controller\n",
2184                                                 readl(&dev->bar->csts));
2185                                 }
2186                                 continue;
2187                         }
2188                         for (i = 0; i < dev->queue_count; i++) {
2189                                 struct nvme_queue *nvmeq = dev->queues[i];
2190                                 if (!nvmeq)
2191                                         continue;
2192                                 spin_lock_irq(&nvmeq->q_lock);
2193                                 nvme_process_cq(nvmeq);
2194
2195                                 while ((i == 0) && (dev->event_limit > 0)) {
2196                                         if (nvme_submit_async_admin_req(dev))
2197                                                 break;
2198                                         dev->event_limit--;
2199                                 }
2200                                 spin_unlock_irq(&nvmeq->q_lock);
2201                         }
2202                 }
2203                 spin_unlock(&dev_list_lock);
2204                 schedule_timeout(round_jiffies_relative(HZ));
2205         }
2206         return 0;
2207 }
2208
2209 static void nvme_alloc_ns(struct nvme_dev *dev, unsigned nsid)
2210 {
2211         struct nvme_ns *ns;
2212         struct gendisk *disk;
2213         int node = dev_to_node(dev->dev);
2214
2215         ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node);
2216         if (!ns)
2217                 return;
2218
2219         ns->queue = blk_mq_init_queue(&dev->tagset);
2220         if (IS_ERR(ns->queue))
2221                 goto out_free_ns;
2222         queue_flag_set_unlocked(QUEUE_FLAG_NOMERGES, ns->queue);
2223         queue_flag_set_unlocked(QUEUE_FLAG_NONROT, ns->queue);
2224         ns->dev = dev;
2225         ns->queue->queuedata = ns;
2226
2227         disk = alloc_disk_node(0, node);
2228         if (!disk)
2229                 goto out_free_queue;
2230
2231         kref_init(&ns->kref);
2232         ns->ns_id = nsid;
2233         ns->disk = disk;
2234         ns->lba_shift = 9; /* set to a default value for 512 until disk is validated */
2235         list_add_tail(&ns->list, &dev->namespaces);
2236
2237         blk_queue_logical_block_size(ns->queue, 1 << ns->lba_shift);
2238         if (dev->max_hw_sectors) {
2239                 blk_queue_max_hw_sectors(ns->queue, dev->max_hw_sectors);
2240                 blk_queue_max_segments(ns->queue,
2241                         ((dev->max_hw_sectors << 9) / dev->page_size) + 1);
2242         }
2243         if (dev->stripe_size)
2244                 blk_queue_chunk_sectors(ns->queue, dev->stripe_size >> 9);
2245         if (dev->vwc & NVME_CTRL_VWC_PRESENT)
2246                 blk_queue_flush(ns->queue, REQ_FLUSH | REQ_FUA);
2247         blk_queue_virt_boundary(ns->queue, dev->page_size - 1);
2248
2249         disk->major = nvme_major;
2250         disk->first_minor = 0;
2251         disk->fops = &nvme_fops;
2252         disk->private_data = ns;
2253         disk->queue = ns->queue;
2254         disk->driverfs_dev = dev->device;
2255         disk->flags = GENHD_FL_EXT_DEVT;
2256         sprintf(disk->disk_name, "nvme%dn%d", dev->instance, nsid);
2257
2258         /*
2259          * Initialize capacity to 0 until we establish the namespace format and
2260          * setup integrity extentions if necessary. The revalidate_disk after
2261          * add_disk allows the driver to register with integrity if the format
2262          * requires it.
2263          */
2264         set_capacity(disk, 0);
2265         if (nvme_revalidate_disk(ns->disk))
2266                 goto out_free_disk;
2267
2268         kref_get(&dev->kref);
2269         if (ns->type != NVME_NS_LIGHTNVM) {
2270                 add_disk(ns->disk);
2271                 if (ns->ms) {
2272                         struct block_device *bd = bdget_disk(ns->disk, 0);
2273                         if (!bd)
2274                                 return;
2275                         if (blkdev_get(bd, FMODE_READ, NULL)) {
2276                                 bdput(bd);
2277                                 return;
2278                         }
2279                         blkdev_reread_part(bd);
2280                         blkdev_put(bd, FMODE_READ);
2281                 }
2282         }
2283         return;
2284  out_free_disk:
2285         kfree(disk);
2286         list_del(&ns->list);
2287  out_free_queue:
2288         blk_cleanup_queue(ns->queue);
2289  out_free_ns:
2290         kfree(ns);
2291 }
2292
2293 /*
2294  * Create I/O queues.  Failing to create an I/O queue is not an issue,
2295  * we can continue with less than the desired amount of queues, and
2296  * even a controller without I/O queues an still be used to issue
2297  * admin commands.  This might be useful to upgrade a buggy firmware
2298  * for example.
2299  */
2300 static void nvme_create_io_queues(struct nvme_dev *dev)
2301 {
2302         unsigned i;
2303
2304         for (i = dev->queue_count; i <= dev->max_qid; i++)
2305                 if (!nvme_alloc_queue(dev, i, dev->q_depth))
2306                         break;
2307
2308         for (i = dev->online_queues; i <= dev->queue_count - 1; i++)
2309                 if (nvme_create_queue(dev->queues[i], i)) {
2310                         nvme_free_queues(dev, i);
2311                         break;
2312                 }
2313 }
2314
2315 static int set_queue_count(struct nvme_dev *dev, int count)
2316 {
2317         int status;
2318         u32 result;
2319         u32 q_count = (count - 1) | ((count - 1) << 16);
2320
2321         status = nvme_set_features(dev, NVME_FEAT_NUM_QUEUES, q_count, 0,
2322                                                                 &result);
2323         if (status < 0)
2324                 return status;
2325         if (status > 0) {
2326                 dev_err(dev->dev, "Could not set queue count (%d)\n", status);
2327                 return 0;
2328         }
2329         return min(result & 0xffff, result >> 16) + 1;
2330 }
2331
2332 static void __iomem *nvme_map_cmb(struct nvme_dev *dev)
2333 {
2334         u64 szu, size, offset;
2335         u32 cmbloc;
2336         resource_size_t bar_size;
2337         struct pci_dev *pdev = to_pci_dev(dev->dev);
2338         void __iomem *cmb;
2339         dma_addr_t dma_addr;
2340
2341         if (!use_cmb_sqes)
2342                 return NULL;
2343
2344         dev->cmbsz = readl(&dev->bar->cmbsz);
2345         if (!(NVME_CMB_SZ(dev->cmbsz)))
2346                 return NULL;
2347
2348         cmbloc = readl(&dev->bar->cmbloc);
2349
2350         szu = (u64)1 << (12 + 4 * NVME_CMB_SZU(dev->cmbsz));
2351         size = szu * NVME_CMB_SZ(dev->cmbsz);
2352         offset = szu * NVME_CMB_OFST(cmbloc);
2353         bar_size = pci_resource_len(pdev, NVME_CMB_BIR(cmbloc));
2354
2355         if (offset > bar_size)
2356                 return NULL;
2357
2358         /*
2359          * Controllers may support a CMB size larger than their BAR,
2360          * for example, due to being behind a bridge. Reduce the CMB to
2361          * the reported size of the BAR
2362          */
2363         if (size > bar_size - offset)
2364                 size = bar_size - offset;
2365
2366         dma_addr = pci_resource_start(pdev, NVME_CMB_BIR(cmbloc)) + offset;
2367         cmb = ioremap_wc(dma_addr, size);
2368         if (!cmb)
2369                 return NULL;
2370
2371         dev->cmb_dma_addr = dma_addr;
2372         dev->cmb_size = size;
2373         return cmb;
2374 }
2375
2376 static inline void nvme_release_cmb(struct nvme_dev *dev)
2377 {
2378         if (dev->cmb) {
2379                 iounmap(dev->cmb);
2380                 dev->cmb = NULL;
2381         }
2382 }
2383
2384 static size_t db_bar_size(struct nvme_dev *dev, unsigned nr_io_queues)
2385 {
2386         return 4096 + ((nr_io_queues + 1) * 8 * dev->db_stride);
2387 }
2388
2389 static int nvme_setup_io_queues(struct nvme_dev *dev)
2390 {
2391         struct nvme_queue *adminq = dev->queues[0];
2392         struct pci_dev *pdev = to_pci_dev(dev->dev);
2393         int result, i, vecs, nr_io_queues, size;
2394
2395         nr_io_queues = num_possible_cpus();
2396         result = set_queue_count(dev, nr_io_queues);
2397         if (result <= 0)
2398                 return result;
2399         if (result < nr_io_queues)
2400                 nr_io_queues = result;
2401
2402         if (dev->cmb && NVME_CMB_SQS(dev->cmbsz)) {
2403                 result = nvme_cmb_qdepth(dev, nr_io_queues,
2404                                 sizeof(struct nvme_command));
2405                 if (result > 0)
2406                         dev->q_depth = result;
2407                 else
2408                         nvme_release_cmb(dev);
2409         }
2410
2411         size = db_bar_size(dev, nr_io_queues);
2412         if (size > 8192) {
2413                 iounmap(dev->bar);
2414                 do {
2415                         dev->bar = ioremap(pci_resource_start(pdev, 0), size);
2416                         if (dev->bar)
2417                                 break;
2418                         if (!--nr_io_queues)
2419                                 return -ENOMEM;
2420                         size = db_bar_size(dev, nr_io_queues);
2421                 } while (1);
2422                 dev->dbs = ((void __iomem *)dev->bar) + 4096;
2423                 adminq->q_db = dev->dbs;
2424         }
2425
2426         /* Deregister the admin queue's interrupt */
2427         free_irq(dev->entry[0].vector, adminq);
2428
2429         /*
2430          * If we enable msix early due to not intx, disable it again before
2431          * setting up the full range we need.
2432          */
2433         if (!pdev->irq)
2434                 pci_disable_msix(pdev);
2435
2436         for (i = 0; i < nr_io_queues; i++)
2437                 dev->entry[i].entry = i;
2438         vecs = pci_enable_msix_range(pdev, dev->entry, 1, nr_io_queues);
2439         if (vecs < 0) {
2440                 vecs = pci_enable_msi_range(pdev, 1, min(nr_io_queues, 32));
2441                 if (vecs < 0) {
2442                         vecs = 1;
2443                 } else {
2444                         for (i = 0; i < vecs; i++)
2445                                 dev->entry[i].vector = i + pdev->irq;
2446                 }
2447         }
2448
2449         /*
2450          * Should investigate if there's a performance win from allocating
2451          * more queues than interrupt vectors; it might allow the submission
2452          * path to scale better, even if the receive path is limited by the
2453          * number of interrupts.
2454          */
2455         nr_io_queues = vecs;
2456         dev->max_qid = nr_io_queues;
2457
2458         result = queue_request_irq(dev, adminq, adminq->irqname);
2459         if (result) {
2460                 adminq->cq_vector = -1;
2461                 goto free_queues;
2462         }
2463
2464         /* Free previously allocated queues that are no longer usable */
2465         nvme_free_queues(dev, nr_io_queues + 1);
2466         nvme_create_io_queues(dev);
2467
2468         return 0;
2469
2470  free_queues:
2471         nvme_free_queues(dev, 1);
2472         return result;
2473 }
2474
2475 static int ns_cmp(void *priv, struct list_head *a, struct list_head *b)
2476 {
2477         struct nvme_ns *nsa = container_of(a, struct nvme_ns, list);
2478         struct nvme_ns *nsb = container_of(b, struct nvme_ns, list);
2479
2480         return nsa->ns_id - nsb->ns_id;
2481 }
2482
2483 static struct nvme_ns *nvme_find_ns(struct nvme_dev *dev, unsigned nsid)
2484 {
2485         struct nvme_ns *ns;
2486
2487         list_for_each_entry(ns, &dev->namespaces, list) {
2488                 if (ns->ns_id == nsid)
2489                         return ns;
2490                 if (ns->ns_id > nsid)
2491                         break;
2492         }
2493         return NULL;
2494 }
2495
2496 static inline bool nvme_io_incapable(struct nvme_dev *dev)
2497 {
2498         return (!dev->bar || readl(&dev->bar->csts) & NVME_CSTS_CFS ||
2499                                                         dev->online_queues < 2);
2500 }
2501
2502 static void nvme_ns_remove(struct nvme_ns *ns)
2503 {
2504         bool kill = nvme_io_incapable(ns->dev) && !blk_queue_dying(ns->queue);
2505
2506         if (kill)
2507                 blk_set_queue_dying(ns->queue);
2508         if (ns->disk->flags & GENHD_FL_UP)
2509                 del_gendisk(ns->disk);
2510         if (kill || !blk_queue_dying(ns->queue)) {
2511                 blk_mq_abort_requeue_list(ns->queue);
2512                 blk_cleanup_queue(ns->queue);
2513         }
2514         list_del_init(&ns->list);
2515         kref_put(&ns->kref, nvme_free_ns);
2516 }
2517
2518 static void nvme_scan_namespaces(struct nvme_dev *dev, unsigned nn)
2519 {
2520         struct nvme_ns *ns, *next;
2521         unsigned i;
2522
2523         for (i = 1; i <= nn; i++) {
2524                 ns = nvme_find_ns(dev, i);
2525                 if (ns) {
2526                         if (revalidate_disk(ns->disk))
2527                                 nvme_ns_remove(ns);
2528                 } else
2529                         nvme_alloc_ns(dev, i);
2530         }
2531         list_for_each_entry_safe(ns, next, &dev->namespaces, list) {
2532                 if (ns->ns_id > nn)
2533                         nvme_ns_remove(ns);
2534         }
2535         list_sort(NULL, &dev->namespaces, ns_cmp);
2536 }
2537
2538 static void nvme_set_irq_hints(struct nvme_dev *dev)
2539 {
2540         struct nvme_queue *nvmeq;
2541         int i;
2542
2543         for (i = 0; i < dev->online_queues; i++) {
2544                 nvmeq = dev->queues[i];
2545
2546                 if (!nvmeq->tags || !(*nvmeq->tags))
2547                         continue;
2548
2549                 irq_set_affinity_hint(dev->entry[nvmeq->cq_vector].vector,
2550                                         blk_mq_tags_cpumask(*nvmeq->tags));
2551         }
2552 }
2553
2554 static void nvme_dev_scan(struct work_struct *work)
2555 {
2556         struct nvme_dev *dev = container_of(work, struct nvme_dev, scan_work);
2557         struct nvme_id_ctrl *ctrl;
2558
2559         if (!dev->tagset.tags)
2560                 return;
2561         if (nvme_identify_ctrl(dev, &ctrl))
2562                 return;
2563         nvme_scan_namespaces(dev, le32_to_cpup(&ctrl->nn));
2564         kfree(ctrl);
2565         nvme_set_irq_hints(dev);
2566 }
2567
2568 /*
2569  * Return: error value if an error occurred setting up the queues or calling
2570  * Identify Device.  0 if these succeeded, even if adding some of the
2571  * namespaces failed.  At the moment, these failures are silent.  TBD which
2572  * failures should be reported.
2573  */
2574 static int nvme_dev_add(struct nvme_dev *dev)
2575 {
2576         struct pci_dev *pdev = to_pci_dev(dev->dev);
2577         int res;
2578         struct nvme_id_ctrl *ctrl;
2579         int shift = NVME_CAP_MPSMIN(readq(&dev->bar->cap)) + 12;
2580
2581         res = nvme_identify_ctrl(dev, &ctrl);
2582         if (res) {
2583                 dev_err(dev->dev, "Identify Controller failed (%d)\n", res);
2584                 return -EIO;
2585         }
2586
2587         dev->oncs = le16_to_cpup(&ctrl->oncs);
2588         dev->abort_limit = ctrl->acl + 1;
2589         dev->vwc = ctrl->vwc;
2590         memcpy(dev->serial, ctrl->sn, sizeof(ctrl->sn));
2591         memcpy(dev->model, ctrl->mn, sizeof(ctrl->mn));
2592         memcpy(dev->firmware_rev, ctrl->fr, sizeof(ctrl->fr));
2593         if (ctrl->mdts)
2594                 dev->max_hw_sectors = 1 << (ctrl->mdts + shift - 9);
2595         if ((pdev->vendor == PCI_VENDOR_ID_INTEL) &&
2596                         (pdev->device == 0x0953) && ctrl->vs[3]) {
2597                 unsigned int max_hw_sectors;
2598
2599                 dev->stripe_size = 1 << (ctrl->vs[3] + shift);
2600                 max_hw_sectors = dev->stripe_size >> (shift - 9);
2601                 if (dev->max_hw_sectors) {
2602                         dev->max_hw_sectors = min(max_hw_sectors,
2603                                                         dev->max_hw_sectors);
2604                 } else
2605                         dev->max_hw_sectors = max_hw_sectors;
2606         }
2607         kfree(ctrl);
2608
2609         if (!dev->tagset.tags) {
2610                 dev->tagset.ops = &nvme_mq_ops;
2611                 dev->tagset.nr_hw_queues = dev->online_queues - 1;
2612                 dev->tagset.timeout = NVME_IO_TIMEOUT;
2613                 dev->tagset.numa_node = dev_to_node(dev->dev);
2614                 dev->tagset.queue_depth =
2615                                 min_t(int, dev->q_depth, BLK_MQ_MAX_DEPTH) - 1;
2616                 dev->tagset.cmd_size = nvme_cmd_size(dev);
2617                 dev->tagset.flags = BLK_MQ_F_SHOULD_MERGE;
2618                 dev->tagset.driver_data = dev;
2619
2620                 if (blk_mq_alloc_tag_set(&dev->tagset))
2621                         return 0;
2622         }
2623         schedule_work(&dev->scan_work);
2624         return 0;
2625 }
2626
2627 static int nvme_dev_map(struct nvme_dev *dev)
2628 {
2629         u64 cap;
2630         int bars, result = -ENOMEM;
2631         struct pci_dev *pdev = to_pci_dev(dev->dev);
2632
2633         if (pci_enable_device_mem(pdev))
2634                 return result;
2635
2636         dev->entry[0].vector = pdev->irq;
2637         pci_set_master(pdev);
2638         bars = pci_select_bars(pdev, IORESOURCE_MEM);
2639         if (!bars)
2640                 goto disable_pci;
2641
2642         if (pci_request_selected_regions(pdev, bars, "nvme"))
2643                 goto disable_pci;
2644
2645         if (dma_set_mask_and_coherent(dev->dev, DMA_BIT_MASK(64)) &&
2646             dma_set_mask_and_coherent(dev->dev, DMA_BIT_MASK(32)))
2647                 goto disable;
2648
2649         dev->bar = ioremap(pci_resource_start(pdev, 0), 8192);
2650         if (!dev->bar)
2651                 goto disable;
2652
2653         if (readl(&dev->bar->csts) == -1) {
2654                 result = -ENODEV;
2655                 goto unmap;
2656         }
2657
2658         /*
2659          * Some devices don't advertse INTx interrupts, pre-enable a single
2660          * MSIX vec for setup. We'll adjust this later.
2661          */
2662         if (!pdev->irq) {
2663                 result = pci_enable_msix(pdev, dev->entry, 1);
2664                 if (result < 0)
2665                         goto unmap;
2666         }
2667
2668         cap = readq(&dev->bar->cap);
2669         dev->q_depth = min_t(int, NVME_CAP_MQES(cap) + 1, NVME_Q_DEPTH);
2670         dev->db_stride = 1 << NVME_CAP_STRIDE(cap);
2671         dev->dbs = ((void __iomem *)dev->bar) + 4096;
2672         if (readl(&dev->bar->vs) >= NVME_VS(1, 2))
2673                 dev->cmb = nvme_map_cmb(dev);
2674
2675         return 0;
2676
2677  unmap:
2678         iounmap(dev->bar);
2679         dev->bar = NULL;
2680  disable:
2681         pci_release_regions(pdev);
2682  disable_pci:
2683         pci_disable_device(pdev);
2684         return result;
2685 }
2686
2687 static void nvme_dev_unmap(struct nvme_dev *dev)
2688 {
2689         struct pci_dev *pdev = to_pci_dev(dev->dev);
2690
2691         if (pdev->msi_enabled)
2692                 pci_disable_msi(pdev);
2693         else if (pdev->msix_enabled)
2694                 pci_disable_msix(pdev);
2695
2696         if (dev->bar) {
2697                 iounmap(dev->bar);
2698                 dev->bar = NULL;
2699                 pci_release_regions(pdev);
2700         }
2701
2702         if (pci_is_enabled(pdev))
2703                 pci_disable_device(pdev);
2704 }
2705
2706 struct nvme_delq_ctx {
2707         struct task_struct *waiter;
2708         struct kthread_worker *worker;
2709         atomic_t refcount;
2710 };
2711
2712 static void nvme_wait_dq(struct nvme_delq_ctx *dq, struct nvme_dev *dev)
2713 {
2714         dq->waiter = current;
2715         mb();
2716
2717         for (;;) {
2718                 set_current_state(TASK_KILLABLE);
2719                 if (!atomic_read(&dq->refcount))
2720                         break;
2721                 if (!schedule_timeout(ADMIN_TIMEOUT) ||
2722                                         fatal_signal_pending(current)) {
2723                         /*
2724                          * Disable the controller first since we can't trust it
2725                          * at this point, but leave the admin queue enabled
2726                          * until all queue deletion requests are flushed.
2727                          * FIXME: This may take a while if there are more h/w
2728                          * queues than admin tags.
2729                          */
2730                         set_current_state(TASK_RUNNING);
2731                         nvme_disable_ctrl(dev, readq(&dev->bar->cap));
2732                         nvme_clear_queue(dev->queues[0]);
2733                         flush_kthread_worker(dq->worker);
2734                         nvme_disable_queue(dev, 0);
2735                         return;
2736                 }
2737         }
2738         set_current_state(TASK_RUNNING);
2739 }
2740
2741 static void nvme_put_dq(struct nvme_delq_ctx *dq)
2742 {
2743         atomic_dec(&dq->refcount);
2744         if (dq->waiter)
2745                 wake_up_process(dq->waiter);
2746 }
2747
2748 static struct nvme_delq_ctx *nvme_get_dq(struct nvme_delq_ctx *dq)
2749 {
2750         atomic_inc(&dq->refcount);
2751         return dq;
2752 }
2753
2754 static void nvme_del_queue_end(struct nvme_queue *nvmeq)
2755 {
2756         struct nvme_delq_ctx *dq = nvmeq->cmdinfo.ctx;
2757         nvme_put_dq(dq);
2758 }
2759
2760 static int adapter_async_del_queue(struct nvme_queue *nvmeq, u8 opcode,
2761                                                 kthread_work_func_t fn)
2762 {
2763         struct nvme_command c;
2764
2765         memset(&c, 0, sizeof(c));
2766         c.delete_queue.opcode = opcode;
2767         c.delete_queue.qid = cpu_to_le16(nvmeq->qid);
2768
2769         init_kthread_work(&nvmeq->cmdinfo.work, fn);
2770         return nvme_submit_admin_async_cmd(nvmeq->dev, &c, &nvmeq->cmdinfo,
2771                                                                 ADMIN_TIMEOUT);
2772 }
2773
2774 static void nvme_del_cq_work_handler(struct kthread_work *work)
2775 {
2776         struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2777                                                         cmdinfo.work);
2778         nvme_del_queue_end(nvmeq);
2779 }
2780
2781 static int nvme_delete_cq(struct nvme_queue *nvmeq)
2782 {
2783         return adapter_async_del_queue(nvmeq, nvme_admin_delete_cq,
2784                                                 nvme_del_cq_work_handler);
2785 }
2786
2787 static void nvme_del_sq_work_handler(struct kthread_work *work)
2788 {
2789         struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2790                                                         cmdinfo.work);
2791         int status = nvmeq->cmdinfo.status;
2792
2793         if (!status)
2794                 status = nvme_delete_cq(nvmeq);
2795         if (status)
2796                 nvme_del_queue_end(nvmeq);
2797 }
2798
2799 static int nvme_delete_sq(struct nvme_queue *nvmeq)
2800 {
2801         return adapter_async_del_queue(nvmeq, nvme_admin_delete_sq,
2802                                                 nvme_del_sq_work_handler);
2803 }
2804
2805 static void nvme_del_queue_start(struct kthread_work *work)
2806 {
2807         struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2808                                                         cmdinfo.work);
2809         if (nvme_delete_sq(nvmeq))
2810                 nvme_del_queue_end(nvmeq);
2811 }
2812
2813 static void nvme_disable_io_queues(struct nvme_dev *dev)
2814 {
2815         int i;
2816         DEFINE_KTHREAD_WORKER_ONSTACK(worker);
2817         struct nvme_delq_ctx dq;
2818         struct task_struct *kworker_task = kthread_run(kthread_worker_fn,
2819                                         &worker, "nvme%d", dev->instance);
2820
2821         if (IS_ERR(kworker_task)) {
2822                 dev_err(dev->dev,
2823                         "Failed to create queue del task\n");
2824                 for (i = dev->queue_count - 1; i > 0; i--)
2825                         nvme_disable_queue(dev, i);
2826                 return;
2827         }
2828
2829         dq.waiter = NULL;
2830         atomic_set(&dq.refcount, 0);
2831         dq.worker = &worker;
2832         for (i = dev->queue_count - 1; i > 0; i--) {
2833                 struct nvme_queue *nvmeq = dev->queues[i];
2834
2835                 if (nvme_suspend_queue(nvmeq))
2836                         continue;
2837                 nvmeq->cmdinfo.ctx = nvme_get_dq(&dq);
2838                 nvmeq->cmdinfo.worker = dq.worker;
2839                 init_kthread_work(&nvmeq->cmdinfo.work, nvme_del_queue_start);
2840                 queue_kthread_work(dq.worker, &nvmeq->cmdinfo.work);
2841         }
2842         nvme_wait_dq(&dq, dev);
2843         kthread_stop(kworker_task);
2844 }
2845
2846 /*
2847 * Remove the node from the device list and check
2848 * for whether or not we need to stop the nvme_thread.
2849 */
2850 static void nvme_dev_list_remove(struct nvme_dev *dev)
2851 {
2852         struct task_struct *tmp = NULL;
2853
2854         spin_lock(&dev_list_lock);
2855         list_del_init(&dev->node);
2856         if (list_empty(&dev_list) && !IS_ERR_OR_NULL(nvme_thread)) {
2857                 tmp = nvme_thread;
2858                 nvme_thread = NULL;
2859         }
2860         spin_unlock(&dev_list_lock);
2861
2862         if (tmp)
2863                 kthread_stop(tmp);
2864 }
2865
2866 static void nvme_freeze_queues(struct nvme_dev *dev)
2867 {
2868         struct nvme_ns *ns;
2869
2870         list_for_each_entry(ns, &dev->namespaces, list) {
2871                 blk_mq_freeze_queue_start(ns->queue);
2872
2873                 spin_lock_irq(ns->queue->queue_lock);
2874                 queue_flag_set(QUEUE_FLAG_STOPPED, ns->queue);
2875                 spin_unlock_irq(ns->queue->queue_lock);
2876
2877                 blk_mq_cancel_requeue_work(ns->queue);
2878                 blk_mq_stop_hw_queues(ns->queue);
2879         }
2880 }
2881
2882 static void nvme_unfreeze_queues(struct nvme_dev *dev)
2883 {
2884         struct nvme_ns *ns;
2885
2886         list_for_each_entry(ns, &dev->namespaces, list) {
2887                 queue_flag_clear_unlocked(QUEUE_FLAG_STOPPED, ns->queue);
2888                 blk_mq_unfreeze_queue(ns->queue);
2889                 blk_mq_start_stopped_hw_queues(ns->queue, true);
2890                 blk_mq_kick_requeue_list(ns->queue);
2891         }
2892 }
2893
2894 static void nvme_dev_shutdown(struct nvme_dev *dev)
2895 {
2896         int i;
2897         u32 csts = -1;
2898
2899         nvme_dev_list_remove(dev);
2900
2901         if (dev->bar) {
2902                 nvme_freeze_queues(dev);
2903                 csts = readl(&dev->bar->csts);
2904         }
2905         if (csts & NVME_CSTS_CFS || !(csts & NVME_CSTS_RDY)) {
2906                 for (i = dev->queue_count - 1; i >= 0; i--) {
2907                         struct nvme_queue *nvmeq = dev->queues[i];
2908                         nvme_suspend_queue(nvmeq);
2909                 }
2910         } else {
2911                 nvme_disable_io_queues(dev);
2912                 nvme_shutdown_ctrl(dev);
2913                 nvme_disable_queue(dev, 0);
2914         }
2915         nvme_dev_unmap(dev);
2916
2917         for (i = dev->queue_count - 1; i >= 0; i--)
2918                 nvme_clear_queue(dev->queues[i]);
2919 }
2920
2921 static void nvme_dev_remove(struct nvme_dev *dev)
2922 {
2923         struct nvme_ns *ns, *next;
2924
2925         list_for_each_entry_safe(ns, next, &dev->namespaces, list)
2926                 nvme_ns_remove(ns);
2927 }
2928
2929 static int nvme_setup_prp_pools(struct nvme_dev *dev)
2930 {
2931         dev->prp_page_pool = dma_pool_create("prp list page", dev->dev,
2932                                                 PAGE_SIZE, PAGE_SIZE, 0);
2933         if (!dev->prp_page_pool)
2934                 return -ENOMEM;
2935
2936         /* Optimisation for I/Os between 4k and 128k */
2937         dev->prp_small_pool = dma_pool_create("prp list 256", dev->dev,
2938                                                 256, 256, 0);
2939         if (!dev->prp_small_pool) {
2940                 dma_pool_destroy(dev->prp_page_pool);
2941                 return -ENOMEM;
2942         }
2943         return 0;
2944 }
2945
2946 static void nvme_release_prp_pools(struct nvme_dev *dev)
2947 {
2948         dma_pool_destroy(dev->prp_page_pool);
2949         dma_pool_destroy(dev->prp_small_pool);
2950 }
2951
2952 static DEFINE_IDA(nvme_instance_ida);
2953
2954 static int nvme_set_instance(struct nvme_dev *dev)
2955 {
2956         int instance, error;
2957
2958         do {
2959                 if (!ida_pre_get(&nvme_instance_ida, GFP_KERNEL))
2960                         return -ENODEV;
2961
2962                 spin_lock(&dev_list_lock);
2963                 error = ida_get_new(&nvme_instance_ida, &instance);
2964                 spin_unlock(&dev_list_lock);
2965         } while (error == -EAGAIN);
2966
2967         if (error)
2968                 return -ENODEV;
2969
2970         dev->instance = instance;
2971         return 0;
2972 }
2973
2974 static void nvme_release_instance(struct nvme_dev *dev)
2975 {
2976         spin_lock(&dev_list_lock);
2977         ida_remove(&nvme_instance_ida, dev->instance);
2978         spin_unlock(&dev_list_lock);
2979 }
2980
2981 static void nvme_free_dev(struct kref *kref)
2982 {
2983         struct nvme_dev *dev = container_of(kref, struct nvme_dev, kref);
2984
2985         put_device(dev->dev);
2986         put_device(dev->device);
2987         nvme_release_instance(dev);
2988         if (dev->tagset.tags)
2989                 blk_mq_free_tag_set(&dev->tagset);
2990         if (dev->admin_q)
2991                 blk_put_queue(dev->admin_q);
2992         kfree(dev->queues);
2993         kfree(dev->entry);
2994         kfree(dev);
2995 }
2996
2997 static int nvme_dev_open(struct inode *inode, struct file *f)
2998 {
2999         struct nvme_dev *dev;
3000         int instance = iminor(inode);
3001         int ret = -ENODEV;
3002
3003         spin_lock(&dev_list_lock);
3004         list_for_each_entry(dev, &dev_list, node) {
3005                 if (dev->instance == instance) {
3006                         if (!dev->admin_q) {
3007                                 ret = -EWOULDBLOCK;
3008                                 break;
3009                         }
3010                         if (!kref_get_unless_zero(&dev->kref))
3011                                 break;
3012                         f->private_data = dev;
3013                         ret = 0;
3014                         break;
3015                 }
3016         }
3017         spin_unlock(&dev_list_lock);
3018
3019         return ret;
3020 }
3021
3022 static int nvme_dev_release(struct inode *inode, struct file *f)
3023 {
3024         struct nvme_dev *dev = f->private_data;
3025         kref_put(&dev->kref, nvme_free_dev);
3026         return 0;
3027 }
3028
3029 static long nvme_dev_ioctl(struct file *f, unsigned int cmd, unsigned long arg)
3030 {
3031         struct nvme_dev *dev = f->private_data;
3032         struct nvme_ns *ns;
3033
3034         switch (cmd) {
3035         case NVME_IOCTL_ADMIN_CMD:
3036                 return nvme_user_cmd(dev, NULL, (void __user *)arg);
3037         case NVME_IOCTL_IO_CMD:
3038                 if (list_empty(&dev->namespaces))
3039                         return -ENOTTY;
3040                 ns = list_first_entry(&dev->namespaces, struct nvme_ns, list);
3041                 return nvme_user_cmd(dev, ns, (void __user *)arg);
3042         case NVME_IOCTL_RESET:
3043                 dev_warn(dev->dev, "resetting controller\n");
3044                 return nvme_reset(dev);
3045         case NVME_IOCTL_SUBSYS_RESET:
3046                 return nvme_subsys_reset(dev);
3047         default:
3048                 return -ENOTTY;
3049         }
3050 }
3051
3052 static const struct file_operations nvme_dev_fops = {
3053         .owner          = THIS_MODULE,
3054         .open           = nvme_dev_open,
3055         .release        = nvme_dev_release,
3056         .unlocked_ioctl = nvme_dev_ioctl,
3057         .compat_ioctl   = nvme_dev_ioctl,
3058 };
3059
3060 static void nvme_probe_work(struct work_struct *work)
3061 {
3062         struct nvme_dev *dev = container_of(work, struct nvme_dev, probe_work);
3063         bool start_thread = false;
3064         int result;
3065
3066         result = nvme_dev_map(dev);
3067         if (result)
3068                 goto out;
3069
3070         result = nvme_configure_admin_queue(dev);
3071         if (result)
3072                 goto unmap;
3073
3074         spin_lock(&dev_list_lock);
3075         if (list_empty(&dev_list) && IS_ERR_OR_NULL(nvme_thread)) {
3076                 start_thread = true;
3077                 nvme_thread = NULL;
3078         }
3079         list_add(&dev->node, &dev_list);
3080         spin_unlock(&dev_list_lock);
3081
3082         if (start_thread) {
3083                 nvme_thread = kthread_run(nvme_kthread, NULL, "nvme");
3084                 wake_up_all(&nvme_kthread_wait);
3085         } else
3086                 wait_event_killable(nvme_kthread_wait, nvme_thread);
3087
3088         if (IS_ERR_OR_NULL(nvme_thread)) {
3089                 result = nvme_thread ? PTR_ERR(nvme_thread) : -EINTR;
3090                 goto disable;
3091         }
3092
3093         nvme_init_queue(dev->queues[0], 0);
3094         result = nvme_alloc_admin_tags(dev);
3095         if (result)
3096                 goto disable;
3097
3098         result = nvme_setup_io_queues(dev);
3099         if (result)
3100                 goto free_tags;
3101
3102         dev->event_limit = 1;
3103
3104         /*
3105          * Keep the controller around but remove all namespaces if we don't have
3106          * any working I/O queue.
3107          */
3108         if (dev->online_queues < 2) {
3109                 dev_warn(dev->dev, "IO queues not created\n");
3110                 nvme_dev_remove(dev);
3111         } else {
3112                 nvme_unfreeze_queues(dev);
3113                 nvme_dev_add(dev);
3114         }
3115
3116         return;
3117
3118  free_tags:
3119         nvme_dev_remove_admin(dev);
3120         blk_put_queue(dev->admin_q);
3121         dev->admin_q = NULL;
3122         dev->queues[0]->tags = NULL;
3123  disable:
3124         nvme_disable_queue(dev, 0);
3125         nvme_dev_list_remove(dev);
3126  unmap:
3127         nvme_dev_unmap(dev);
3128  out:
3129         if (!work_busy(&dev->reset_work))
3130                 nvme_dead_ctrl(dev);
3131 }
3132
3133 static int nvme_remove_dead_ctrl(void *arg)
3134 {
3135         struct nvme_dev *dev = (struct nvme_dev *)arg;
3136         struct pci_dev *pdev = to_pci_dev(dev->dev);
3137
3138         if (pci_get_drvdata(pdev))
3139                 pci_stop_and_remove_bus_device_locked(pdev);
3140         kref_put(&dev->kref, nvme_free_dev);
3141         return 0;
3142 }
3143
3144 static void nvme_dead_ctrl(struct nvme_dev *dev)
3145 {
3146         dev_warn(dev->dev, "Device failed to resume\n");
3147         kref_get(&dev->kref);
3148         if (IS_ERR(kthread_run(nvme_remove_dead_ctrl, dev, "nvme%d",
3149                                                 dev->instance))) {
3150                 dev_err(dev->dev,
3151                         "Failed to start controller remove task\n");
3152                 kref_put(&dev->kref, nvme_free_dev);
3153         }
3154 }
3155
3156 static void nvme_reset_work(struct work_struct *ws)
3157 {
3158         struct nvme_dev *dev = container_of(ws, struct nvme_dev, reset_work);
3159         bool in_probe = work_busy(&dev->probe_work);
3160
3161         nvme_dev_shutdown(dev);
3162
3163         /* Synchronize with device probe so that work will see failure status
3164          * and exit gracefully without trying to schedule another reset */
3165         flush_work(&dev->probe_work);
3166
3167         /* Fail this device if reset occured during probe to avoid
3168          * infinite initialization loops. */
3169         if (in_probe) {
3170                 nvme_dead_ctrl(dev);
3171                 return;
3172         }
3173         /* Schedule device resume asynchronously so the reset work is available
3174          * to cleanup errors that may occur during reinitialization */
3175         schedule_work(&dev->probe_work);
3176 }
3177
3178 static int __nvme_reset(struct nvme_dev *dev)
3179 {
3180         if (work_pending(&dev->reset_work))
3181                 return -EBUSY;
3182         list_del_init(&dev->node);
3183         queue_work(nvme_workq, &dev->reset_work);
3184         return 0;
3185 }
3186
3187 static int nvme_reset(struct nvme_dev *dev)
3188 {
3189         int ret;
3190
3191         if (!dev->admin_q || blk_queue_dying(dev->admin_q))
3192                 return -ENODEV;
3193
3194         spin_lock(&dev_list_lock);
3195         ret = __nvme_reset(dev);
3196         spin_unlock(&dev_list_lock);
3197
3198         if (!ret) {
3199                 flush_work(&dev->reset_work);
3200                 flush_work(&dev->probe_work);
3201                 return 0;
3202         }
3203
3204         return ret;
3205 }
3206
3207 static ssize_t nvme_sysfs_reset(struct device *dev,
3208                                 struct device_attribute *attr, const char *buf,
3209                                 size_t count)
3210 {
3211         struct nvme_dev *ndev = dev_get_drvdata(dev);
3212         int ret;
3213
3214         ret = nvme_reset(ndev);
3215         if (ret < 0)
3216                 return ret;
3217
3218         return count;
3219 }
3220 static DEVICE_ATTR(reset_controller, S_IWUSR, NULL, nvme_sysfs_reset);
3221
3222 static int nvme_probe(struct pci_dev *pdev, const struct pci_device_id *id)
3223 {
3224         int node, result = -ENOMEM;
3225         struct nvme_dev *dev;
3226
3227         node = dev_to_node(&pdev->dev);
3228         if (node == NUMA_NO_NODE)
3229                 set_dev_node(&pdev->dev, 0);
3230
3231         dev = kzalloc_node(sizeof(*dev), GFP_KERNEL, node);
3232         if (!dev)
3233                 return -ENOMEM;
3234         dev->entry = kzalloc_node(num_possible_cpus() * sizeof(*dev->entry),
3235                                                         GFP_KERNEL, node);
3236         if (!dev->entry)
3237                 goto free;
3238         dev->queues = kzalloc_node((num_possible_cpus() + 1) * sizeof(void *),
3239                                                         GFP_KERNEL, node);
3240         if (!dev->queues)
3241                 goto free;
3242
3243         INIT_LIST_HEAD(&dev->namespaces);
3244         INIT_WORK(&dev->reset_work, nvme_reset_work);
3245         dev->dev = get_device(&pdev->dev);
3246         pci_set_drvdata(pdev, dev);
3247         result = nvme_set_instance(dev);
3248         if (result)
3249                 goto put_pci;
3250
3251         result = nvme_setup_prp_pools(dev);
3252         if (result)
3253                 goto release;
3254
3255         kref_init(&dev->kref);
3256         dev->device = device_create(nvme_class, &pdev->dev,
3257                                 MKDEV(nvme_char_major, dev->instance),
3258                                 dev, "nvme%d", dev->instance);
3259         if (IS_ERR(dev->device)) {
3260                 result = PTR_ERR(dev->device);
3261                 goto release_pools;
3262         }
3263         get_device(dev->device);
3264         dev_set_drvdata(dev->device, dev);
3265
3266         result = device_create_file(dev->device, &dev_attr_reset_controller);
3267         if (result)
3268                 goto put_dev;
3269
3270         INIT_LIST_HEAD(&dev->node);
3271         INIT_WORK(&dev->scan_work, nvme_dev_scan);
3272         INIT_WORK(&dev->probe_work, nvme_probe_work);
3273         schedule_work(&dev->probe_work);
3274         return 0;
3275
3276  put_dev:
3277         device_destroy(nvme_class, MKDEV(nvme_char_major, dev->instance));
3278         put_device(dev->device);
3279  release_pools:
3280         nvme_release_prp_pools(dev);
3281  release:
3282         nvme_release_instance(dev);
3283  put_pci:
3284         put_device(dev->dev);
3285  free:
3286         kfree(dev->queues);
3287         kfree(dev->entry);
3288         kfree(dev);
3289         return result;
3290 }
3291
3292 static void nvme_reset_notify(struct pci_dev *pdev, bool prepare)
3293 {
3294         struct nvme_dev *dev = pci_get_drvdata(pdev);
3295
3296         if (prepare)
3297                 nvme_dev_shutdown(dev);
3298         else
3299                 schedule_work(&dev->probe_work);
3300 }
3301
3302 static void nvme_shutdown(struct pci_dev *pdev)
3303 {
3304         struct nvme_dev *dev = pci_get_drvdata(pdev);
3305         nvme_dev_shutdown(dev);
3306 }
3307
3308 static void nvme_remove(struct pci_dev *pdev)
3309 {
3310         struct nvme_dev *dev = pci_get_drvdata(pdev);
3311
3312         spin_lock(&dev_list_lock);
3313         list_del_init(&dev->node);
3314         spin_unlock(&dev_list_lock);
3315
3316         pci_set_drvdata(pdev, NULL);
3317         flush_work(&dev->probe_work);
3318         flush_work(&dev->reset_work);
3319         flush_work(&dev->scan_work);
3320         device_remove_file(dev->device, &dev_attr_reset_controller);
3321         nvme_dev_remove(dev);
3322         nvme_dev_shutdown(dev);
3323         nvme_dev_remove_admin(dev);
3324         device_destroy(nvme_class, MKDEV(nvme_char_major, dev->instance));
3325         nvme_free_queues(dev, 0);
3326         nvme_release_cmb(dev);
3327         nvme_release_prp_pools(dev);
3328         kref_put(&dev->kref, nvme_free_dev);
3329 }
3330
3331 /* These functions are yet to be implemented */
3332 #define nvme_error_detected NULL
3333 #define nvme_dump_registers NULL
3334 #define nvme_link_reset NULL
3335 #define nvme_slot_reset NULL
3336 #define nvme_error_resume NULL
3337
3338 #ifdef CONFIG_PM_SLEEP
3339 static int nvme_suspend(struct device *dev)
3340 {
3341         struct pci_dev *pdev = to_pci_dev(dev);
3342         struct nvme_dev *ndev = pci_get_drvdata(pdev);
3343
3344         nvme_dev_shutdown(ndev);
3345         return 0;
3346 }
3347
3348 static int nvme_resume(struct device *dev)
3349 {
3350         struct pci_dev *pdev = to_pci_dev(dev);
3351         struct nvme_dev *ndev = pci_get_drvdata(pdev);
3352
3353         schedule_work(&ndev->probe_work);
3354         return 0;
3355 }
3356 #endif
3357
3358 static SIMPLE_DEV_PM_OPS(nvme_dev_pm_ops, nvme_suspend, nvme_resume);
3359
3360 static const struct pci_error_handlers nvme_err_handler = {
3361         .error_detected = nvme_error_detected,
3362         .mmio_enabled   = nvme_dump_registers,
3363         .link_reset     = nvme_link_reset,
3364         .slot_reset     = nvme_slot_reset,
3365         .resume         = nvme_error_resume,
3366         .reset_notify   = nvme_reset_notify,
3367 };
3368
3369 /* Move to pci_ids.h later */
3370 #define PCI_CLASS_STORAGE_EXPRESS       0x010802
3371
3372 static const struct pci_device_id nvme_id_table[] = {
3373         { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_EXPRESS, 0xffffff) },
3374         { 0, }
3375 };
3376 MODULE_DEVICE_TABLE(pci, nvme_id_table);
3377
3378 static struct pci_driver nvme_driver = {
3379         .name           = "nvme",
3380         .id_table       = nvme_id_table,
3381         .probe          = nvme_probe,
3382         .remove         = nvme_remove,
3383         .shutdown       = nvme_shutdown,
3384         .driver         = {
3385                 .pm     = &nvme_dev_pm_ops,
3386         },
3387         .err_handler    = &nvme_err_handler,
3388 };
3389
3390 static int __init nvme_init(void)
3391 {
3392         int result;
3393
3394         init_waitqueue_head(&nvme_kthread_wait);
3395
3396         nvme_workq = create_singlethread_workqueue("nvme");
3397         if (!nvme_workq)
3398                 return -ENOMEM;
3399
3400         result = register_blkdev(nvme_major, "nvme");
3401         if (result < 0)
3402                 goto kill_workq;
3403         else if (result > 0)
3404                 nvme_major = result;
3405
3406         result = __register_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme",
3407                                                         &nvme_dev_fops);
3408         if (result < 0)
3409                 goto unregister_blkdev;
3410         else if (result > 0)
3411                 nvme_char_major = result;
3412
3413         nvme_class = class_create(THIS_MODULE, "nvme");
3414         if (IS_ERR(nvme_class)) {
3415                 result = PTR_ERR(nvme_class);
3416                 goto unregister_chrdev;
3417         }
3418
3419         result = pci_register_driver(&nvme_driver);
3420         if (result)
3421                 goto destroy_class;
3422         return 0;
3423
3424  destroy_class:
3425         class_destroy(nvme_class);
3426  unregister_chrdev:
3427         __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme");
3428  unregister_blkdev:
3429         unregister_blkdev(nvme_major, "nvme");
3430  kill_workq:
3431         destroy_workqueue(nvme_workq);
3432         return result;
3433 }
3434
3435 static void __exit nvme_exit(void)
3436 {
3437         pci_unregister_driver(&nvme_driver);
3438         unregister_blkdev(nvme_major, "nvme");
3439         destroy_workqueue(nvme_workq);
3440         class_destroy(nvme_class);
3441         __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme");
3442         BUG_ON(nvme_thread && !IS_ERR(nvme_thread));
3443         _nvme_check_size();
3444 }
3445
3446 MODULE_AUTHOR("Matthew Wilcox <willy@linux.intel.com>");
3447 MODULE_LICENSE("GPL");
3448 MODULE_VERSION("1.0");
3449 module_init(nvme_init);
3450 module_exit(nvme_exit);