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[karo-tx-linux.git] / sound / firewire / digi00x / digi00x.h
1 /*
2  * digi00x.h - a part of driver for Digidesign Digi 002/003 family
3  *
4  * Copyright (c) 2014-2015 Takashi Sakamoto
5  *
6  * Licensed under the terms of the GNU General Public License, version 2.
7  */
8
9 #ifndef SOUND_DIGI00X_H_INCLUDED
10 #define SOUND_DIGI00X_H_INCLUDED
11
12 #include <linux/compat.h>
13 #include <linux/device.h>
14 #include <linux/firewire.h>
15 #include <linux/module.h>
16 #include <linux/mod_devicetable.h>
17 #include <linux/delay.h>
18 #include <linux/slab.h>
19
20 #include <sound/core.h>
21 #include <sound/initval.h>
22 #include <sound/info.h>
23 #include <sound/pcm.h>
24 #include <sound/pcm_params.h>
25 #include <sound/firewire.h>
26 #include <sound/hwdep.h>
27 #include <sound/rawmidi.h>
28
29 #include "../lib.h"
30 #include "../iso-resources.h"
31 #include "../amdtp-stream.h"
32
33 struct snd_dg00x {
34         struct snd_card *card;
35         struct fw_unit *unit;
36
37         struct mutex mutex;
38         spinlock_t lock;
39
40         struct amdtp_stream tx_stream;
41         struct fw_iso_resources tx_resources;
42
43         struct amdtp_stream rx_stream;
44         struct fw_iso_resources rx_resources;
45
46         unsigned int substreams_counter;
47
48         /* for uapi */
49         int dev_lock_count;
50         bool dev_lock_changed;
51         wait_queue_head_t hwdep_wait;
52
53         /* For asynchronous messages. */
54         struct fw_address_handler async_handler;
55         u32 msg;
56
57         /* For asynchronous MIDI controls. */
58         struct snd_rawmidi_substream *in_control;
59         struct snd_fw_async_midi_port out_control;
60 };
61
62 #define DG00X_ADDR_BASE         0xffffe0000000ull
63
64 #define DG00X_OFFSET_STREAMING_STATE    0x0000
65 #define DG00X_OFFSET_STREAMING_SET      0x0004
66 #define DG00X_OFFSET_MIDI_CTL_ADDR      0x0008
67 /* For LSB of the address               0x000c */
68 /* unknown                              0x0010 */
69 #define DG00X_OFFSET_MESSAGE_ADDR       0x0014
70 /* For LSB of the address               0x0018 */
71 /* unknown                              0x001c */
72 /* unknown                              0x0020 */
73 /* not used                     0x0024--0x00ff */
74 #define DG00X_OFFSET_ISOC_CHANNELS      0x0100
75 /* unknown                              0x0104 */
76 /* unknown                              0x0108 */
77 /* unknown                              0x010c */
78 #define DG00X_OFFSET_LOCAL_RATE         0x0110
79 #define DG00X_OFFSET_EXTERNAL_RATE      0x0114
80 #define DG00X_OFFSET_CLOCK_SOURCE       0x0118
81 #define DG00X_OFFSET_OPT_IFACE_MODE     0x011c
82 /* unknown                              0x0120 */
83 /* Mixer control on/off                 0x0124 */
84 /* unknown                              0x0128 */
85 #define DG00X_OFFSET_DETECT_EXTERNAL    0x012c
86 /* unknown                              0x0138 */
87 #define DG00X_OFFSET_MMC                0x0400
88
89 enum snd_dg00x_rate {
90         SND_DG00X_RATE_44100 = 0,
91         SND_DG00X_RATE_48000,
92         SND_DG00X_RATE_88200,
93         SND_DG00X_RATE_96000,
94         SND_DG00X_RATE_COUNT,
95 };
96
97 enum snd_dg00x_clock {
98         SND_DG00X_CLOCK_INTERNAL = 0,
99         SND_DG00X_CLOCK_SPDIF,
100         SND_DG00X_CLOCK_ADAT,
101         SND_DG00X_CLOCK_WORD,
102         SND_DG00X_CLOCK_COUNT,
103 };
104
105 enum snd_dg00x_optical_mode {
106         SND_DG00X_OPT_IFACE_MODE_ADAT = 0,
107         SND_DG00X_OPT_IFACE_MODE_SPDIF,
108         SND_DG00X_OPT_IFACE_MODE_COUNT,
109 };
110
111 #define DOT_MIDI_IN_PORTS       1
112 #define DOT_MIDI_OUT_PORTS      2
113
114 int amdtp_dot_init(struct amdtp_stream *s, struct fw_unit *unit,
115                    enum amdtp_stream_direction dir);
116 int amdtp_dot_set_parameters(struct amdtp_stream *s, unsigned int rate,
117                              unsigned int pcm_channels);
118 void amdtp_dot_reset(struct amdtp_stream *s);
119 int amdtp_dot_add_pcm_hw_constraints(struct amdtp_stream *s,
120                                      struct snd_pcm_runtime *runtime);
121 void amdtp_dot_set_pcm_format(struct amdtp_stream *s, snd_pcm_format_t format);
122 void amdtp_dot_midi_trigger(struct amdtp_stream *s, unsigned int port,
123                           struct snd_rawmidi_substream *midi);
124
125 int snd_dg00x_transaction_register(struct snd_dg00x *dg00x);
126 int snd_dg00x_transaction_reregister(struct snd_dg00x *dg00x);
127 void snd_dg00x_transaction_unregister(struct snd_dg00x *dg00x);
128
129 extern const unsigned int snd_dg00x_stream_rates[SND_DG00X_RATE_COUNT];
130 extern const unsigned int snd_dg00x_stream_pcm_channels[SND_DG00X_RATE_COUNT];
131 int snd_dg00x_stream_get_external_rate(struct snd_dg00x *dg00x,
132                                        unsigned int *rate);
133 int snd_dg00x_stream_get_local_rate(struct snd_dg00x *dg00x,
134                                     unsigned int *rate);
135 int snd_dg00x_stream_set_local_rate(struct snd_dg00x *dg00x, unsigned int rate);
136 int snd_dg00x_stream_get_clock(struct snd_dg00x *dg00x,
137                                enum snd_dg00x_clock *clock);
138 int snd_dg00x_stream_check_external_clock(struct snd_dg00x *dg00x,
139                                           bool *detect);
140 int snd_dg00x_stream_init_duplex(struct snd_dg00x *dg00x);
141 int snd_dg00x_stream_start_duplex(struct snd_dg00x *dg00x, unsigned int rate);
142 void snd_dg00x_stream_stop_duplex(struct snd_dg00x *dg00x);
143 void snd_dg00x_stream_update_duplex(struct snd_dg00x *dg00x);
144 void snd_dg00x_stream_destroy_duplex(struct snd_dg00x *dg00x);
145
146 void snd_dg00x_stream_lock_changed(struct snd_dg00x *dg00x);
147 int snd_dg00x_stream_lock_try(struct snd_dg00x *dg00x);
148 void snd_dg00x_stream_lock_release(struct snd_dg00x *dg00x);
149
150 void snd_dg00x_proc_init(struct snd_dg00x *dg00x);
151
152 int snd_dg00x_create_pcm_devices(struct snd_dg00x *dg00x);
153
154 int snd_dg00x_create_midi_devices(struct snd_dg00x *dg00x);
155
156 int snd_dg00x_create_hwdep_device(struct snd_dg00x *dg00x);
157 #endif