We want the staging fixes here as well.
M: Guan Xuetao <gxt@mprc.pku.edu.cn>
W: http://mprc.pku.edu.cn/~guanxuetao/linux
S: Maintained
- T: git git://git.kernel.org/pub/scm/linux/kernel/git/epip/linux-2.6-unicore32.git
+ T: git git://github.com/gxt/linux.git
F: drivers/input/serio/i8042-unicore32io.h
F: drivers/i2c/busses/i2c-puv3.c
F: drivers/video/fb-puv3.c
SECURITY SUBSYSTEM
M: James Morris <james.l.morris@oracle.com>
+ M: Serge E. Hallyn <serge@hallyn.com>
L: linux-security-module@vger.kernel.org (suggested Cc:)
T: git git://git.kernel.org/pub/scm/linux/kernel/git/jmorris/linux-security.git
W: http://kernsec.org/
S: Odd Fixes
F: drivers/staging/comedi/
-STAGING - CRYSTAL HD VIDEO DECODER
-M: Naren Sankar <nsankar@broadcom.com>
-M: Jarod Wilson <jarod@wilsonet.com>
-M: Scott Davilla <davilla@4pi.com>
-M: Manu Abraham <abraham.manu@gmail.com>
-S: Odd Fixes
-F: drivers/staging/crystalhd/
-
STAGING - ECHO CANCELLER
M: Steve Underwood <steveu@coppice.org>
M: David Rowe <david@rowetel.com>
M: Guan Xuetao <gxt@mprc.pku.edu.cn>
W: http://mprc.pku.edu.cn/~guanxuetao/linux
S: Maintained
- T: git git://git.kernel.org/pub/scm/linux/kernel/git/epip/linux-2.6-unicore32.git
+ T: git git://github.com/gxt/linux.git
F: arch/unicore32/
UNIFDEF
S: Supported
F: arch/x86/kernel/cpu/vmware.c
+ VMWARE BALLOON DRIVER
+ M: Xavier Deguillard <xdeguillard@vmware.com>
+ M: Philip Moltmann <moltmann@vmware.com>
+ M: "VMware, Inc." <pv-drivers@vmware.com>
+ L: linux-kernel@vger.kernel.org
+ S: Maintained
+ F: drivers/misc/vmw_balloon.c
+
VMWARE VMXNET3 ETHERNET DRIVER
M: Shreyas Bhatewara <sbhatewara@vmware.com>
M: "VMware, Inc." <pv-drivers@vmware.com>
if (iio_buffer_enabled(idev)) {
disable_irq_nosync(irq);
- iio_trigger_poll(idev->trig, iio_get_time_ns());
+ iio_trigger_poll(idev->trig);
} else {
st->last_value = at91_adc_readl(st, AT91_ADC_LCDR);
st->done = true;
return idev->num_channels;
}
- static u8 at91_adc_get_trigger_value_by_name(struct iio_dev *idev,
+ static int at91_adc_get_trigger_value_by_name(struct iio_dev *idev,
struct at91_adc_trigger *triggers,
const char *trigger_name)
{
struct at91_adc_state *st = iio_priv(idev);
- u8 value = 0;
int i;
for (i = 0; i < st->trigger_number; i++) {
return -ENOMEM;
if (strcmp(trigger_name, name) == 0) {
- value = triggers[i].value;
kfree(name);
- break;
+ if (triggers[i].value == 0)
+ return -EINVAL;
+ return triggers[i].value;
}
kfree(name);
}
- return value;
+ return -EINVAL;
}
static int at91_adc_configure_trigger(struct iio_trigger *trig, bool state)
struct iio_buffer *buffer = idev->buffer;
struct at91_adc_reg_desc *reg = st->registers;
u32 status = at91_adc_readl(st, reg->trigger_register);
- u8 value;
+ int value;
u8 bit;
value = at91_adc_get_trigger_value_by_name(idev,
st->trigger_list,
idev->trig->name);
- if (value == 0)
- return -EINVAL;
+ if (value < 0)
+ return value;
if (state) {
st->buffer = kmalloc(idev->scan_bytes, GFP_KERNEL);
support driver.
Supported boards include:
- Advantech PCL-724 24 channels
- Advantech PCL-722 144 (or 96) channels
- Advantech PCL-731 48 channels
- ADlink ACL-7122 144 (or 96) channels
- ADlink ACL-7124 24 channels
- ADlink PET-48DIO 48 channels
- WinSystems PCM-IO48 48 channels (PC/104)
+ Advantech PCL-724 24 channels
+ Advantech PCL-722 144 (or 96) channels
+ Advantech PCL-731 48 channels
+ ADlink ACL-7122 144 (or 96) channels
+ ADlink ACL-7124 24 channels
+ ADlink PET-48DIO 48 channels
+ WinSystems PCM-IO48 48 channels (PC/104)
+ Diamond Systems ONYX-MM-DIO 48 channels (PC/104)
To compile this driver as a module, choose M here: the module will be
called pcl724.
Advantech PCL-734 iso - 32 out
Diamond Systems OPMM-1616-XT iso - 16 in/16 out
Diamond Systems PEARL-MM-P iso - 16 out
+ Diamond Systems IR104-PBF iso - 20 in/20 out
To compile this driver as a module, choose M here: the module will be
called pcl730.
config COMEDI_ADDI_APCI_1564
tristate "ADDI-DATA APCI_1564 support"
+ select COMEDI_ADDI_WATCHDOG
---help---
Enable support for ADDI-DATA APCI_1564 cards
LRADC_CTRL1);
mxs_lradc_reg_clear(lradc, 0xff, LRADC_CTRL0);
+ /* Enable / disable the divider per requirement */
+ if (test_bit(chan, &lradc->is_divided))
+ mxs_lradc_reg_set(lradc, 1 << LRADC_CTRL2_DIVIDE_BY_TWO_OFFSET,
+ LRADC_CTRL2);
+ else
+ mxs_lradc_reg_clear(lradc,
+ 1 << LRADC_CTRL2_DIVIDE_BY_TWO_OFFSET, LRADC_CTRL2);
+
/* Clean the slot's previous content, then set new one. */
mxs_lradc_reg_clear(lradc, LRADC_CTRL4_LRADCSELECT_MASK(0),
LRADC_CTRL4);
if (val == scale_avail[MXS_LRADC_DIV_DISABLED].integer &&
val2 == scale_avail[MXS_LRADC_DIV_DISABLED].nano) {
/* divider by two disabled */
- writel(1 << LRADC_CTRL2_DIVIDE_BY_TWO_OFFSET,
- lradc->base + LRADC_CTRL2 + STMP_OFFSET_REG_CLR);
clear_bit(chan->channel, &lradc->is_divided);
ret = 0;
} else if (val == scale_avail[MXS_LRADC_DIV_ENABLED].integer &&
val2 == scale_avail[MXS_LRADC_DIV_ENABLED].nano) {
/* divider by two enabled */
- writel(1 << LRADC_CTRL2_DIVIDE_BY_TWO_OFFSET,
- lradc->base + LRADC_CTRL2 + STMP_OFFSET_REG_SET);
set_bit(chan->channel, &lradc->is_divided);
ret = 0;
}
mxs_lradc_handle_touch(lradc);
if (iio_buffer_enabled(iio))
- iio_trigger_poll(iio->trig, iio_get_time_ns());
+ iio_trigger_poll(iio->trig);
else if (reg & LRADC_CTRL1_LRADC_IRQ(0))
complete(&lradc->completion);