packages/devs/eth/arm/netarm/v2_0/src/eth_regs.h

   1 #ifndef CYGONCE_DEVS_ETH_ARM_NETARM_ETH_REGS_H
   2 #define CYGONCE_DEVS_ETH_ARM_NETARM_ETH_REGS_H
   3
   4 // ====================================================================
   5 //
   6 //      eth_regs.h
   7 //
   8 //      Address mappings for ethernet and DMA controller registers
   9 //
  10 // ====================================================================
  11 //####ECOSGPLCOPYRIGHTBEGIN####
  12 // -------------------------------------------
  13 // This file is part of eCos, the Embedded Configurable Operating System.
  14 // Copyright (C) 2005 eCosCentric Ltd.
  15 //
  16 // eCos is free software; you can redistribute it and/or modify it under
  17 // the terms of the GNU General Public License as published by the Free
  18 // Software Foundation; either version 2 or (at your option) any later version.
  19 //
  20 // eCos is distributed in the hope that it will be useful, but WITHOUT ANY
  21 // WARRANTY; without even the implied warranty of MERCHANTABILITY or
  22 // FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  23 // for more details.
  24 //
  25 // You should have received a copy of the GNU General Public License along
  26 // with eCos; if not, write to the Free Software Foundation, Inc.,
  27 // 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
  28 //
  29 // As a special exception, if other files instantiate templates or use macros
  30 // or inline functions from this file, or you compile this file and link it
  31 // with other works to produce a work based on this file, this file does not
  32 // by itself cause the resulting work to be covered by the GNU General Public
  33 // License. However the source code for this file must still be made available
  34 // in accordance with section (3) of the GNU General Public License.
  35 //
  36 // This exception does not invalidate any other reasons why a work based on
  37 // this file might be covered by the GNU General Public License.
  38 //
  39 //####ECOSGPLCOPYRIGHTEND####
  40 // ====================================================================
  41 //#####DESCRIPTIONBEGIN####
  42 //
  43 // Author(s):           Harald Brandl (harald.brandl@fh-joanneum.at)
  44 // Contributors:        Harald Brandl
  45 // Date:                01.08.2004
  46 // Purpose:             Ethernet and DMA controller registers
  47 // Description:
  48 //
  49 //####DESCRIPTIONEND####
  50 //
  51 // ====================================================================
  52
  53 #include <cyg/infra/cyg_type.h>
  54 #include <cyg/hal/hal_io.h>
  55
  56
  57 #ifndef HAL_OR_UINT32
  58 #define HAL_OR_UINT32( _register_, _value_ ) \
  59         CYG_MACRO_START                      \
  60         cyg_uint32 _i_;                      \
  61         HAL_READ_UINT32( _register_, _i_ );  \
  62         _i_ |= _value_;                        \
  63         HAL_WRITE_UINT32( _register_, _i_ ); \
  64         CYG_MACRO_END
  65 #endif
  66
  67 #ifndef HAL_AND_UINT32
  68 #define HAL_AND_UINT32( _register_, _value_ ) \
  69         CYG_MACRO_START                      \
  70         cyg_uint32 _i_;                      \
  71         HAL_READ_UINT32( _register_, _i_ );  \
  72         _i_ &= _value_;                        \
  73         HAL_WRITE_UINT32( _register_, _i_ ); \
  74         CYG_MACRO_END
  75 #endif
  76
  77 // Ethernet
  78
  79 #define EthGenCR                         (unsigned *)0xff800000
  80 #define EthGenSR                         (unsigned *)0xff800004
  81 #define EthFIFODR                        (unsigned *)0xff800008
  82 #define EthFIFODRkickoff         (unsigned *)0xff80000c
  83 #define EthTxSR                          (unsigned *)0xff800010
  84 #define EthRxSR                          (unsigned *)0xff800014
  85 #define MACCR                            (unsigned *)0xff800400
  86 #define MACTR                            (unsigned *)0xff800404
  87 #define PCSCR                            (unsigned *)0xff800408
  88 #define PCSTR                            (unsigned *)0xff80040c
  89 #define STLCR                            (unsigned *)0xff800410
  90 #define STLTR                            (unsigned *)0xff800414
  91 #define BtBIPGGapTimerR          (unsigned *)0xff800440
  92 #define NonBtBIPGGapTimerR       (unsigned *)0xff800444
  93 #define CollWinR                         (unsigned *)0xff800448
  94 #define TxPNCR                           (unsigned *)0xff800460
  95 #define TxBCR                            (unsigned *)0xff800464
  96 #define ReTxBCR                          (unsigned *)0xff800468
  97 #define TxRNG                            (unsigned *)0xff80046c
  98 #define TxMRN                            (unsigned *)0xff800470
  99 #define TxCDec                           (unsigned *)0xff800474
 100 #define TOTxC                            (unsigned *)0xff800478
 101 #define RxBC                             (unsigned *)0xff800480
 102 #define RxCDec                           (unsigned *)0xff800484
 103 #define TORxC                            (unsigned *)0xff800488
 104 #define LnFC                             (unsigned *)0xff8004c0
 105 #define JC10M                            (unsigned *)0xff800500
 106 #define LoCC10M                          (unsigned *)0xff800504
 107 #define MIICR                            (unsigned *)0xff800540
 108 #define MIIAR                            (unsigned *)0xff800544
 109 #define MIIWDR                           (unsigned *)0xff800548
 110 #define MIIRDR                           (unsigned *)0xff80054c
 111 #define MIIIR                            (unsigned *)0xff800550
 112 #define CRCEC                            (unsigned *)0xff800580
 113 #define AEC                              (unsigned *)0xff800584
 114 #define CEC                              (unsigned *)0xff800588
 115 #define LFC                              (unsigned *)0xff80058c
 116 #define SFC                              (unsigned *)0xff800590
 117 #define LCC                              (unsigned *)0xff800594
 118 #define EDC                              (unsigned *)0xff800598
 119 #define MCC                              (unsigned *)0xff80059c
 120 #define SAFR                             (unsigned *)0xff8005c0
 121 #define SAR1                             (unsigned *)0xff8005c4
 122 #define SAR2                             (unsigned *)0xff8005c8
 123 #define SAR3                             (unsigned *)0xff8005cc
 124 #define SAMHT1                           (unsigned *)0xff8005d0
 125 #define SAMHT2                           (unsigned *)0xff8005d4
 126 #define SAMHT3                           (unsigned *)0xff8005d8
 127 #define SAMHT4                           (unsigned *)0xff8005dc
 128
 129 // DMA
 130
 131 #define DMA1A_BDP       (unsigned *)0xff900000
 132 #define DMA1A_CR        (unsigned *)0xff900010
 133 #define DMA1A_SR        (unsigned *)0xff900014
 134 #define DMA1B_BDP       (unsigned *)0xff900020
 135 #define DMA1B_CR        (unsigned *)0xff900030
 136 #define DMA1B_SR        (unsigned *)0xff900034
 137 #define DMA1C_BDP       (unsigned *)0xff900040
 138 #define DMA1C_CR        (unsigned *)0xff900050
 139 #define DMA1C_SR        (unsigned *)0xff900054
 140 #define DMA1D_BDP       (unsigned *)0xff900060
 141 #define DMA1D_CR        (unsigned *)0xff900070
 142 #define DMA1D_SR        (unsigned *)0xff900074
 143 #define DMA2_BDP        (unsigned *)0xff900080
 144 #define DMA2_CR         (unsigned *)0xff900090
 145 #define DMA2_SR         (unsigned *)0xff900094
 146
 147 #endif  // CYGONCE_DEVS_ETH_ARM_NETARM_ETH_REGS_H