1 //==========================================================================
3 // devs_eth_sh_se77x9.inl
5 // SE77X9 ethernet I/O definitions.
7 //==========================================================================
8 //####ECOSGPLCOPYRIGHTBEGIN####
9 // -------------------------------------------
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38 // -------------------------------------------
39 //####ECOSGPLCOPYRIGHTEND####
40 //==========================================================================
41 //#####DESCRIPTIONBEGIN####
46 // Purpose: SE77X9 ethernet defintions
48 // FIXME: M17 contains an EPROM. May contain the ESA, but don't
49 // know how to access it.
51 //####DESCRIPTIONEND####
52 //==========================================================================
54 #include <cyg/hal/hal_intr.h> // CYGNUM_HAL_INTERRUPT_ETHR
55 #include <cyg/hal/hal_if.h>
61 #define CYGHWR_NS_DP83902A_PLF_RESET(_dp_) \
63 HAL_WRITE_UINT16(_dp_->reset, 0x0000); \
64 CYGACC_CALL_IF_DELAY_US(10); \
65 HAL_WRITE_UINT16(_dp_->reset, 0x0100); \
68 #define DP_IN(_b_, _o_, _d_) \
71 HAL_READ_UINT16 ((cyg_addrword_t)(_b_)+2*(_o_), _t); \
72 (_d_) = (_t >> 8) & 0xff; \
75 #define DP_OUT(_b_, _o_, _d_) \
77 HAL_WRITE_UINT16((cyg_addrword_t)(_b_)+2*(_o_), (_d_)<<8); \
80 #define DP_IN_DATA(_b_, _d_) \
83 HAL_READ_UINT16 ((cyg_addrword_t)(_b_), _t); \
84 (_d_) = ((_t >> 8) & 0xff) | ((_t & 0xff) << 8); \
87 #define DP_OUT_DATA(_b_, _d_) \
91 (_t) = (((_t) >> 8) & 0xff) | ((_t & 0xff) << 8); \
92 HAL_WRITE_UINT16((cyg_addrword_t)(_b_), _t); \
95 #define CYGHWR_NS_DP83902A_PLF_16BIT_DATA
96 #define CYGHWR_NS_DP83902A_PLF_BROKEN_TX_DMA
98 #endif // __WANT_CONFIG
103 #ifdef CYGPKG_DEVS_ETH_SH_SE77X9_ETH0
105 static dp83902a_priv_data_t dp83902a_eth0_priv_data = {
106 base : (cyg_uint8*) 0xb0000000,
107 data : (cyg_uint8*) 0xb0040000,
108 reset: (cyg_uint8*) 0xb0080000,
109 interrupt: CYGNUM_HAL_INTERRUPT_LAN,
114 #ifdef CYGSEM_DEVS_ETH_SH_SE77X9_ETH0_SET_ESA
115 esa : CYGDAT_DEVS_ETH_SH_SE77X9_ETH0_ESA,
116 hardwired_esa : true,
118 hardwired_esa : false,
122 ETH_DRV_SC(dp83902a_sc,
123 &dp83902a_eth0_priv_data, // Driver specific data
124 CYGDAT_DEVS_ETH_SH_SE77X9_ETH0_NAME,
131 dp83902a_deliver, // "pseudoDSR" called from fast net thread
132 dp83902a_poll, // poll function, encapsulates ISR and DSR
133 dp83902a_int_vector);
135 NETDEVTAB_ENTRY(dp83902a_netdev,
136 "dp83902a_" CYGDAT_DEVS_ETH_SH_SE77X9_ETH0_NAME,
139 #endif // CYGPKG_DEVS_ETH_SH_SE77X9_ETH0
141 #endif // __WANT_DEVS
143 // EOF devs_eth_sh_se77x9.inl