1 #ifndef CYGONCE_ARM_SA11X0_SERIAL_H
2 #define CYGONCE_ARM_SA11X0_SERIAL_H
4 // ====================================================================
8 // Device I/O - Description of StrongARM SA11x0 serial hardware
10 // ====================================================================
11 //####ECOSGPLCOPYRIGHTBEGIN####
12 // -------------------------------------------
13 // This file is part of eCos, the Embedded Configurable Operating System.
14 // Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
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21 // WARRANTY; without even the implied warranty of MERCHANTABILITY or
22 // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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27 // 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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30 // or inline functions from this file, or you compile this file and link it
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33 // License. However the source code for this file must still be made available
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41 // -------------------------------------------
42 //####ECOSGPLCOPYRIGHTEND####
43 // ====================================================================
44 //#####DESCRIPTIONBEGIN####
47 // Contributors: gthomas
49 // Purpose: Internal interfaces for serial I/O drivers
52 //####DESCRIPTIONEND####
54 // ====================================================================
56 // Description of serial ports on StrongARM SA11x0
58 #include <cyg/hal/hal_sa11x0.h> // Register definitions
61 unsigned long ctl0; // 0x00
62 unsigned long ctl1; // 0x04
63 unsigned long ctl2; // 0x08
64 unsigned long ctl3; // 0x0C
65 unsigned long _unused0;
66 unsigned long data; // 0x14
67 unsigned long _unused1;
68 unsigned long stat0; // 0x1C
69 unsigned long stat1; // 0x20
72 #define SA11X0_UART_RX_INTS (SA11X0_UART_RX_SERVICE_REQUEST|SA11X0_UART_RX_IDLE)
74 static unsigned char select_word_length[] = {
75 0xFF, // 5 bits / word (char)
77 SA11X0_UART_DATA_BITS_7,
78 SA11X0_UART_DATA_BITS_8
81 static unsigned char select_stop_bits[] = {
83 SA11X0_UART_STOP_BITS_1, // 1 stop bit
85 SA11X0_UART_STOP_BITS_2 // 2 stop bits
88 static unsigned char select_parity[] = {
89 SA11X0_UART_PARITY_DISABLED, // No parity
90 SA11X0_UART_PARITY_ENABLED| // Even parity
91 SA11X0_UART_PARITY_EVEN,
92 SA11X0_UART_PARITY_ENABLED| // Odd parity
93 SA11X0_UART_PARITY_ODD,
98 static cyg_int32 select_baud[] = {
123 #endif // CYGONCE_ARM_SA11X0_SERIAL_H