1 //==========================================================================
5 // HAL misc board support code for ARM9
7 //==========================================================================
8 //####ECOSGPLCOPYRIGHTBEGIN####
9 // -------------------------------------------
10 // This file is part of eCos, the Embedded Configurable Operating System.
11 // Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
13 // eCos is free software; you can redistribute it and/or modify it under
14 // the terms of the GNU General Public License as published by the Free
15 // Software Foundation; either version 2 or (at your option) any later version.
17 // eCos is distributed in the hope that it will be useful, but WITHOUT ANY
18 // WARRANTY; without even the implied warranty of MERCHANTABILITY or
19 // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
22 // You should have received a copy of the GNU General Public License along
23 // with eCos; if not, write to the Free Software Foundation, Inc.,
24 // 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
26 // As a special exception, if other files instantiate templates or use macros
27 // or inline functions from this file, or you compile this file and link it
28 // with other works to produce a work based on this file, this file does not
29 // by itself cause the resulting work to be covered by the GNU General Public
30 // License. However the source code for this file must still be made available
31 // in accordance with section (3) of the GNU General Public License.
33 // This exception does not invalidate any other reasons why a work based on
34 // this file might be covered by the GNU General Public License.
36 // Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
37 // at http://sources.redhat.com/ecos/ecos-license/
38 // -------------------------------------------
39 //####ECOSGPLCOPYRIGHTEND####
40 //==========================================================================
41 //#####DESCRIPTIONBEGIN####
44 // Contributors: jskov
46 // Purpose: HAL board support
47 // Description: Implementations of HAL board interfaces
49 //####DESCRIPTIONEND####
51 //========================================================================*/
53 #include <pkgconf/hal.h>
54 #include <pkgconf/system.h>
55 #include CYGBLD_HAL_PLATFORM_H
57 #include <cyg/infra/cyg_type.h> // base types
59 #include <cyg/hal/hal_if.h> // HAL ROM/if
60 #include <cyg/hal/hal_io.h> // IO macros
61 #include <cyg/hal/hal_cache.h>
63 // Most initialization has already been done before we get here.
64 // All we do here is enable the caches.
66 externC void plf_hardware_init(void);
68 void hal_hardware_init(void)
70 // Perform any platform specific initializations
73 // Set up eCos/ROM interfaces
76 #ifndef CYG_HAL_STARTUP_RAM
78 HAL_DCACHE_INVALIDATE_ALL();
79 HAL_ICACHE_INVALIDATE_ALL();
82 #ifdef CYGSEM_HAL_ENABLE_DCACHE_ON_STARTUP
85 #ifdef CYGSEM_HAL_ENABLE_ICACHE_ON_STARTUP
91 cyg_hal_arm9_soft_reset(CYG_ADDRESS entry)
94 /* It would probably make more sense to have the
95 clear/drain/invalidate after disabling the cache and MMU, but
96 then we'd have to know the (unmapped) address of this code. */
97 asm volatile ("mrs r1,cpsr;"
98 "bic r1,r1,#0x1F;" /* Put processor in SVC mode */
103 "mcr p15,0,r1,c7,c7,0;" /* clear I+DCache */
104 "mcr p15,0,r1,c7,c10,4;" /* Drain Write Buffer */
105 "mcr p15,0,r1,c8,c7,0;" /* Invalidate TLBs */
106 "mrc p15,0,r1,c1,c0,0;"
107 "bic r1,r1,#0x1000;" /* disable ICache */
108 "bic r1,r1,#0x0007;" /* disable DCache, MMU and alignment faults */
109 "mcr p15,0,r1,c1,c0,0;"
111 "mov pc, %0;" /* delay 2 - next instruction should be fetched flat */
112 : : "r" (entry) : "r1");
116 /*------------------------------------------------------------------------*/