1 /*=============================================================================
5 // HAL diagnostic output code
7 //=============================================================================
8 //####ECOSGPLCOPYRIGHTBEGIN####
9 // -------------------------------------------
10 // This file is part of eCos, the Embedded Configurable Operating System.
11 // Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
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14 // the terms of the GNU General Public License as published by the Free
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19 // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
22 // You should have received a copy of the GNU General Public License along
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24 // 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
26 // As a special exception, if other files instantiate templates or use macros
27 // or inline functions from this file, or you compile this file and link it
28 // with other works to produce a work based on this file, this file does not
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30 // License. However the source code for this file must still be made available
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37 // at http://sources.redhat.com/ecos/ecos-license/
38 // -------------------------------------------
39 //####ECOSGPLCOPYRIGHTEND####
40 //=============================================================================
41 //#####DESCRIPTIONBEGIN####
43 // Author(s): nickg, gthomas
44 // Contributors:nickg, gthomas
46 // Purpose: HAL diagnostic output
47 // Description: Implementations of HAL diagnostic output support.
49 //####DESCRIPTIONEND####
51 //===========================================================================*/
53 #include <pkgconf/hal.h>
54 #include <pkgconf/system.h>
55 #include CYGBLD_HAL_PLATFORM_H
57 #include <cyg/infra/cyg_type.h> // base types
58 #include <cyg/infra/cyg_trac.h> // tracing macros
59 #include <cyg/infra/cyg_ass.h> // assertion macros
61 #include <cyg/hal/hal_arch.h> // basic machine info
62 #include <cyg/hal/hal_intr.h> // interrupt macros
63 #include <cyg/hal/hal_io.h> // IO macros
64 #include <cyg/hal/hal_if.h> // calling interface API
65 #include <cyg/hal/hal_misc.h> // helper functions
66 #include <cyg/hal/hal_diag.h>
67 #include <cyg/hal/hal_ebsa285.h> // Hardware definitions
68 #include <cyg/hal/drv_api.h> // cyg_drv_interrupt_acknowledge
70 /*---------------------------------------------------------------------------*/
73 volatile cyg_uint32 data_register;
74 volatile cyg_uint32 rxstat;
75 volatile cyg_uint32 h_baud_control;
76 volatile cyg_uint32 m_baud_control;
77 volatile cyg_uint32 l_baud_control;
78 volatile cyg_uint32 control_register;
79 volatile cyg_uint32 flag_register;
82 /*---------------------------------------------------------------------------*/
85 init_channel(void* __ch_data)
87 volatile struct ebsa_serial* base = (struct ebsa_serial*)__ch_data;
91 * Make sure everything is off
93 base->control_register = SA110_UART_DISABLED | SA110_SIR_DISABLED;
96 * Read the RXStat to drain the fifo
101 * Set the baud rate - this also turns the uart on.
103 * Note that the ordering of these writes is critical,
104 * and the writes to the H_BAUD_CONTROL and CONTROL_REGISTER
105 * are necessary to force the UART to update its register
108 base->l_baud_control = 0x13; // bp->divisor_low;
109 base->m_baud_control = 0x00; // bp->divisor_high;
110 base->h_baud_control = SA110_UART_BREAK_DISABLED |
111 SA110_UART_PARITY_DISABLED |
112 SA110_UART_STOP_BITS_ONE |
113 SA110_UART_FIFO_ENABLED |
114 SA110_UART_DATA_LENGTH_8_BITS;
115 base->control_register = SA110_UART_ENABLED | SA110_SIR_DISABLED;
120 cyg_hal_plf_serial_putc(void *__ch_data, char c)
122 volatile struct ebsa_serial* base = (struct ebsa_serial*)__ch_data;
123 CYGARC_HAL_SAVE_GP();
125 // Wait for Tx FIFO not full
126 while ((base->flag_register & SA110_TX_FIFO_STATUS_MASK) == SA110_TX_FIFO_BUSY)
128 base->data_register = c;
130 CYGARC_HAL_RESTORE_GP();
135 cyg_hal_plf_serial_getc_nonblock(void* __ch_data, cyg_uint8* ch)
137 volatile struct ebsa_serial* base = (struct ebsa_serial*)__ch_data;
140 if ((base->flag_register & SA110_RX_FIFO_STATUS_MASK) == SA110_RX_FIFO_EMPTY)
143 *ch = (char)(base->data_register & 0xFF);
150 cyg_hal_plf_serial_getc(void* __ch_data)
153 CYGARC_HAL_SAVE_GP();
155 while(!cyg_hal_plf_serial_getc_nonblock(__ch_data, &ch));
157 CYGARC_HAL_RESTORE_GP();
161 static cyg_int32 msec_timeout;
164 cyg_hal_plf_serial_write(void* __ch_data, const cyg_uint8* __buf,
167 CYGARC_HAL_SAVE_GP();
170 cyg_hal_plf_serial_putc(__ch_data, *__buf++);
172 CYGARC_HAL_RESTORE_GP();
176 cyg_hal_plf_serial_read(void* __ch_data, cyg_uint8* __buf, cyg_uint32 __len)
178 CYGARC_HAL_SAVE_GP();
181 *__buf++ = cyg_hal_plf_serial_getc(__ch_data);
183 CYGARC_HAL_RESTORE_GP();
187 cyg_hal_plf_serial_getc_timeout(void* __ch_data, cyg_uint8* ch)
191 CYGARC_HAL_SAVE_GP();
193 delay_count = msec_timeout * 10; // delay in .1 ms steps
196 res = cyg_hal_plf_serial_getc_nonblock(__ch_data, ch);
197 if (res || 0 == delay_count--)
200 CYGACC_CALL_IF_DELAY_US(100);
203 CYGARC_HAL_RESTORE_GP();
208 cyg_hal_plf_serial_control(void *__ch_data, __comm_control_cmd_t __func, ...)
210 static int irq_state = 0;
212 CYGARC_HAL_SAVE_GP();
215 case __COMMCTL_IRQ_ENABLE:
218 HAL_INTERRUPT_UNMASK(CYGNUM_HAL_INTERRUPT_SERIAL_RX);
220 case __COMMCTL_IRQ_DISABLE:
224 HAL_INTERRUPT_MASK(CYGNUM_HAL_INTERRUPT_SERIAL_RX);
226 case __COMMCTL_DBG_ISR_VECTOR:
227 ret = CYGNUM_HAL_INTERRUPT_SERIAL_RX;
229 case __COMMCTL_SET_TIMEOUT:
233 va_start(ap, __func);
236 msec_timeout = va_arg(ap, cyg_uint32);
243 CYGARC_HAL_RESTORE_GP();
248 cyg_hal_plf_serial_isr(void *__ch_data, int* __ctrlc,
249 CYG_ADDRWORD __vector, CYG_ADDRWORD __data)
252 volatile struct ebsa_serial* base = (struct ebsa_serial*)__ch_data;
254 CYGARC_HAL_SAVE_GP();
256 if ( CYGNUM_HAL_INTERRUPT_SERIAL_RX == __vector ) {
257 reg = base->flag_register;
258 // read it anyway just in case - no harm done and we might
259 // prevent an interrup loop
260 c = (char)(base->data_register & 0xFF);
262 cyg_drv_interrupt_acknowledge(CYGNUM_HAL_INTERRUPT_SERIAL_RX);
264 if ( (reg & SA110_RX_FIFO_STATUS_MASK) != SA110_RX_FIFO_EMPTY ) {
265 if( cyg_hal_is_break( &c , 1 ) )
269 res = CYG_ISR_HANDLED;
272 CYGARC_HAL_RESTORE_GP();
277 cyg_hal_plf_serial_init(void)
279 hal_virtual_comm_table_t* comm;
280 int cur = CYGACC_CALL_IF_SET_CONSOLE_COMM(CYGNUM_CALL_IF_SET_COMM_ID_QUERY_CURRENT);
283 init_channel((void*)UART_BASE_0);
285 // Setup procs in the vector table
288 CYGACC_CALL_IF_SET_CONSOLE_COMM(0);
289 comm = CYGACC_CALL_IF_CONSOLE_PROCS();
290 CYGACC_COMM_IF_CH_DATA_SET(*comm, UART_BASE_0);
291 CYGACC_COMM_IF_WRITE_SET(*comm, cyg_hal_plf_serial_write);
292 CYGACC_COMM_IF_READ_SET(*comm, cyg_hal_plf_serial_read);
293 CYGACC_COMM_IF_PUTC_SET(*comm, cyg_hal_plf_serial_putc);
294 CYGACC_COMM_IF_GETC_SET(*comm, cyg_hal_plf_serial_getc);
295 CYGACC_COMM_IF_CONTROL_SET(*comm, cyg_hal_plf_serial_control);
296 CYGACC_COMM_IF_DBG_ISR_SET(*comm, cyg_hal_plf_serial_isr);
297 CYGACC_COMM_IF_GETC_TIMEOUT_SET(*comm, cyg_hal_plf_serial_getc_timeout);
299 // Restore original console
300 CYGACC_CALL_IF_SET_CONSOLE_COMM(cur);
304 cyg_hal_plf_comms_init(void)
306 static int initialized = 0;
313 cyg_hal_plf_serial_init();
317 //=============================================================================
318 // Compatibility with older stubs
319 //=============================================================================
321 #ifndef CYGSEM_HAL_VIRTUAL_VECTOR_DIAG
323 #ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
324 #include <cyg/hal/hal_stub.h> // cyg_hal_gdb_interrupt
327 #ifdef CYGSEM_HAL_ROM_MONITOR
328 #define CYG_HAL_STARTUP_ROM
329 #undef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
332 #if defined(CYG_HAL_STARTUP_ROM) || !defined(CYGDBG_HAL_DIAG_TO_DEBUG_CHAN)
333 #define HAL_DIAG_USES_HARDWARE
336 /*---------------------------------------------------------------------------*/
337 // EBSA285 Serial Port (UARTx) for Debug
339 void hal_diag_init(void)
341 init_channel((void*)UART_BASE_0);
345 // Actually send character down the wire
347 hal_diag_write_char_serial(char c)
349 cyg_hal_plf_serial_putc((void*)UART_BASE_0, c);
353 hal_diag_read_serial(char *c)
355 long timeout = 1000000000; // A long time...
356 while (! cyg_hal_plf_serial_getc_nonblock((void*)UART_BASE_0, c) )
357 if ( --timeout == 0 ) return false;
363 * Baud rate selection stuff
368 unsigned short divisor_high, divisor_low;
371 const static struct _baud bauds[] = {
373 { 300, 0xA, 0x2B}, /* 2603 = 0x0A2B */
374 { 600, 0x5, 0x15}, /* 1301 = 0x0515 */
375 { 1200, 0x2, 0x8A}, /* 650 = 0x028A */
376 { 2400, 0x1, 0x45}, /* 325 = 0x0145 */
377 { 4800, 0x0, 0xA2}, /* 162 = 0x00A2 */
378 { 9600, 0x0, 0x50}, /* 80 = 0x0050 */
379 { 19200, 0x0, 0x28}, /* 40 = 0x0028 */
380 { 38400, 0x0, 0x13}, /* 19 = 0x0013 */
381 #elif (FCLK_MHZ == 60)
382 { 300, 0xC, 0x34}, /* 2603 = 0x0A2B */
383 { 600, 0x6, 0x19}, /* 1301 = 0x0515 */
384 { 1200, 0x3, 0x0C}, /* 650 = 0x028A */
385 { 2400, 0x1, 0x86}, /* 325 = 0x0145 */
386 { 4800, 0x0, 0xC2}, /* 162 = 0x00A2 */
387 { 9600, 0x0, 0x61}, /* 80 = 0x0050 */
388 { 19200, 0x0, 0x30}, /* 40 = 0x0028 */
389 { 38400, 0x0, 0x17}, /* 19 = 0x0013 */
394 #ifdef HAL_DIAG_USES_HARDWARE
397 #ifndef CYG_HAL_STARTUP_ROM
398 #define DIAG_BUFSIZE 2048
399 static char diag_buffer[DIAG_BUFSIZE];
400 static int diag_bp = 0;
404 void hal_diag_read_char(char *c)
406 while (!hal_diag_read_serial(c)) ;
409 void hal_diag_write_char(char c)
412 #ifndef CYG_HAL_STARTUP_ROM
413 diag_buffer[diag_bp++] = c;
414 if (diag_bp == sizeof(diag_buffer)) diag_bp = 0;
417 hal_diag_write_char_serial(c);
420 #else // not HAL_DIAG_USES_HARDWARE - it uses GDB protocol
423 hal_diag_read_char(char *c)
425 while (!hal_diag_read_serial(c)) ;
429 hal_diag_write_char(char c)
431 static char line[100];
435 // Do not unconditionally poke the XBUS LED location - XBUS may not be
436 // available if external arbiter is in use. This fragment may still be
437 // useful for debugging in the future, so left thus:
440 *(cyg_uint32 *)0x40012000 = 7 & (cyg_uint32)c; // LED XBUS location
441 // for ( i = 0x1000000; i > 0; i-- ) ;
445 // No need to send CRs
446 if( c == '\r' ) return;
450 if( c == '\n' || pos == sizeof(line) )
453 CYG_INTERRUPT_STATE old;
455 // Disable interrupts. This prevents GDB trying to interrupt us
456 // while we are in the middle of sending a packet. The serial
457 // receive interrupt will be seen when we re-enable interrupts
460 #ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
461 CYG_HAL_GDB_ENTER_CRITICAL_IO_REGION(old);
463 HAL_DISABLE_INTERRUPTS(old);
468 static char hex[] = "0123456789ABCDEF";
471 #ifndef CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT
474 hal_diag_write_char_serial('$');
475 hal_diag_write_char_serial('O');
477 for( i = 0; i < pos; i++ )
480 char h = hex[(ch>>4)&0xF];
481 char l = hex[ch&0xF];
482 hal_diag_write_char_serial(h);
483 hal_diag_write_char_serial(l);
487 hal_diag_write_char_serial('#');
488 hal_diag_write_char_serial(hex[(csum>>4)&0xF]);
489 hal_diag_write_char_serial(hex[csum&0xF]);
491 #ifdef CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT
495 #else // not CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT Ie. usually...
497 // Wait for the ACK character '+' from GDB here and handle
498 // receiving a ^C instead. This is the reason for this clause
500 if (!hal_diag_read_serial(&c1))
501 continue; // No response - try sending packet again
504 break; // a good acknowledge
506 #ifdef CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT
507 cyg_drv_interrupt_acknowledge(CYGNUM_HAL_INTERRUPT_SERIAL_RX);
509 // Ctrl-C: breakpoint.
510 cyg_hal_gdb_interrupt(
511 (target_register_t)__builtin_return_address(0) );
514 #endif // CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT
516 #endif // ! CYGDBG_HAL_DEBUG_GDB_CTRLC_SUPPORT
517 // otherwise, loop round again
523 // And re-enable interrupts
524 #ifdef CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
525 CYG_HAL_GDB_LEAVE_CRITICAL_IO_REGION(old);
527 HAL_RESTORE_INTERRUPTS(old);
534 #endif // !CYGSEM_HAL_VIRTUAL_VECTOR_DIAG
536 /*---------------------------------------------------------------------------*/
537 /* End of hal_diag.c */