#define NAND_FLASH_CONFIG2_FCMD_EN (1 << 0)
#define FDO_PAGE_SPARE_VAL 0x8
-#define MXC_NAND_BASE_DUMMY 0xE0000000
-#define NOR_FLASH_BOOT 0
-#define NAND_FLASH_BOOT 0x10
-#define SDRAM_NON_FLASH_BOOT 0x20
+#define NOR_FLASH_BOOT 0
+#define NAND_FLASH_BOOT 0x10
+#define SDRAM_NON_FLASH_BOOT 0x20
+#define MMC_BOOT 0x40
#define MXCBOOT_FLAG_REG (MX21_AITC_BASE + 0x20)
#define MXCFIS_NOTHING 0x00000000
#define MXCFIS_NAND 0x10000000
#define MXCFIS_NOR 0x20000000
+#define MXCFIS_MMC 0x40000000
#define MXCFIS_FLAG_REG (MX21_AITC_BASE + 0x24)
#define IS_BOOTING_FROM_NAND() (readl(MXCBOOT_FLAG_REG) == NAND_FLASH_BOOT)
#define IS_BOOTING_FROM_NOR() (readl(MXCBOOT_FLAG_REG) == NOR_FLASH_BOOT)
#define IS_BOOTING_FROM_SDRAM() (readl(MXCBOOT_FLAG_REG) == SDRAM_NON_FLASH_BOOT)
+#define IS_BOOTING_FROM_MMC() (readl(MXCBOOT_FLAG_REG) == MMC_BOOT)
#ifndef MXCFLASH_SELECT_NAND
#define IS_FIS_FROM_NAND() 0
#ifndef MXCFLASH_SELECT_NOR
#define IS_FIS_FROM_NOR() 0
#else
-#define IS_FIS_FROM_NOR() (!IS_FIS_FROM_NAND())
+#define IS_FIS_FROM_NOR() (readl(MXCFIS_FLAG_REG) == MXCFIS_NOR)
+#endif
+
+#ifndef MXCFLASH_SELECT_MMC
+#define IS_FIS_FROM_MMC() 0
+#else
+#define IS_FIS_FROM_MMC() (readl(MXCFIS_FLAG_REG) == MXCFIS_MMC)
#endif
#define MXC_ASSERT_NOR_BOOT() writel(MXCFIS_NOR, MXCFIS_FLAG_REG)
-#define MXC_ASSERT_NAND_BOOT() writel(MXCFIS_NAND, MXCFIS_FLAG_REG)
+#define MXC_ASSERT_NAND_BOOT() writel(MXCFIS_NAND, MXCFIS_FLAG_REG)
+#define MXC_ASSERT_MMC_BOOT() writel(MXCFIS_MMC, MXCFIS_FLAG_REG)
#define SERIAL_DOWNLOAD_MAGIC 0x000000AA
#define SERIAL_DOWNLOAD_MAGIC_REG MX21_AITC_NIPRIORITY3
SSI2_BAUD,
};
-enum {
- MXC_NFC_V1,
- MXC_NFC_V2,
-};
-
-typedef unsigned int nfc_setup_func_t(unsigned int, unsigned int, unsigned int);
+typedef unsigned int nfc_setup_func_t(unsigned int, unsigned int, unsigned int, unsigned int);
#endif //#if !defined(__ASSEMBLER__)