unified MX27, MX25, MX37 trees

[karo-tx-redboot.git] / packages / hal / arm / mx31 / var / v2_0 / src / soc_misc.c

diff --git a/packages/hal/arm/mx31/var/v2_0/src/soc_misc.c b/packages/hal/arm/mx31/var/v2_0/src/soc_misc.c
index 8d2ac964e9cf35e810675072679a761849a9a21f..7a075412fc56c33ea82c0cbafb0a2942b56914f6 100644 (file)
--- a/packages/hal/arm/mx31/var/v2_0/src/soc_misc.c
+++ b/packages/hal/arm/mx31/var/v2_0/src/soc_misc.c
@@ -81,7 +81,7 @@ externC void plf_hardware_init(void);
 #define MAJOR_NUMBER_OFFSET         (4)
 #define MINOR_NUMBER_OFFSET         (0)
 
-/*  
+/*
  * System_rev will have the following format
  * 31-12 = part # (0x31, 0x32, 0x27, 0x91131, 0x91321, etc)
  * 11-8 = unused
@@ -90,8 +90,8 @@ externC void plf_hardware_init(void);
  */
 unsigned int system_rev = CHIP_REV_1_0;
 static int find_correct_chip;
-
-char HAL_PLATFORM_EXTRA[55] = "MX31 ADS (Freescale i.MX31 based) PASS 1.0 [x32 DDR]";
+int g_board_type = BOARD_TYPE_UNKNOWN;
+extern char HAL_PLATFORM_EXTRA[60];
 
 /*
  * This functions reads the IIM module and returns the system revision number.
@@ -117,8 +117,13 @@ static int read_system_rev(void)
     if (MXC_GET_FIELD(val, IIM_PROD_REV_LEN, IIM_PROD_REV_SH) ==
         PROD_SIGNATURE_MX32) {
         system_rev = 0x32 << PART_NUMBER_OFFSET; /* For MX32 Platform*/
-        HAL_PLATFORM_EXTRA[3] = '2';
-        HAL_PLATFORM_EXTRA[25] = '2';
+        if (g_board_type == BOARD_TYPE_ADS) {
+            HAL_PLATFORM_EXTRA[3] = '2';
+            HAL_PLATFORM_EXTRA[25] = '2';
+        } else if (g_board_type == BOARD_TYPE_3STACK) {
+            HAL_PLATFORM_EXTRA[3] = '2';
+            HAL_PLATFORM_EXTRA[29] = '2';
+        }
     } else {
         system_rev = 0x31 << PART_NUMBER_OFFSET; /* For MX31 Platform*/
     }
@@ -129,12 +134,18 @@ static int read_system_rev(void)
 
 extern nfc_setup_func_t *nfc_setup;
 unsigned int mxc_nfc_soc_setup(unsigned int pg_sz, unsigned int io_sz,
-                                      unsigned int is_mlc);
+                                      unsigned int is_mlc, unsigned int num_of_chips);
 void hal_hardware_init(void)
 {
     volatile unsigned int esdmisc = readl(ESDCTL_BASE + 0x10);
     volatile unsigned int esdctl0 = readl(ESDCTL_BASE);
-    int ver = read_system_rev();
+    int ver;
+    char chip_ver[2];
+
+    // Perform any platform specific initializations
+    plf_hardware_init();
+
+    ver = read_system_rev();
 
     find_correct_chip = ver;
 
@@ -142,35 +153,49 @@ void hal_hardware_init(void)
         /* Valid product revision found. Check actual silicon rev and
          * NOT use the version from the ROM code. */
         if (((ver >> 4) & 0xF) == 0x0) {
-            HAL_PLATFORM_EXTRA[39] = '1';
-            HAL_PLATFORM_EXTRA[41] = '0';
+            chip_ver[0] = '1';
+            chip_ver[1] = '0';
             system_rev |= 1 << MAJOR_NUMBER_OFFSET      ;/*Major Number*/
             system_rev |= 0 << MINOR_NUMBER_OFFSET      ;/*Minor Number*/
         } else if (((ver >> 4) & 0xF) == 0x1) {
-            HAL_PLATFORM_EXTRA[39] = '1';
-            HAL_PLATFORM_EXTRA[41] = '1';
-           system_rev |= 1 << MAJOR_NUMBER_OFFSET      ;/*Major Number*/
+            chip_ver[0] = '1';
+            chip_ver[1] = '1';
+            system_rev |= 1 << MAJOR_NUMBER_OFFSET      ;/*Major Number*/
             system_rev |= 1 << MINOR_NUMBER_OFFSET      ;/*Minor Number*/
         } else if (((ver >> 4) & 0xF) == 0x2) {
-            HAL_PLATFORM_EXTRA[39] = '2';
-            HAL_PLATFORM_EXTRA[41] = '0';
+            chip_ver[0] = '2';
+            chip_ver[1] = '0';
             system_rev |= 2 << MAJOR_NUMBER_OFFSET      ;/*Major Number*/
             system_rev |= 0 << MINOR_NUMBER_OFFSET      ;/*Minor Number*/
         } else {
-            HAL_PLATFORM_EXTRA[39] = 'x';
-            HAL_PLATFORM_EXTRA[41] = 'x';
+            chip_ver[0] = 'x';
+            chip_ver[1] = 'x';
             system_rev |= 1 << MAJOR_NUMBER_OFFSET      ;/*Major Number*/
             system_rev |= 0 << MINOR_NUMBER_OFFSET      ;/*Minor Number*/
             find_correct_chip = CHIP_VERSION_UNKNOWN;
         }
     }
 
-    if ((esdmisc & 0x4) == 0) {
-        HAL_PLATFORM_EXTRA[48] = 'S';
-    }
-    if ((esdctl0 & 0x30000) != 0x20000) {
-        HAL_PLATFORM_EXTRA[45] = '1';
-        HAL_PLATFORM_EXTRA[46] = '6';
+    if (g_board_type == BOARD_TYPE_ADS) {
+        HAL_PLATFORM_EXTRA[39] = chip_ver[0];
+        HAL_PLATFORM_EXTRA[41] = chip_ver[1];
+        if ((esdmisc & 0x4) == 0) {
+            HAL_PLATFORM_EXTRA[48] = 'S';
+        }
+        if ((esdctl0 & 0x30000) != 0x20000) {
+            HAL_PLATFORM_EXTRA[45] = '1';
+            HAL_PLATFORM_EXTRA[46] = '6';
+        }
+    } else if (g_board_type == BOARD_TYPE_3STACK) {
+        HAL_PLATFORM_EXTRA[43] = chip_ver[0];
+        HAL_PLATFORM_EXTRA[45] = chip_ver[1];
+        if ((esdmisc & 0x4) == 0) {
+            HAL_PLATFORM_EXTRA[52] = 'S';
+        }
+        if ((esdctl0 & 0x30000) != 0x20000) {
+            HAL_PLATFORM_EXTRA[49] = '1';
+            HAL_PLATFORM_EXTRA[50] = '6';
+        }
     }
 
     // Mask all interrupts
@@ -202,9 +227,6 @@ void hal_hardware_init(void)
         writew(readw(WDOG_BASE_ADDR) | 0xFF00, WDOG_BASE_ADDR);
     }
 
-    // Perform any platform specific initializations
-    plf_hardware_init();
-
     // Set up eCos/ROM interfaces
     hal_if_init();
 
@@ -258,6 +280,13 @@ unsigned int hal_timer_count(void)
 #define WDT_MAGIC_2             0xAAAA
 #define MXC_WDT_WSR             0x2
 
+unsigned int i2c_base_addr[] = {
+    I2C_BASE_ADDR,
+    I2C2_BASE_ADDR,
+    I2C3_BASE_ADDR
+};
+unsigned int i2c_num = 3;
+
 static unsigned int led_on = 0;
 //
 // Delay for some number of micro-seconds
@@ -372,7 +401,7 @@ void hal_interrupt_set_level(int vector, int level)
     // Interrupt priorities are not configurable.
 }
 
-unsigned int mxc_nfc_soc_setup(unsigned int pg_sz, unsigned int io_sz, unsigned int is_mlc)
+unsigned int mxc_nfc_soc_setup(unsigned int pg_sz, unsigned int io_sz, unsigned int is_mlc, unsigned int num_of_chips)
 {
     unsigned int tmp, res = -1;
 
@@ -382,14 +411,14 @@ unsigned int mxc_nfc_soc_setup(unsigned int pg_sz, unsigned int io_sz, unsigned
         tmp = readw(NAND_REG_BASE + NAND_FLASH_CONFIG1_REG_OFF) & (~(1 << 9));
     }
     writew(tmp, NAND_REG_BASE + NAND_FLASH_CONFIG1_REG_OFF);
-    
+
     if (pg_sz == 2048) {
         tmp = readl(CCM_BASE_ADDR + CLKCTL_RCSR) | (1 << 30);
     } else {
         tmp = readl(CCM_BASE_ADDR + CLKCTL_RCSR) & (~(1 << 30));
     }
     writel(tmp, CCM_BASE_ADDR + CLKCTL_RCSR);
-    
+
     if (io_sz == 16) {
         tmp = readl(CCM_BASE_ADDR + CLKCTL_RCSR) | (1 << 31);
     } else {
@@ -407,7 +436,6 @@ unsigned int mxc_nfc_soc_setup(unsigned int pg_sz, unsigned int io_sz, unsigned
         break;
     default:
         diag_printf("Unknown chip version: 0x%x\n", tmp);
-        break;
     }
     return res;
 }