2 * armboot - Startup Code for ARM926EJS CPU-core
4 * Copyright (c) 2003 Texas Instruments
6 * ----- Adapted for OMAP1610 OMAP730 from ARM925t code ------
8 * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
9 * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
10 * Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
11 * Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
12 * Copyright (c) 2003 Kshitij <kshitij@ti.com>
13 * Copyright (c) 2010 Albert Aribaud <albert.u.boot@aribaud.net>
15 * SPDX-License-Identifier: GPL-2.0+
18 #include <asm-offsets.h>
24 *************************************************************************
26 * Jump vector table as in table 3.1 in [1]
28 *************************************************************************
32 #ifdef CONFIG_SYS_DV_NOR_BOOT_CFG
37 .word CONFIG_SYS_DV_NOR_BOOT_CFG
44 #ifdef CONFIG_SPL_BUILD
45 /* No exception handlers in preloader */
56 /* pad to 64 byte boundary */
65 ldr pc, _undefined_instruction
66 ldr pc, _software_interrupt
67 ldr pc, _prefetch_abort
73 _undefined_instruction:
74 .word undefined_instruction
76 .word software_interrupt
88 #endif /* CONFIG_SPL_BUILD */
89 .balignl 16,0xdeadbeef
93 *************************************************************************
95 * Startup Code (reset vector)
97 * do important init only if we don't start from memory!
98 * setup Memory and board specific bits prior to relocation.
99 * relocate armboot to ram
102 *************************************************************************
107 #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_TEXT_BASE)
108 .word CONFIG_SPL_TEXT_BASE
110 .word CONFIG_SYS_TEXT_BASE
114 * These are defined in the board-specific linker script.
115 * Subtracting _start from them lets the linker put their
116 * relative position in the executable instead of leaving
119 .globl _bss_start_ofs
121 .word __bss_start - _start
125 .word __bss_end - _start
131 #ifdef CONFIG_USE_IRQ
132 /* IRQ stack memory (calculated at run-time) */
133 .globl IRQ_STACK_START
137 /* IRQ stack memory (calculated at run-time) */
138 .globl FIQ_STACK_START
143 /* IRQ stack memory (calculated at run-time) + 8 bytes */
144 .globl IRQ_STACK_START_IN
146 #ifdef IRAM_BASE_ADDR
147 .word IRAM_BASE_ADDR + 0x20
153 * the actual reset code
158 * set the cpu to SVC32 mode
166 * we do sys-critical inits only at reboot,
167 * not when booting from ram!
169 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
175 /*------------------------------------------------------------------------------*/
177 .globl c_runtime_cpu_setup
183 *************************************************************************
185 * CPU_init_critical registers
187 * setup important registers
188 * setup memory timing
190 *************************************************************************
192 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
195 * flush D cache before disabling it
199 mrc p15, 0, r15, c7, c10, 3
202 mcr p15, 0, r0, c8, c7, 0 /* invalidate TLB */
203 mcr p15, 0, r0, c7, c5, 0 /* invalidate I Cache */
206 * disable MMU and D cache
207 * enable I cache if CONFIG_SYS_ICACHE_OFF is not defined
209 mrc p15, 0, r0, c1, c0, 0
210 bic r0, r0, #0x00000300 /* clear bits 9:8 (---- --RS) */
211 bic r0, r0, #0x00000087 /* clear bits 7, 2:0 (B--- -CAM) */
212 #ifdef CONFIG_SYS_EXCEPTION_VECTORS_HIGH
213 orr r0, r0, #0x00002000 /* set bit 13 (--V- ----) */
215 bic r0, r0, #0x00002000 /* clear bit 13 (--V- ----) */
217 orr r0, r0, #0x00000002 /* set bit 2 (A) Align */
218 #ifndef CONFIG_SYS_ICACHE_OFF
219 orr r0, r0, #0x00001000 /* set bit 12 (I) I-Cache */
221 mcr p15, 0, r0, c1, c0, 0
224 * Go setup Memory and board specific bits prior to relocation.
226 mov ip, lr /* perserve link reg across call */
227 bl lowlevel_init /* go setup pll,mux,memory */
228 mov lr, ip /* restore link */
229 mov pc, lr /* back to my caller */
230 #endif /* CONFIG_SKIP_LOWLEVEL_INIT */
232 #ifndef CONFIG_SPL_BUILD
234 *************************************************************************
238 *************************************************************************
244 #define S_FRAME_SIZE 72
266 #define MODE_SVC 0x13
270 * use bad_save_user_regs for abort/prefetch/undef/swi ...
271 * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
274 .macro bad_save_user_regs
275 @ carve out a frame on current user stack
276 sub sp, sp, #S_FRAME_SIZE
277 stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12
278 ldr r2, IRQ_STACK_START_IN
279 @ get values for "aborted" pc and cpsr (into parm regs)
281 add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack
284 stmia r5, {r0 - r3} @ save sp_SVC, lr_SVC, pc, cpsr
285 mov r0, sp @ save current stack into r0 (param register)
288 .macro irq_save_user_regs
289 sub sp, sp, #S_FRAME_SIZE
290 stmia sp, {r0 - r12} @ Calling r0-r12
291 @ !!!! R8 NEEDS to be saved !!!! a reserved stack spot would be good.
293 stmdb r8, {sp, lr}^ @ Calling SP, LR
294 str lr, [r8, #0] @ Save calling PC
296 str r6, [r8, #4] @ Save CPSR
297 str r0, [r8, #8] @ Save OLD_R0
301 .macro irq_restore_user_regs
302 ldmia sp, {r0 - lr}^ @ Calling r0 - lr
304 ldr lr, [sp, #S_PC] @ Get PC
305 add sp, sp, #S_FRAME_SIZE
306 subs pc, lr, #4 @ return & move spsr_svc into cpsr
310 ldr r13, IRQ_STACK_START_IN @ setup our mode stack
312 str lr, [r13] @ save caller lr in position 0 of saved stack
313 mrs lr, spsr @ get the spsr
314 str lr, [r13, #4] @ save spsr in position 1 of saved stack
315 mov r13, #MODE_SVC @ prepare SVC-Mode
317 msr spsr, r13 @ switch modes, make sure moves will execute
318 mov lr, pc @ capture return pc
319 movs pc, lr @ jump to next instruction & switch modes.
322 .macro get_bad_stack_swi
323 @ space on current stack for scratch reg.
326 ldr r0, IRQ_STACK_START_IN @ get our mode stack
327 str lr, [r0] @ save caller lr in position 0 of saved stack
328 mrs lr, spsr @ get the spsr
329 str lr, [r0, #4] @ save spsr in position 1 of saved stack
330 ldr lr, [r0] @ restore lr
331 ldr r0, [r13] @ restore r0
332 add r13, r13, #4 @ pop stack entry
335 .macro get_irq_stack @ setup IRQ stack
336 ldr sp, IRQ_STACK_START
339 .macro get_fiq_stack @ setup FIQ stack
340 ldr sp, FIQ_STACK_START
342 #endif /* CONFIG_SPL_BUILD */
347 #ifdef CONFIG_SPL_BUILD
350 ldr sp, _TEXT_BASE /* switch to abort stack */
352 bl 1b /* hang and never return */
353 #else /* !CONFIG_SPL_BUILD */
355 undefined_instruction:
358 bl do_undefined_instruction
364 bl do_software_interrupt
384 #ifdef CONFIG_USE_IRQ
391 irq_restore_user_regs
396 /* someone ought to write a more effiction fiq_save_user_regs */
399 irq_restore_user_regs
416 #endif /* CONFIG_SPL_BUILD */