arch/arm/cpu/armv7/am33xx/emif4.c

   1 /*
   2  * emif4.c
   3  *
   4  * AM33XX emif4 configuration file
   5  *
   6  * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR /PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  */
  18
  19 #include <common.h>
  20 #include <asm/arch/cpu.h>
  21 #include <asm/arch/ddr_defs.h>
  22 #include <asm/arch/hardware.h>
  23 #include <asm/arch/clock.h>
  24 #include <asm/arch/sys_proto.h>
  25 #include <asm/io.h>
  26 #include <asm/emif.h>
  27
  28 DECLARE_GLOBAL_DATA_PTR;
  29
  30 int dram_init(void)
  31 {
  32         /* dram_init must store complete ramsize in gd->ram_size */
  33         gd->ram_size = get_ram_size(
  34                         (void *)CONFIG_SYS_SDRAM_BASE,
  35                         CONFIG_MAX_RAM_BANK_SIZE);
  36         return 0;
  37 }
  38
  39 void dram_init_banksize(void)
  40 {
  41         gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
  42         gd->bd->bi_dram[0].size = gd->ram_size;
  43 }
  44
  45
  46 #ifdef CONFIG_SPL_BUILD
  47 static struct vtp_reg *vtpreg[2] = {
  48                                 (struct vtp_reg *)VTP0_CTRL_ADDR,
  49                                 (struct vtp_reg *)VTP1_CTRL_ADDR};
  50 #ifdef CONFIG_AM33XX
  51 static struct ddr_ctrl *ddrctrl = (struct ddr_ctrl *)DDR_CTRL_ADDR;
  52 #endif
  53
  54 static void config_vtp(int nr)
  55 {
  56         writel(readl(&vtpreg[nr]->vtp0ctrlreg) | VTP_CTRL_ENABLE,
  57                         &vtpreg[nr]->vtp0ctrlreg);
  58         writel(readl(&vtpreg[nr]->vtp0ctrlreg) & (~VTP_CTRL_START_EN),
  59                         &vtpreg[nr]->vtp0ctrlreg);
  60         writel(readl(&vtpreg[nr]->vtp0ctrlreg) | VTP_CTRL_START_EN,
  61                         &vtpreg[nr]->vtp0ctrlreg);
  62
  63         /* Poll for READY */
  64         while ((readl(&vtpreg[nr]->vtp0ctrlreg) & VTP_CTRL_READY) !=
  65                         VTP_CTRL_READY)
  66                 ;
  67 }
  68
  69 void config_ddr(unsigned int pll, unsigned int ioctrl,
  70                 const struct ddr_data *data, const struct cmd_control *ctrl,
  71                 const struct emif_regs *regs, int nr)
  72 {
  73         enable_emif_clocks();
  74         ddr_pll_config(pll);
  75         config_vtp(nr);
  76         config_cmd_ctrl(ctrl, nr);
  77
  78         config_ddr_data(data, nr);
  79 #ifdef CONFIG_AM33XX
  80         config_io_ctrl(ioctrl);
  81
  82         /* Set CKE to be controlled by EMIF/DDR PHY */
  83         writel(DDR_CKE_CTRL_NORMAL, &ddrctrl->ddrckectrl);
  84 #endif
  85
  86         /* Program EMIF instance */
  87         config_ddr_phy(regs, nr);
  88         set_sdram_timings(regs, nr);
  89         config_sdram(regs, nr);
  90 }
  91 #endif