arch/arm/cpu/armv7/am33xx/sys_info.c

   1 /*
   2  * sys_info.c
   3  *
   4  * System information functions
   5  *
   6  * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
   7  *
   8  * Derived from Beagle Board and 3430 SDP code by
   9  *      Richard Woodruff <r-woodruff2@ti.com>
  10  *      Syed Mohammed Khasim <khasim@ti.com>
  11  *
  12  * SPDX-License-Identifier:     GPL-2.0+
  13  */
  14
  15 #include <common.h>
  16 #include <asm/io.h>
  17 #include <asm/arch/sys_proto.h>
  18 #include <asm/arch/cpu.h>
  19 #include <asm/arch/clock.h>
  20 #include <power/tps65910.h>
  21 #include <linux/compiler.h>
  22
  23 struct ctrl_stat *cstat = (struct ctrl_stat *)CTRL_BASE;
  24
  25 /**
  26  * get_cpu_rev(void) - extract rev info
  27  */
  28 u32 get_cpu_rev(void)
  29 {
  30         u32 id;
  31         u32 rev;
  32
  33         id = readl(DEVICE_ID);
  34         rev = (id >> 28) & 0xff;
  35
  36         return rev;
  37 }
  38
  39 /**
  40  * get_cpu_type(void) - extract cpu info
  41  */
  42 u32 get_cpu_type(void)
  43 {
  44         u32 id = 0;
  45         u32 partnum;
  46
  47         id = readl(DEVICE_ID);
  48         partnum = (id >> 12) & 0xffff;
  49
  50         return partnum;
  51 }
  52
  53 /**
  54  * get_device_type(): tell if GP/HS/EMU/TST
  55  */
  56 u32 get_device_type(void)
  57 {
  58         int mode;
  59         mode = readl(&cstat->statusreg) & DEVICE_MASK;
  60         return mode >>= 8;
  61 }
  62
  63 /**
  64  * get_sysboot_value(void) - return SYS_BOOT[4:0]
  65  */
  66 u32 get_sysboot_value(void)
  67 {
  68         int mode;
  69         mode = readl(&cstat->statusreg) & SYSBOOT_MASK;
  70         return mode;
  71 }
  72
  73 #ifdef CONFIG_DISPLAY_CPUINFO
  74 static char *cpu_revs[] = {
  75         "1.0",
  76         "2.0",
  77         "2.1",
  78 };
  79
  80 static char *dev_types[] = {
  81         "TST",
  82         "EMU",
  83         "HS",
  84         "GP",
  85 };
  86
  87 /**
  88  * Print CPU information
  89  */
  90 int print_cpuinfo(void)
  91 {
  92         char *cpu_s, *sec_s, *rev_s;
  93
  94         switch (get_cpu_type()) {
  95         case AM335X:
  96                 cpu_s = "AM335X";
  97                 break;
  98         case TI81XX:
  99                 cpu_s = "TI81XX";
 100                 break;
 101         default:
 102                 cpu_s = "Unknown CPU type";
 103         }
 104
 105         if (get_cpu_rev() < ARRAY_SIZE(cpu_revs))
 106                 rev_s = cpu_revs[get_cpu_rev()];
 107         else
 108                 rev_s = "?";
 109
 110         if (get_device_type() < ARRAY_SIZE(dev_types))
 111                 sec_s = dev_types[get_device_type()];
 112         else
 113                 sec_s = "?";
 114
 115         printf("%s-%s rev %s\n", cpu_s, sec_s, rev_s);
 116
 117         return 0;
 118 }
 119 #endif  /* CONFIG_DISPLAY_CPUINFO */
 120
 121 #ifdef CONFIG_AM33XX
 122 int am335x_get_efuse_mpu_max_freq(struct ctrl_dev *cdev)
 123 {
 124         int sil_rev;
 125
 126         sil_rev = readl(&cdev->deviceid) >> 28;
 127
 128         if (sil_rev == 1)
 129                 /* PG 2.0, efuse may not be set. */
 130                 return MPUPLL_M_800;
 131         else if (sil_rev >= 2) {
 132                 /* Check what the efuse says our max speed is. */
 133                 int efuse_arm_mpu_max_freq;
 134                 efuse_arm_mpu_max_freq = readl(&cdev->efuse_sma);
 135                 switch ((efuse_arm_mpu_max_freq & DEVICE_ID_MASK)) {
 136                 case AM335X_ZCZ_1000:
 137                         return MPUPLL_M_1000;
 138                 case AM335X_ZCZ_800:
 139                         return MPUPLL_M_800;
 140                 case AM335X_ZCZ_720:
 141                         return MPUPLL_M_720;
 142                 case AM335X_ZCZ_600:
 143                 case AM335X_ZCE_600:
 144                         return MPUPLL_M_600;
 145                 case AM335X_ZCZ_300:
 146                 case AM335X_ZCE_300:
 147                         return MPUPLL_M_300;
 148                 }
 149         }
 150
 151         /* PG 1.0 or otherwise unknown, use the PG1.0 max */
 152         return MPUPLL_M_720;
 153 }
 154
 155 int am335x_get_tps65910_mpu_vdd(int sil_rev, int frequency)
 156 {
 157         /* For PG2.1 and later, we have one set of values. */
 158         if (sil_rev >= 2) {
 159                 switch (frequency) {
 160                 case MPUPLL_M_1000:
 161                         return TPS65910_OP_REG_SEL_1_3_2_5;
 162                 case MPUPLL_M_800:
 163                         return TPS65910_OP_REG_SEL_1_2_6;
 164                 case MPUPLL_M_720:
 165                         return TPS65910_OP_REG_SEL_1_2_0;
 166                 case MPUPLL_M_600:
 167                 case MPUPLL_M_300:
 168                         return TPS65910_OP_REG_SEL_1_1_3;
 169                 }
 170         }
 171
 172         /* Default to PG1.0/PG2.0 values. */
 173         return TPS65910_OP_REG_SEL_1_1_3;
 174 }
 175 #endif