arch/arm/cpu/armv7/keystone/aemif.c

   1 /*
   2  * Keystone2: Asynchronous EMIF Configuration
   3  *
   4  * (C) Copyright 2012-2014
   5  *     Texas Instruments Incorporated, <www.ti.com>
   6  *
   7  * SPDX-License-Identifier:     GPL-2.0+
   8  */
   9
  10 #include <common.h>
  11 #include <asm/io.h>
  12 #include <asm/arch/clock.h>
  13 #include <asm/arch/emif_defs.h>
  14
  15 #define AEMIF_CFG_SELECT_STROBE(v)      ((v) ? 1 << 31 : 0)
  16 #define AEMIF_CFG_EXTEND_WAIT(v)        ((v) ? 1 << 30 : 0)
  17 #define AEMIF_CFG_WR_SETUP(v)           (((v) & 0x0f) << 26)
  18 #define AEMIF_CFG_WR_STROBE(v)          (((v) & 0x3f) << 20)
  19 #define AEMIF_CFG_WR_HOLD(v)            (((v) & 0x07) << 17)
  20 #define AEMIF_CFG_RD_SETUP(v)           (((v) & 0x0f) << 13)
  21 #define AEMIF_CFG_RD_STROBE(v)          (((v) & 0x3f) << 7)
  22 #define AEMIF_CFG_RD_HOLD(v)            (((v) & 0x07) << 4)
  23 #define AEMIF_CFG_TURN_AROUND(v)        (((v) & 0x03) << 2)
  24 #define AEMIF_CFG_WIDTH(v)              (((v) & 0x03) << 0)
  25
  26 #define set_config_field(reg, field, val)                       \
  27         do {                                                    \
  28                 if (val != -1) {                                \
  29                         reg &= ~AEMIF_CFG_##field(0xffffffff);  \
  30                         reg |=  AEMIF_CFG_##field(val);         \
  31                 }                                               \
  32         } while (0)
  33
  34 void configure_async_emif(int cs, struct async_emif_config *cfg)
  35 {
  36         unsigned long tmp;
  37
  38         if (cfg->mode == ASYNC_EMIF_MODE_NAND) {
  39                 tmp = __raw_readl(&davinci_emif_regs->nandfcr);
  40                 tmp |= (1 << cs);
  41                 __raw_writel(tmp, &davinci_emif_regs->nandfcr);
  42
  43         } else if (cfg->mode == ASYNC_EMIF_MODE_ONENAND) {
  44                 tmp = __raw_readl(&davinci_emif_regs->one_nand_cr);
  45                 tmp |= (1 << cs);
  46                 __raw_writel(tmp, &davinci_emif_regs->one_nand_cr);
  47         }
  48
  49         tmp = __raw_readl(&davinci_emif_regs->abncr[cs]);
  50
  51         set_config_field(tmp, SELECT_STROBE,    cfg->select_strobe);
  52         set_config_field(tmp, EXTEND_WAIT,      cfg->extend_wait);
  53         set_config_field(tmp, WR_SETUP,         cfg->wr_setup);
  54         set_config_field(tmp, WR_STROBE,        cfg->wr_strobe);
  55         set_config_field(tmp, WR_HOLD,          cfg->wr_hold);
  56         set_config_field(tmp, RD_SETUP,         cfg->rd_setup);
  57         set_config_field(tmp, RD_STROBE,        cfg->rd_strobe);
  58         set_config_field(tmp, RD_HOLD,          cfg->rd_hold);
  59         set_config_field(tmp, TURN_AROUND,      cfg->turn_around);
  60         set_config_field(tmp, WIDTH,            cfg->width);
  61
  62         __raw_writel(tmp, &davinci_emif_regs->abncr[cs]);
  63 }
  64
  65 void init_async_emif(int num_cs, struct async_emif_config *config)
  66 {
  67         int cs;
  68
  69         for (cs = 0; cs < num_cs; cs++)
  70                 configure_async_emif(cs, config + cs);
  71 }