arch/arm/cpu/armv7/omap-common/boot-common.c

   1 /*
   2  * boot-common.c
   3  *
   4  * Common bootmode functions for omap based boards
   5  *
   6  * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
   7  *
   8  * SPDX-License-Identifier:     GPL-2.0+
   9  */
  10
  11 #include <common.h>
  12 #include <spl.h>
  13 #include <asm/omap_common.h>
  14 #include <asm/arch/omap.h>
  15 #include <asm/arch/mmc_host_def.h>
  16 #include <asm/arch/sys_proto.h>
  17
  18 DECLARE_GLOBAL_DATA_PTR;
  19
  20 void save_omap_boot_params(void)
  21 {
  22         u32 rom_params = *((u32 *)OMAP_SRAM_SCRATCH_BOOT_PARAMS);
  23         u8 boot_device;
  24         u32 dev_desc, dev_data;
  25
  26         if ((rom_params <  NON_SECURE_SRAM_START) ||
  27             (rom_params > NON_SECURE_SRAM_END))
  28                 return;
  29
  30         /*
  31          * rom_params can be type casted to omap_boot_parameters and
  32          * used. But it not correct to assume that romcode structure
  33          * encoding would be same as u-boot. So use the defined offsets.
  34          */
  35         gd->arch.omap_boot_params.omap_bootdevice = boot_device =
  36                                    *((u8 *)(rom_params + BOOT_DEVICE_OFFSET));
  37
  38         gd->arch.omap_boot_params.ch_flags =
  39                                 *((u8 *)(rom_params + CH_FLAGS_OFFSET));
  40
  41         if ((boot_device >= MMC_BOOT_DEVICES_START) &&
  42             (boot_device <= MMC_BOOT_DEVICES_END)) {
  43 #if !defined(CONFIG_AM33XX) && !defined(CONFIG_TI81XX) && \
  44         !defined(CONFIG_AM43XX)
  45                 if ((omap_hw_init_context() ==
  46                                       OMAP_INIT_CONTEXT_UBOOT_AFTER_SPL)) {
  47                         gd->arch.omap_boot_params.omap_bootmode =
  48                         *((u8 *)(rom_params + BOOT_MODE_OFFSET));
  49                 } else
  50 #endif
  51                 {
  52                         dev_desc = *((u32 *)(rom_params + DEV_DESC_PTR_OFFSET));
  53                         dev_data = *((u32 *)(dev_desc + DEV_DATA_PTR_OFFSET));
  54                         gd->arch.omap_boot_params.omap_bootmode =
  55                                         *((u32 *)(dev_data + BOOT_MODE_OFFSET));
  56                 }
  57         }
  58 }
  59
  60 #ifdef CONFIG_SPL_BUILD
  61 u32 spl_boot_device(void)
  62 {
  63         return (u32) (gd->arch.omap_boot_params.omap_bootdevice);
  64 }
  65
  66 u32 spl_boot_mode(void)
  67 {
  68         return gd->arch.omap_boot_params.omap_bootmode;
  69 }
  70
  71 void spl_board_init(void)
  72 {
  73 #ifdef CONFIG_SPL_NAND_SUPPORT
  74         gpmc_init();
  75 #endif
  76 #if defined(CONFIG_AM33XX) && defined(CONFIG_SPL_MUSB_NEW_SUPPORT)
  77         arch_misc_init();
  78 #endif
  79 #ifdef CONFIG_AM33XX
  80         am33xx_spl_board_init();
  81 #endif
  82 }
  83
  84 int board_mmc_init(bd_t *bis)
  85 {
  86         switch (spl_boot_device()) {
  87         case BOOT_DEVICE_MMC1:
  88                 omap_mmc_init(0, 0, 0, -1, -1);
  89                 break;
  90         case BOOT_DEVICE_MMC2:
  91         case BOOT_DEVICE_MMC2_2:
  92                 omap_mmc_init(1, 0, 0, -1, -1);
  93                 break;
  94         }
  95         return 0;
  96 }
  97
  98 void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
  99 {
 100         typedef void __noreturn (*image_entry_noargs_t)(u32 *);
 101         image_entry_noargs_t image_entry =
 102                         (image_entry_noargs_t) spl_image->entry_point;
 103
 104         debug("image entry point: 0x%X\n", spl_image->entry_point);
 105         /* Pass the saved boot_params from rom code */
 106         image_entry((u32 *)&gd->arch.omap_boot_params);
 107 }
 108 #endif