5 * Richard Woodruff <r-woodruff2@ti.com>
6 * Syed Moahmmed Khasim <khasim@ti.com>
9 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
10 * Marius Groeger <mgroeger@sysgo.de>
11 * Alex Zuepke <azu@sysgo.de>
14 * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
16 * SPDX-License-Identifier: GPL-2.0+
22 #include <asm/arch/cpu.h>
23 #include <asm/arch/clock.h>
25 DECLARE_GLOBAL_DATA_PTR;
27 static struct gptimer *timer_base = (struct gptimer *)CONFIG_SYS_TIMERBASE;
30 * Nothing really to do with interrupts, just starts up a counter.
33 #if CONFIG_SYS_PTV > 7
34 #error Invalid CONFIG_SYS_PTV value
35 #elif CONFIG_SYS_PTV >= 0
36 #define TIMER_CLOCK (V_SCLK / (2 << CONFIG_SYS_PTV))
37 #define TCLR_VAL ((CONFIG_SYS_PTV << 2) | TCLR_PRE | TCLR_AR | TCLR_ST)
39 #define TIMER_CLOCK V_SCLK
40 #define TCLR_VAL (TCLR_AR | TCLR_ST)
42 #define TIMER_LOAD_VAL 0
44 #define TIOCP_CFG_SOFTRESET (1 << 0)
46 #if TIMER_CLOCK < CONFIG_SYS_HZ
47 #error TIMER_CLOCK must be >= CONFIG_SYS_HZ
51 * Start timer so that it will overflow 15 sec after boot,
52 * to catch misbehaving timer code early on!
54 #define TIMER_START (-time_to_tick(15 * CONFIG_SYS_HZ))
56 static inline unsigned long tick_to_time(unsigned long tick)
58 return tick / (TIMER_CLOCK / CONFIG_SYS_HZ);
61 static inline unsigned long time_to_tick(unsigned long time)
63 return time * (TIMER_CLOCK / CONFIG_SYS_HZ);
66 static inline unsigned long us_to_ticks(unsigned long usec)
68 return usec * (TIMER_CLOCK / CONFIG_SYS_HZ / 1000);
73 #if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD)
75 writel(TIOCP_CFG_SOFTRESET, &timer_base->tiocp_cfg);
77 /* Wait until the reset is done */
78 while (readl(&timer_base->tiocp_cfg) & TIOCP_CFG_SOFTRESET)
81 /* preload the counter to make overflow occur early */
82 writel(TIMER_START, &timer_base->tldr);
83 writel(~0, &timer_base->ttgr);
85 /* start the counter ticking up, reload value on overflow */
86 writel(TIMER_LOAD_VAL, &timer_base->tldr);
88 writel(TCLR_VAL, &timer_base->tclr);
90 gd->arch.lastinc = -30 * TIMER_CLOCK;
91 gd->arch.tbl = TIMER_START;
92 gd->arch.timer_rate_hz = TIMER_CLOCK;
98 * timer without interrupts
100 ulong get_timer(ulong base)
102 return tick_to_time(get_ticks() - time_to_tick(base));
105 /* delay x useconds */
106 void __udelay(unsigned long usec)
108 unsigned long start = readl(&timer_base->tcrr);
109 unsigned long ticks = us_to_ticks(usec);
117 while (readl(&timer_base->tcrr) - start < ticks)
121 ulong get_timer_masked(void)
123 /* current tick value */
124 return tick_to_time(get_ticks());
128 * This function is derived from PowerPC code (read timebase as long long).
129 * On ARM it just returns the timer value.
131 unsigned long long get_ticks(void)
133 ulong now = readl(&timer_base->tcrr);
134 ulong inc = now - gd->arch.lastinc;
137 gd->arch.lastinc = now;
142 * This function is derived from PowerPC code (timebase clock frequency).
143 * On ARM it returns the number of timer ticks per second.
145 ulong get_tbclk(void)
147 return gd->arch.timer_rate_hz;