arch/arm/cpu/armv7/omap3/sys_info.c

   1 /*
   2  * (C) Copyright 2008
   3  * Texas Instruments, <www.ti.com>
   4  *
   5  * Author :
   6  *      Manikandan Pillai <mani.pillai@ti.com>
   7  *
   8  * Derived from Beagle Board and 3430 SDP code by
   9  *      Richard Woodruff <r-woodruff2@ti.com>
  10  *      Syed Mohammed Khasim <khasim@ti.com>
  11  *
  12  * SPDX-License-Identifier:     GPL-2.0+
  13  */
  14
  15 #include <common.h>
  16 #include <asm/io.h>
  17 #include <asm/arch/mem.h>       /* get mem tables */
  18 #include <asm/arch/sys_proto.h>
  19 #include <i2c.h>
  20 #include <linux/compiler.h>
  21
  22 extern omap3_sysinfo sysinfo;
  23 static struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE;
  24
  25 #ifdef CONFIG_DISPLAY_CPUINFO
  26 static char *rev_s[CPU_3XX_MAX_REV] = {
  27                                 "1.0",
  28                                 "2.0",
  29                                 "2.1",
  30                                 "3.0",
  31                                 "3.1",
  32                                 "UNKNOWN",
  33                                 "UNKNOWN",
  34                                 "3.1.2"};
  35
  36 /* this is the revision table for 37xx CPUs */
  37 static char *rev_s_37xx[CPU_37XX_MAX_REV] = {
  38                                 "1.0",
  39                                 "1.1",
  40                                 "1.2"};
  41 #endif /* CONFIG_DISPLAY_CPUINFO */
  42
  43 /*****************************************************************
  44  * dieid_num_r(void) - read and set die ID
  45  *****************************************************************/
  46 void dieid_num_r(void)
  47 {
  48         struct ctrl_id *id_base = (struct ctrl_id *)OMAP34XX_ID_L4_IO_BASE;
  49         char *uid_s, die_id[34];
  50         u32 id[4];
  51
  52         memset(die_id, 0, sizeof(die_id));
  53
  54         uid_s = getenv("dieid#");
  55
  56         if (uid_s == NULL) {
  57                 id[3] = readl(&id_base->die_id_0);
  58                 id[2] = readl(&id_base->die_id_1);
  59                 id[1] = readl(&id_base->die_id_2);
  60                 id[0] = readl(&id_base->die_id_3);
  61                 sprintf(die_id, "%08x%08x%08x%08x", id[0], id[1], id[2], id[3]);
  62                 setenv("dieid#", die_id);
  63                 uid_s = die_id;
  64         }
  65
  66         printf("Die ID #%s\n", uid_s);
  67 }
  68
  69 /******************************************
  70  * get_cpu_type(void) - extract cpu info
  71  ******************************************/
  72 u32 get_cpu_type(void)
  73 {
  74         return readl(&ctrl_base->ctrl_omap_stat);
  75 }
  76
  77 /******************************************
  78  * get_cpu_id(void) - extract cpu id
  79  * returns 0 for ES1.0, cpuid otherwise
  80  ******************************************/
  81 u32 get_cpu_id(void)
  82 {
  83         struct ctrl_id *id_base;
  84         u32 cpuid = 0;
  85
  86         /*
  87          * On ES1.0 the IDCODE register is not exposed on L4
  88          * so using CPU ID to differentiate between ES1.0 and > ES1.0.
  89          */
  90         __asm__ __volatile__("mrc p15, 0, %0, c0, c0, 0":"=r"(cpuid));
  91         if ((cpuid & 0xf) == 0x0) {
  92                 return 0;
  93         } else {
  94                 /* Decode the IDs on > ES1.0 */
  95                 id_base = (struct ctrl_id *) OMAP34XX_ID_L4_IO_BASE;
  96
  97                 cpuid = readl(&id_base->idcode);
  98         }
  99
 100         return cpuid;
 101 }
 102
 103 /******************************************
 104  * get_cpu_family(void) - extract cpu info
 105  ******************************************/
 106 u32 get_cpu_family(void)
 107 {
 108         u16 hawkeye;
 109         u32 cpu_family;
 110         u32 cpuid = get_cpu_id();
 111
 112         if (cpuid == 0)
 113                 return CPU_OMAP34XX;
 114
 115         hawkeye = (cpuid >> HAWKEYE_SHIFT) & 0xffff;
 116         switch (hawkeye) {
 117         case HAWKEYE_OMAP34XX:
 118                 cpu_family = CPU_OMAP34XX;
 119                 break;
 120         case HAWKEYE_AM35XX:
 121                 cpu_family = CPU_AM35XX;
 122                 break;
 123         case HAWKEYE_OMAP36XX:
 124                 cpu_family = CPU_OMAP36XX;
 125                 break;
 126         default:
 127                 cpu_family = CPU_OMAP34XX;
 128         }
 129
 130         return cpu_family;
 131 }
 132
 133 /******************************************
 134  * get_cpu_rev(void) - extract version info
 135  ******************************************/
 136 u32 get_cpu_rev(void)
 137 {
 138         u32 cpuid = get_cpu_id();
 139
 140         if (cpuid == 0)
 141                 return CPU_3XX_ES10;
 142         else
 143                 return (cpuid >> CPU_3XX_ID_SHIFT) & 0xf;
 144 }
 145
 146 /*****************************************************************
 147  * get_sku_id(void) - read sku_id to get info on max clock rate
 148  *****************************************************************/
 149 u32 get_sku_id(void)
 150 {
 151         struct ctrl_id *id_base = (struct ctrl_id *)OMAP34XX_ID_L4_IO_BASE;
 152         return readl(&id_base->sku_id) & SKUID_CLK_MASK;
 153 }
 154
 155 /***************************************************************************
 156  *  get_gpmc0_base() - Return current address hardware will be
 157  *     fetching from. The below effectively gives what is correct, its a bit
 158  *   mis-leading compared to the TRM.  For the most general case the mask
 159  *   needs to be also taken into account this does work in practice.
 160  *   - for u-boot we currently map:
 161  *       -- 0 to nothing,
 162  *       -- 4 to flash
 163  *       -- 8 to enent
 164  *       -- c to wifi
 165  ****************************************************************************/
 166 u32 get_gpmc0_base(void)
 167 {
 168         u32 b;
 169
 170         b = readl(&gpmc_cfg->cs[0].config7);
 171         b &= 0x1F;              /* keep base [5:0] */
 172         b = b << 24;            /* ret 0x0b000000 */
 173         return b;
 174 }
 175
 176 /*******************************************************************
 177  * get_gpmc0_width() - See if bus is in x8 or x16 (mainly for nand)
 178  *******************************************************************/
 179 u32 get_gpmc0_width(void)
 180 {
 181         return WIDTH_16BIT;
 182 }
 183
 184 /*************************************************************************
 185  * get_board_rev() - setup to pass kernel board revision information
 186  * returns:(bit[0-3] sub version, higher bit[7-4] is higher version)
 187  *************************************************************************/
 188 u32 __weak get_board_rev(void)
 189 {
 190         return 0x20;
 191 }
 192
 193 /********************************************************
 194  *  get_base(); get upper addr of current execution
 195  *******************************************************/
 196 u32 get_base(void)
 197 {
 198         u32 val;
 199
 200         __asm__ __volatile__("mov %0, pc \n":"=r"(val)::"memory");
 201         val &= 0xF0000000;
 202         val >>= 28;
 203         return val;
 204 }
 205
 206 /********************************************************
 207  *  is_running_in_flash() - tell if currently running in
 208  *  FLASH.
 209  *******************************************************/
 210 u32 is_running_in_flash(void)
 211 {
 212         if (get_base() < 4)
 213                 return 1;       /* in FLASH */
 214
 215         return 0;               /* running in SRAM or SDRAM */
 216 }
 217
 218 /********************************************************
 219  *  is_running_in_sram() - tell if currently running in
 220  *  SRAM.
 221  *******************************************************/
 222 u32 is_running_in_sram(void)
 223 {
 224         if (get_base() == 4)
 225                 return 1;       /* in SRAM */
 226
 227         return 0;               /* running in FLASH or SDRAM */
 228 }
 229
 230 /********************************************************
 231  *  is_running_in_sdram() - tell if currently running in
 232  *  SDRAM.
 233  *******************************************************/
 234 u32 is_running_in_sdram(void)
 235 {
 236         if (get_base() > 4)
 237                 return 1;       /* in SDRAM */
 238
 239         return 0;               /* running in SRAM or FLASH */
 240 }
 241
 242 /***************************************************************
 243  *  get_boot_type() - Is this an XIP type device or a stream one
 244  *  bits 4-0 specify type. Bit 5 says mem/perif
 245  ***************************************************************/
 246 u32 get_boot_type(void)
 247 {
 248         return (readl(&ctrl_base->status) & SYSBOOT_MASK);
 249 }
 250
 251 /*************************************************************
 252  *  get_device_type(): tell if GP/HS/EMU/TST
 253  *************************************************************/
 254 u32 get_device_type(void)
 255 {
 256         return ((readl(&ctrl_base->status) & (DEVICE_MASK)) >> 8);
 257 }
 258
 259 #ifdef CONFIG_DISPLAY_CPUINFO
 260 /**
 261  * Print CPU information
 262  */
 263 int print_cpuinfo (void)
 264 {
 265         char *cpu_family_s, *cpu_s, *sec_s, *max_clk;
 266
 267         switch (get_cpu_family()) {
 268         case CPU_OMAP34XX:
 269                 cpu_family_s = "OMAP";
 270                 switch (get_cpu_type()) {
 271                 case OMAP3503:
 272                         cpu_s = "3503";
 273                         break;
 274                 case OMAP3515:
 275                         cpu_s = "3515";
 276                         break;
 277                 case OMAP3525:
 278                         cpu_s = "3525";
 279                         break;
 280                 case OMAP3530:
 281                         cpu_s = "3530";
 282                         break;
 283                 default:
 284                         cpu_s = "35XX";
 285                         break;
 286                 }
 287                 if ((get_cpu_rev() >= CPU_3XX_ES31) &&
 288                     (get_sku_id() == SKUID_CLK_720MHZ))
 289                         max_clk = "720 MHz";
 290                 else
 291                         max_clk = "600 MHz";
 292
 293                 break;
 294         case CPU_AM35XX:
 295                 cpu_family_s = "AM";
 296                 switch (get_cpu_type()) {
 297                 case AM3505:
 298                         cpu_s = "3505";
 299                         break;
 300                 case AM3517:
 301                         cpu_s = "3517";
 302                         break;
 303                 default:
 304                         cpu_s = "35XX";
 305                         break;
 306                 }
 307                 max_clk = "600 Mhz";
 308                 break;
 309         case CPU_OMAP36XX:
 310                 cpu_family_s = "OMAP";
 311                 switch (get_cpu_type()) {
 312                 case OMAP3730:
 313                         cpu_s = "3630/3730";
 314                         break;
 315                 default:
 316                         cpu_s = "36XX/37XX";
 317                         break;
 318                 }
 319                 max_clk = "1 Ghz";
 320                 break;
 321         default:
 322                 cpu_family_s = "OMAP";
 323                 cpu_s = "35XX";
 324                 max_clk = "600 Mhz";
 325         }
 326
 327         switch (get_device_type()) {
 328         case TST_DEVICE:
 329                 sec_s = "TST";
 330                 break;
 331         case EMU_DEVICE:
 332                 sec_s = "EMU";
 333                 break;
 334         case HS_DEVICE:
 335                 sec_s = "HS";
 336                 break;
 337         case GP_DEVICE:
 338                 sec_s = "GP";
 339                 break;
 340         default:
 341                 sec_s = "?";
 342         }
 343
 344         if (CPU_OMAP36XX == get_cpu_family())
 345                 printf("%s%s-%s ES%s, CPU-OPP2, L3-165MHz, Max CPU Clock %s\n",
 346                         cpu_family_s, cpu_s, sec_s,
 347                         rev_s_37xx[get_cpu_rev()], max_clk);
 348         else
 349                 printf("%s%s-%s ES%s, CPU-OPP2, L3-165MHz, Max CPU Clock %s\n",
 350                         cpu_family_s, cpu_s, sec_s,
 351                         rev_s[get_cpu_rev()], max_clk);
 352
 353         return 0;
 354 }
 355 #endif  /* CONFIG_DISPLAY_CPUINFO */