arch/arm/cpu/armv7/rmobile/pfc-r8a7790.c

   1 /*
   2  * arch/arm/cpu/armv7/rmobile/pfc-r8a7790.c
   3  *     This file is r8a7790 processor support - PFC hardware block.
   4  *
   5  * Copy from linux-kernel:drivers/pinctrl/sh-pfc/pfc-r8a7790.c
   6  *
   7  * Copyright (C) 2013 Renesas Electronics Corporation
   8  * Copyright (C) 2013 Magnus Damm
   9  * Copyright (C) 2012 Renesas Solutions Corp.
  10  * Copyright (C) 2012 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
  11  *
  12  * SPDX-License-Identifier: GPL-2.0
  13  */
  14
  15 #include <common.h>
  16 #include <sh_pfc.h>
  17 #include <asm/gpio.h>
  18 #include "pfc-r8a7790.h"
  19
  20 enum {
  21         PINMUX_RESERVED = 0,
  22
  23         PINMUX_DATA_BEGIN,
  24         GP_ALL(DATA),
  25         PINMUX_DATA_END,
  26
  27         PINMUX_INPUT_BEGIN,
  28         GP_ALL(IN),
  29         PINMUX_INPUT_END,
  30
  31         PINMUX_OUTPUT_BEGIN,
  32         GP_ALL(OUT),
  33         PINMUX_OUTPUT_END,
  34
  35         PINMUX_FUNCTION_BEGIN,
  36         GP_ALL(FN),
  37
  38         /* GPSR0 */
  39         FN_IP0_2_0, FN_IP0_5_3, FN_IP0_8_6, FN_IP0_11_9, FN_IP0_15_12,
  40         FN_IP0_19_16, FN_IP0_22_20, FN_IP0_26_23, FN_IP0_30_27,
  41         FN_IP1_3_0, FN_IP1_7_4, FN_IP1_11_8, FN_IP1_14_12,
  42         FN_IP1_17_15, FN_IP1_21_18, FN_IP1_25_22, FN_IP1_27_26,
  43         FN_IP1_29_28, FN_IP2_2_0, FN_IP2_5_3, FN_IP2_8_6, FN_IP2_11_9,
  44         FN_IP2_14_12, FN_IP2_17_15, FN_IP2_21_18, FN_IP2_25_22,
  45         FN_IP2_28_26, FN_IP3_3_0, FN_IP3_7_4, FN_IP3_11_8,
  46         FN_IP3_14_12, FN_IP3_17_15,
  47
  48         /* GPSR1 */
  49         FN_IP3_19_18, FN_IP3_22_20, FN_IP3_25_23, FN_IP3_28_26,
  50         FN_IP3_31_29, FN_IP4_2_0, FN_IP4_5_3, FN_IP4_8_6, FN_IP4_11_9,
  51         FN_IP4_14_12, FN_IP4_17_15, FN_IP4_20_18, FN_IP4_23_21,
  52         FN_IP4_26_24, FN_IP4_29_27, FN_IP5_2_0, FN_IP5_5_3, FN_IP5_9_6,
  53         FN_IP5_12_10, FN_IP5_14_13, FN_IP5_17_15, FN_IP5_20_18,
  54         FN_IP5_23_21, FN_IP5_26_24, FN_IP5_29_27, FN_IP6_2_0,
  55         FN_IP6_5_3, FN_IP6_8_6, FN_IP6_10_9, FN_IP6_13_11,
  56
  57         /* GPSR2 */
  58         FN_IP7_28_27, FN_IP7_30_29, FN_IP8_1_0, FN_IP8_3_2, FN_IP8_5_4,
  59         FN_IP8_7_6, FN_IP8_9_8, FN_IP8_11_10, FN_IP8_13_12, FN_IP8_15_14,
  60         FN_IP8_17_16, FN_IP8_19_18, FN_IP8_21_20, FN_IP8_23_22,
  61         FN_IP8_25_24, FN_IP8_26, FN_IP8_27, FN_VI1_DATA7_VI1_B7,
  62         FN_IP6_16_14, FN_IP6_19_17, FN_IP6_22_20, FN_IP6_25_23,
  63         FN_IP6_28_26, FN_IP6_31_29, FN_IP7_2_0, FN_IP7_5_3, FN_IP7_7_6,
  64         FN_IP7_9_8, FN_IP7_12_10, FN_IP7_15_13,
  65
  66         /* GPSR3 */
  67         FN_IP8_28, FN_IP8_30_29, FN_IP9_1_0, FN_IP9_3_2, FN_IP9_5_4,
  68         FN_IP9_7_6, FN_IP9_11_8, FN_IP9_15_12, FN_IP9_17_16, FN_IP9_19_18,
  69         FN_IP9_21_20, FN_IP9_23_22, FN_IP9_25_24, FN_IP9_27_26,
  70         FN_IP9_31_28, FN_IP10_3_0, FN_IP10_6_4, FN_IP10_10_7, FN_IP10_14_11,
  71         FN_IP10_18_15, FN_IP10_22_19, FN_IP10_25_23, FN_IP10_29_26,
  72         FN_IP11_3_0, FN_IP11_4, FN_IP11_6_5, FN_IP11_8_7, FN_IP11_10_9,
  73         FN_IP11_12_11, FN_IP11_14_13, FN_IP11_17_15, FN_IP11_21_18,
  74
  75         /* GPSR4 */
  76         FN_IP11_23_22, FN_IP11_26_24, FN_IP11_29_27, FN_IP11_31_30,
  77         FN_IP12_1_0, FN_IP12_3_2, FN_IP12_5_4, FN_IP12_7_6, FN_IP12_10_8,
  78         FN_IP12_13_11, FN_IP12_16_14, FN_IP12_19_17, FN_IP12_22_20,
  79         FN_IP12_24_23, FN_IP12_27_25, FN_IP12_30_28, FN_IP13_2_0,
  80         FN_IP13_6_3, FN_IP13_9_7, FN_IP13_12_10, FN_IP13_15_13,
  81         FN_IP13_18_16, FN_IP13_22_19, FN_IP13_25_23, FN_IP13_28_26,
  82         FN_IP13_30_29, FN_IP14_2_0, FN_IP14_5_3, FN_IP14_8_6, FN_IP14_11_9,
  83         FN_IP14_15_12, FN_IP14_18_16,
  84
  85         /* GPSR5 */
  86         FN_IP14_21_19, FN_IP14_24_22, FN_IP14_27_25, FN_IP14_30_28,
  87         FN_IP15_2_0, FN_IP15_5_3, FN_IP15_8_6, FN_IP15_11_9, FN_IP15_13_12,
  88         FN_IP15_15_14, FN_IP15_17_16, FN_IP15_19_18, FN_IP15_22_20,
  89         FN_IP15_25_23, FN_IP15_27_26, FN_IP15_29_28, FN_IP16_2_0,
  90         FN_IP16_5_3, FN_USB0_PWEN, FN_USB0_OVC_VBUS, FN_IP16_6, FN_IP16_7,
  91         FN_USB2_PWEN, FN_USB2_OVC, FN_AVS1, FN_AVS2, FN_DU_DOTCLKIN0,
  92         FN_IP7_26_25, FN_DU_DOTCLKIN2, FN_IP7_18_16, FN_IP7_21_19, FN_IP7_24_22,
  93
  94         /* IPSR0 - IPSR5 */
  95         /* IPSR6 */
  96         FN_DACK0, FN_IRQ0, FN_INTC_IRQ0_N, FN_SSI_SCK6_B,
  97         FN_VI1_VSYNC_N, FN_VI1_VSYNC_N_B, FN_SSI_WS78_C,
  98         FN_DREQ1_N, FN_VI1_CLKENB, FN_VI1_CLKENB_B,
  99         FN_SSI_SDATA7_C, FN_SSI_SCK78_B, FN_DACK1, FN_IRQ1,
 100         FN_INTC_IRQ1_N, FN_SSI_WS6_B, FN_SSI_SDATA8_C,
 101         FN_DREQ2_N, FN_HSCK1_B, FN_HCTS0_N_B,
 102         FN_MSIOF0_TXD_B, FN_DACK2, FN_IRQ2, FN_INTC_IRQ2_N,
 103         FN_SSI_SDATA6_B, FN_HRTS0_N_B, FN_MSIOF0_RXD_B,
 104         FN_ETH_CRS_DV, FN_RMII_CRS_DV, FN_STP_ISCLK_0_B,
 105         FN_TS_SDEN0_D, FN_GLO_Q0_C, FN_SCL2_E,
 106         FN_SCL2_CIS_E, FN_ETH_RX_ER, FN_RMII_RX_ER,
 107         FN_STP_ISD_0_B, FN_TS_SPSYNC0_D, FN_GLO_Q1_C,
 108         FN_SDA2_E, FN_SDA2_CIS_E, FN_ETH_RXD0, FN_RMII_RXD0,
 109         FN_STP_ISEN_0_B, FN_TS_SDAT0_D, FN_GLO_I0_C,
 110         FN_SCIFB1_SCK_G, FN_SCK1_E, FN_ETH_RXD1,
 111         FN_RMII_RXD1, FN_HRX0_E, FN_STP_ISSYNC_0_B,
 112         FN_TS_SCK0_D, FN_GLO_I1_C, FN_SCIFB1_RXD_G,
 113         FN_RX1_E, FN_ETH_LINK, FN_RMII_LINK, FN_HTX0_E,
 114         FN_STP_IVCXO27_0_B, FN_SCIFB1_TXD_G, FN_TX1_E,
 115         FN_ETH_REF_CLK, FN_RMII_REF_CLK, FN_HCTS0_N_E,
 116         FN_STP_IVCXO27_1_B, FN_HRX0_F,
 117
 118         /* IPSR7 */
 119         FN_ETH_MDIO, FN_RMII_MDIO, FN_HRTS0_N_E,
 120         FN_SIM0_D_C, FN_HCTS0_N_F, FN_ETH_TXD1,
 121         FN_RMII_TXD1, FN_HTX0_F, FN_BPFCLK_G, FN_RDS_CLK_F,
 122         FN_ETH_TX_EN, FN_RMII_TX_EN, FN_SIM0_CLK_C,
 123         FN_HRTS0_N_F, FN_ETH_MAGIC, FN_RMII_MAGIC,
 124         FN_SIM0_RST_C, FN_ETH_TXD0, FN_RMII_TXD0,
 125         FN_STP_ISCLK_1_B, FN_TS_SDEN1_C, FN_GLO_SCLK_C,
 126         FN_ETH_MDC, FN_RMII_MDC, FN_STP_ISD_1_B,
 127         FN_TS_SPSYNC1_C, FN_GLO_SDATA_C, FN_PWM0,
 128         FN_SCIFA2_SCK_C, FN_STP_ISEN_1_B, FN_TS_SDAT1_C,
 129         FN_GLO_SS_C, FN_PWM1, FN_SCIFA2_TXD_C,
 130         FN_STP_ISSYNC_1_B, FN_TS_SCK1_C, FN_GLO_RFON_C,
 131         FN_PCMOE_N, FN_PWM2, FN_PWMFSW0, FN_SCIFA2_RXD_C,
 132         FN_PCMWE_N, FN_IECLK_C, FN_DU1_DOTCLKIN,
 133         FN_AUDIO_CLKC, FN_AUDIO_CLKOUT_C, FN_VI0_CLK,
 134         FN_ATACS00_N, FN_AVB_RXD1, FN_MII_RXD1,
 135         FN_VI0_DATA0_VI0_B0, FN_ATACS10_N, FN_AVB_RXD2,
 136         FN_MII_RXD2,
 137
 138         /* IPSR8 - IPSR16 */
 139
 140         FN_SEL_SCIF1_0, FN_SEL_SCIF1_1, FN_SEL_SCIF1_2, FN_SEL_SCIF1_3,
 141         FN_SEL_SCIF1_4,
 142         FN_SEL_SCIFB_0, FN_SEL_SCIFB_1, FN_SEL_SCIFB_2,
 143         FN_SEL_SCIFB2_0, FN_SEL_SCIFB2_1, FN_SEL_SCIFB2_2,
 144         FN_SEL_SCIFB1_0, FN_SEL_SCIFB1_1, FN_SEL_SCIFB1_2, FN_SEL_SCIFB1_3,
 145         FN_SEL_SCIFB1_4,
 146         FN_SEL_SCIFB1_5, FN_SEL_SCIFB1_6,
 147         FN_SEL_SCIFA1_0, FN_SEL_SCIFA1_1, FN_SEL_SCIFA1_2, FN_SEL_SCIFA1_3,
 148         FN_SEL_SCIF0_0, FN_SEL_SCIF0_1,
 149         FN_SEL_SCFA_0, FN_SEL_SCFA_1,
 150         FN_SEL_SOF1_0, FN_SEL_SOF1_1,
 151         FN_SEL_SSI7_0, FN_SEL_SSI7_1, FN_SEL_SSI7_2,
 152         FN_SEL_SSI6_0, FN_SEL_SSI6_1,
 153         FN_SEL_SSI5_0, FN_SEL_SSI5_1, FN_SEL_SSI5_2,
 154         FN_SEL_VI3_0, FN_SEL_VI3_1,
 155         FN_SEL_VI2_0, FN_SEL_VI2_1,
 156         FN_SEL_VI1_0, FN_SEL_VI1_1,
 157         FN_SEL_VI0_0, FN_SEL_VI0_1,
 158         FN_SEL_TSIF1_0, FN_SEL_TSIF1_1, FN_SEL_TSIF1_2,
 159         FN_SEL_LBS_0, FN_SEL_LBS_1,
 160         FN_SEL_TSIF0_0, FN_SEL_TSIF0_1, FN_SEL_TSIF0_2, FN_SEL_TSIF0_3,
 161         FN_SEL_SOF3_0, FN_SEL_SOF3_1,
 162         FN_SEL_SOF0_0, FN_SEL_SOF0_1,
 163
 164         FN_SEL_TMU1_0, FN_SEL_TMU1_1,
 165         FN_SEL_HSCIF1_0, FN_SEL_HSCIF1_1,
 166         FN_SEL_SCIFCLK_0, FN_SEL_SCIFCLK_1,
 167         FN_SEL_CAN0_0, FN_SEL_CAN0_1, FN_SEL_CAN0_2, FN_SEL_CAN0_3,
 168         FN_SEL_CANCLK_0, FN_SEL_CANCLK_1,
 169         FN_SEL_SCIFA2_0, FN_SEL_SCIFA2_1, FN_SEL_SCIFA2_2,
 170         FN_SEL_CAN1_0, FN_SEL_CAN1_1,
 171         FN_SEL_ADI_0, FN_SEL_ADI_1,
 172         FN_SEL_SSP_0, FN_SEL_SSP_1,
 173         FN_SEL_FM_0, FN_SEL_FM_1, FN_SEL_FM_2, FN_SEL_FM_3,
 174         FN_SEL_FM_4, FN_SEL_FM_5, FN_SEL_FM_6,
 175         FN_SEL_HSCIF0_0, FN_SEL_HSCIF0_1, FN_SEL_HSCIF0_2, FN_SEL_HSCIF0_3,
 176         FN_SEL_HSCIF0_4, FN_SEL_HSCIF0_5,
 177         FN_SEL_GPS_0, FN_SEL_GPS_1, FN_SEL_GPS_2,
 178         FN_SEL_RDS_0, FN_SEL_RDS_1, FN_SEL_RDS_2,
 179         FN_SEL_RDS_3, FN_SEL_RDS_4, FN_SEL_RDS_5,
 180         FN_SEL_SIM_0, FN_SEL_SIM_1, FN_SEL_SIM_2,
 181         FN_SEL_SSI8_0, FN_SEL_SSI8_1, FN_SEL_SSI8_2,
 182
 183         FN_SEL_IICDVFS_0, FN_SEL_IICDVFS_1,
 184         FN_SEL_IIC0_0, FN_SEL_IIC0_1,
 185         FN_SEL_IEB_0, FN_SEL_IEB_1, FN_SEL_IEB_2,
 186         FN_SEL_IIC2_0, FN_SEL_IIC2_1, FN_SEL_IIC2_2, FN_SEL_IIC2_3,
 187         FN_SEL_IIC2_4,
 188         FN_SEL_IIC1_0, FN_SEL_IIC1_1, FN_SEL_IIC1_2,
 189         FN_SEL_I2C2_0, FN_SEL_I2C2_1, FN_SEL_I2C2_2, FN_SEL_I2C2_3,
 190         FN_SEL_I2C2_4,
 191         FN_SEL_I2C1_0, FN_SEL_I2C1_1, FN_SEL_I2C1_2,
 192
 193         PINMUX_FUNCTION_END,
 194
 195         PINMUX_MARK_BEGIN,
 196
 197         DACK0_MARK, IRQ0_MARK, INTC_IRQ0_N_MARK, SSI_SCK6_B_MARK,
 198         VI1_VSYNC_N_MARK, VI1_VSYNC_N_B_MARK, SSI_WS78_C_MARK,
 199         DREQ1_N_MARK, VI1_CLKENB_MARK, VI1_CLKENB_B_MARK,
 200         SSI_SDATA7_C_MARK, SSI_SCK78_B_MARK, DACK1_MARK, IRQ1_MARK,
 201         INTC_IRQ1_N_MARK, SSI_WS6_B_MARK, SSI_SDATA8_C_MARK,
 202         DREQ2_N_MARK, HSCK1_B_MARK, HCTS0_N_B_MARK,
 203         MSIOF0_TXD_B_MARK, DACK2_MARK, IRQ2_MARK, INTC_IRQ2_N_MARK,
 204         SSI_SDATA6_B_MARK, HRTS0_N_B_MARK, MSIOF0_RXD_B_MARK,
 205         ETH_CRS_DV_MARK, RMII_CRS_DV_MARK, STP_ISCLK_0_B_MARK,
 206         TS_SDEN0_D_MARK, GLO_Q0_C_MARK, SCL2_E_MARK,
 207         SCL2_CIS_E_MARK, ETH_RX_ER_MARK, RMII_RX_ER_MARK,
 208         STP_ISD_0_B_MARK, TS_SPSYNC0_D_MARK, GLO_Q1_C_MARK,
 209         SDA2_E_MARK, SDA2_CIS_E_MARK, ETH_RXD0_MARK, RMII_RXD0_MARK,
 210         STP_ISEN_0_B_MARK, TS_SDAT0_D_MARK, GLO_I0_C_MARK,
 211         SCIFB1_SCK_G_MARK, SCK1_E_MARK, ETH_RXD1_MARK,
 212         RMII_RXD1_MARK, HRX0_E_MARK, STP_ISSYNC_0_B_MARK,
 213         TS_SCK0_D_MARK, GLO_I1_C_MARK, SCIFB1_RXD_G_MARK,
 214         RX1_E_MARK, ETH_LINK_MARK, RMII_LINK_MARK, HTX0_E_MARK,
 215         STP_IVCXO27_0_B_MARK, SCIFB1_TXD_G_MARK, TX1_E_MARK,
 216         ETH_REF_CLK_MARK, RMII_REF_CLK_MARK, HCTS0_N_E_MARK,
 217         STP_IVCXO27_1_B_MARK, HRX0_F_MARK,
 218
 219         ETH_MDIO_MARK, RMII_MDIO_MARK, HRTS0_N_E_MARK,
 220         SIM0_D_C_MARK, HCTS0_N_F_MARK, ETH_TXD1_MARK,
 221         RMII_TXD1_MARK, HTX0_F_MARK, BPFCLK_G_MARK, RDS_CLK_F_MARK,
 222         ETH_TX_EN_MARK, RMII_TX_EN_MARK, SIM0_CLK_C_MARK,
 223         HRTS0_N_F_MARK, ETH_MAGIC_MARK, RMII_MAGIC_MARK,
 224         SIM0_RST_C_MARK, ETH_TXD0_MARK, RMII_TXD0_MARK,
 225         STP_ISCLK_1_B_MARK, TS_SDEN1_C_MARK, GLO_SCLK_C_MARK,
 226         ETH_MDC_MARK, RMII_MDC_MARK, STP_ISD_1_B_MARK,
 227         TS_SPSYNC1_C_MARK, GLO_SDATA_C_MARK, PWM0_MARK,
 228         SCIFA2_SCK_C_MARK, STP_ISEN_1_B_MARK, TS_SDAT1_C_MARK,
 229         GLO_SS_C_MARK, PWM1_MARK, SCIFA2_TXD_C_MARK,
 230         STP_ISSYNC_1_B_MARK, TS_SCK1_C_MARK, GLO_RFON_C_MARK,
 231         PCMOE_N_MARK, PWM2_MARK, PWMFSW0_MARK, SCIFA2_RXD_C_MARK,
 232         PCMWE_N_MARK, IECLK_C_MARK, DU1_DOTCLKIN_MARK,
 233         AUDIO_CLKC_MARK, AUDIO_CLKOUT_C_MARK, VI0_CLK_MARK,
 234         ATACS00_N_MARK, AVB_RXD1_MARK, MII_RXD1_MARK,
 235         VI0_DATA0_VI0_B0_MARK, ATACS10_N_MARK, AVB_RXD2_MARK,
 236         MII_RXD2_MARK,
 237
 238         PINMUX_MARK_END,
 239 };
 240
 241 static pinmux_enum_t pinmux_data[] = {
 242         PINMUX_DATA_GP_ALL(), /* PINMUX_DATA(GP_M_N_DATA, GP_M_N_FN...), */
 243
 244         PINMUX_IPSR_DATA(IP6_2_0, DACK0),
 245         PINMUX_IPSR_DATA(IP6_2_0, IRQ0),
 246         PINMUX_IPSR_DATA(IP6_2_0, INTC_IRQ0_N),
 247         PINMUX_IPSR_MODSEL_DATA(IP6_2_0, SSI_SCK6_B, SEL_SSI6_1),
 248         PINMUX_IPSR_MODSEL_DATA(IP6_2_0, VI1_VSYNC_N, SEL_VI1_0),
 249         PINMUX_IPSR_MODSEL_DATA(IP6_2_0, VI1_VSYNC_N_B, SEL_VI1_1),
 250         PINMUX_IPSR_MODSEL_DATA(IP6_2_0, SSI_WS78_C, SEL_SSI7_2),
 251         PINMUX_IPSR_DATA(IP6_5_3, DREQ1_N),
 252         PINMUX_IPSR_MODSEL_DATA(IP6_5_3, VI1_CLKENB, SEL_VI1_0),
 253         PINMUX_IPSR_MODSEL_DATA(IP6_5_3, VI1_CLKENB_B, SEL_VI1_1),
 254         PINMUX_IPSR_MODSEL_DATA(IP6_5_3, SSI_SDATA7_C, SEL_SSI7_2),
 255         PINMUX_IPSR_MODSEL_DATA(IP6_5_3, SSI_SCK78_B, SEL_SSI7_1),
 256         PINMUX_IPSR_DATA(IP6_8_6, DACK1),
 257         PINMUX_IPSR_DATA(IP6_8_6, IRQ1),
 258         PINMUX_IPSR_DATA(IP6_8_6, INTC_IRQ1_N),
 259         PINMUX_IPSR_MODSEL_DATA(IP6_8_6, SSI_WS6_B, SEL_SSI6_1),
 260         PINMUX_IPSR_MODSEL_DATA(IP6_8_6, SSI_SDATA8_C, SEL_SSI8_2),
 261         PINMUX_IPSR_DATA(IP6_10_9, DREQ2_N),
 262         PINMUX_IPSR_MODSEL_DATA(IP6_10_9, HSCK1_B, SEL_HSCIF1_1),
 263         PINMUX_IPSR_MODSEL_DATA(IP6_10_9, HCTS0_N_B, SEL_HSCIF0_1),
 264         PINMUX_IPSR_MODSEL_DATA(IP6_10_9, MSIOF0_TXD_B, SEL_SOF0_1),
 265         PINMUX_IPSR_DATA(IP6_13_11, DACK2),
 266         PINMUX_IPSR_DATA(IP6_13_11, IRQ2),
 267         PINMUX_IPSR_DATA(IP6_13_11, INTC_IRQ2_N),
 268         PINMUX_IPSR_MODSEL_DATA(IP6_13_11, SSI_SDATA6_B, SEL_SSI6_1),
 269         PINMUX_IPSR_MODSEL_DATA(IP6_13_11, HRTS0_N_B, SEL_HSCIF0_1),
 270         PINMUX_IPSR_MODSEL_DATA(IP6_13_11, MSIOF0_RXD_B, SEL_SOF0_1),
 271         PINMUX_IPSR_DATA(IP6_16_14, ETH_CRS_DV),
 272         PINMUX_IPSR_DATA(IP6_16_14, RMII_CRS_DV),
 273         PINMUX_IPSR_MODSEL_DATA(IP6_16_14, STP_ISCLK_0_B, SEL_SSP_1),
 274         PINMUX_IPSR_MODSEL_DATA(IP6_16_14, TS_SDEN0_D, SEL_TSIF0_3),
 275         PINMUX_IPSR_MODSEL_DATA(IP6_16_14, GLO_Q0_C, SEL_GPS_2),
 276         PINMUX_IPSR_MODSEL_DATA(IP6_16_14, SCL2_E, SEL_IIC2_4),
 277         PINMUX_IPSR_MODSEL_DATA(IP6_16_14, SCL2_CIS_E, SEL_I2C2_4),
 278         PINMUX_IPSR_DATA(IP6_19_17, ETH_RX_ER),
 279         PINMUX_IPSR_DATA(IP6_19_17, RMII_RX_ER),
 280         PINMUX_IPSR_MODSEL_DATA(IP6_19_17, STP_ISD_0_B, SEL_SSP_1),
 281         PINMUX_IPSR_MODSEL_DATA(IP6_19_17, TS_SPSYNC0_D, SEL_TSIF0_3),
 282         PINMUX_IPSR_MODSEL_DATA(IP6_19_17, GLO_Q1_C, SEL_GPS_2),
 283         PINMUX_IPSR_MODSEL_DATA(IP6_19_17, SDA2_E, SEL_IIC2_4),
 284         PINMUX_IPSR_MODSEL_DATA(IP6_19_17, SDA2_CIS_E, SEL_I2C2_4),
 285         PINMUX_IPSR_DATA(IP6_22_20, ETH_RXD0),
 286         PINMUX_IPSR_DATA(IP6_22_20, RMII_RXD0),
 287         PINMUX_IPSR_MODSEL_DATA(IP6_22_20, STP_ISEN_0_B, SEL_SSP_1),
 288         PINMUX_IPSR_MODSEL_DATA(IP6_22_20, TS_SDAT0_D, SEL_TSIF0_3),
 289         PINMUX_IPSR_MODSEL_DATA(IP6_22_20, GLO_I0_C, SEL_GPS_2),
 290         PINMUX_IPSR_MODSEL_DATA(IP6_22_20, SCIFB1_SCK_G, SEL_SCIFB1_6),
 291         PINMUX_IPSR_MODSEL_DATA(IP6_22_20, SCK1_E, SEL_SCIF1_4),
 292         PINMUX_IPSR_DATA(IP6_25_23, ETH_RXD1),
 293         PINMUX_IPSR_DATA(IP6_25_23, RMII_RXD1),
 294         PINMUX_IPSR_MODSEL_DATA(IP6_25_23, HRX0_E, SEL_HSCIF0_4),
 295         PINMUX_IPSR_MODSEL_DATA(IP6_25_23, STP_ISSYNC_0_B, SEL_SSP_1),
 296         PINMUX_IPSR_MODSEL_DATA(IP6_25_23, TS_SCK0_D, SEL_TSIF0_3),
 297         PINMUX_IPSR_MODSEL_DATA(IP6_25_23, GLO_I1_C, SEL_GPS_2),
 298         PINMUX_IPSR_MODSEL_DATA(IP6_25_23, SCIFB1_RXD_G, SEL_SCIFB1_6),
 299         PINMUX_IPSR_MODSEL_DATA(IP6_25_23, RX1_E, SEL_SCIF1_4),
 300         PINMUX_IPSR_DATA(IP6_28_26, ETH_LINK),
 301         PINMUX_IPSR_DATA(IP6_28_26, RMII_LINK),
 302         PINMUX_IPSR_MODSEL_DATA(IP6_28_26, HTX0_E, SEL_HSCIF0_4),
 303         PINMUX_IPSR_MODSEL_DATA(IP6_28_26, STP_IVCXO27_0_B, SEL_SSP_1),
 304         PINMUX_IPSR_MODSEL_DATA(IP6_28_26, SCIFB1_TXD_G, SEL_SCIFB1_6),
 305         PINMUX_IPSR_MODSEL_DATA(IP6_28_26, TX1_E, SEL_SCIF1_4),
 306         PINMUX_IPSR_DATA(IP6_31_29, ETH_REF_CLK),
 307         PINMUX_IPSR_DATA(IP6_31_29, RMII_REF_CLK),
 308         PINMUX_IPSR_MODSEL_DATA(IP6_31_29, HCTS0_N_E, SEL_HSCIF0_4),
 309         PINMUX_IPSR_MODSEL_DATA(IP6_31_29, STP_IVCXO27_1_B, SEL_SSP_1),
 310         PINMUX_IPSR_MODSEL_DATA(IP6_31_29, HRX0_F, SEL_HSCIF0_5),
 311
 312         PINMUX_IPSR_DATA(IP7_2_0, ETH_MDIO),
 313         PINMUX_IPSR_DATA(IP7_2_0, RMII_MDIO),
 314         PINMUX_IPSR_MODSEL_DATA(IP7_2_0, HRTS0_N_E, SEL_HSCIF0_4),
 315         PINMUX_IPSR_MODSEL_DATA(IP7_2_0, SIM0_D_C, SEL_SIM_2),
 316         PINMUX_IPSR_MODSEL_DATA(IP7_2_0, HCTS0_N_F, SEL_HSCIF0_5),
 317         PINMUX_IPSR_DATA(IP7_5_3, ETH_TXD1),
 318         PINMUX_IPSR_DATA(IP7_5_3, RMII_TXD1),
 319         PINMUX_IPSR_MODSEL_DATA(IP7_5_3, HTX0_F, SEL_HSCIF0_4),
 320         PINMUX_IPSR_MODSEL_DATA(IP7_5_3, BPFCLK_G, SEL_SIM_2),
 321         PINMUX_IPSR_MODSEL_DATA(IP7_5_3, RDS_CLK_F, SEL_HSCIF0_5),
 322         PINMUX_IPSR_DATA(IP7_7_6, ETH_TX_EN),
 323         PINMUX_IPSR_DATA(IP7_7_6, RMII_TX_EN),
 324         PINMUX_IPSR_MODSEL_DATA(IP7_7_6, SIM0_CLK_C, SEL_SIM_2),
 325         PINMUX_IPSR_MODSEL_DATA(IP7_7_6, HRTS0_N_F, SEL_HSCIF0_5),
 326         PINMUX_IPSR_DATA(IP7_9_8, ETH_MAGIC),
 327         PINMUX_IPSR_DATA(IP7_9_8, RMII_MAGIC),
 328         PINMUX_IPSR_MODSEL_DATA(IP7_9_8, SIM0_RST_C, SEL_SIM_2),
 329         PINMUX_IPSR_DATA(IP7_12_10, ETH_TXD0),
 330         PINMUX_IPSR_DATA(IP7_12_10, RMII_TXD0),
 331         PINMUX_IPSR_MODSEL_DATA(IP7_12_10, STP_ISCLK_1_B, SEL_SSP_1),
 332         PINMUX_IPSR_MODSEL_DATA(IP7_12_10, TS_SDEN1_C, SEL_TSIF1_2),
 333         PINMUX_IPSR_MODSEL_DATA(IP7_12_10, GLO_SCLK_C, SEL_GPS_2),
 334         PINMUX_IPSR_DATA(IP7_15_13, ETH_MDC),
 335         PINMUX_IPSR_DATA(IP7_15_13, RMII_MDC),
 336         PINMUX_IPSR_MODSEL_DATA(IP7_15_13, STP_ISD_1_B, SEL_SSP_1),
 337         PINMUX_IPSR_MODSEL_DATA(IP7_15_13, TS_SPSYNC1_C, SEL_TSIF1_2),
 338         PINMUX_IPSR_MODSEL_DATA(IP7_15_13, GLO_SDATA_C, SEL_GPS_2),
 339         PINMUX_IPSR_DATA(IP7_18_16, PWM0),
 340         PINMUX_IPSR_MODSEL_DATA(IP7_18_16, SCIFA2_SCK_C, SEL_SCIFA2_2),
 341         PINMUX_IPSR_MODSEL_DATA(IP7_18_16, STP_ISEN_1_B, SEL_SSP_1),
 342         PINMUX_IPSR_MODSEL_DATA(IP7_18_16, TS_SDAT1_C, SEL_TSIF1_2),
 343         PINMUX_IPSR_MODSEL_DATA(IP7_18_16, GLO_SS_C, SEL_GPS_2),
 344         PINMUX_IPSR_DATA(IP7_21_19, PWM1),
 345         PINMUX_IPSR_MODSEL_DATA(IP7_21_19, SCIFA2_TXD_C, SEL_SCIFA2_2),
 346         PINMUX_IPSR_MODSEL_DATA(IP7_21_19, STP_ISSYNC_1_B, SEL_SSP_1),
 347         PINMUX_IPSR_MODSEL_DATA(IP7_21_19, TS_SCK1_C, SEL_TSIF1_2),
 348         PINMUX_IPSR_MODSEL_DATA(IP7_21_19, GLO_RFON_C, SEL_GPS_2),
 349         PINMUX_IPSR_DATA(IP7_21_19, PCMOE_N),
 350         PINMUX_IPSR_DATA(IP7_24_22, PWM2),
 351         PINMUX_IPSR_DATA(IP7_24_22, PWMFSW0),
 352         PINMUX_IPSR_MODSEL_DATA(IP7_24_22, SCIFA2_RXD_C, SEL_SCIFA2_2),
 353         PINMUX_IPSR_DATA(IP7_24_22, PCMWE_N),
 354         PINMUX_IPSR_MODSEL_DATA(IP7_24_22, IECLK_C, SEL_IEB_2),
 355         PINMUX_IPSR_DATA(IP7_26_25, DU1_DOTCLKIN),
 356         PINMUX_IPSR_DATA(IP7_26_25, AUDIO_CLKC),
 357         PINMUX_IPSR_DATA(IP7_26_25, AUDIO_CLKOUT_C),
 358         PINMUX_IPSR_MODSEL_DATA(IP7_28_27, VI0_CLK, SEL_VI0_0),
 359         PINMUX_IPSR_DATA(IP7_28_27, ATACS00_N),
 360         PINMUX_IPSR_DATA(IP7_28_27, AVB_RXD1),
 361         PINMUX_IPSR_DATA(IP7_28_27, MII_RXD1),
 362         PINMUX_IPSR_MODSEL_DATA(IP7_30_29, VI0_DATA0_VI0_B0, SEL_VI0_0),
 363         PINMUX_IPSR_DATA(IP7_30_29, ATACS10_N),
 364         PINMUX_IPSR_DATA(IP7_30_29, AVB_RXD2),
 365         PINMUX_IPSR_DATA(IP7_30_29, MII_RXD2),
 366
 367 };
 368
 369 static struct pinmux_gpio pinmux_gpios[] = {
 370         PINMUX_GPIO_GP_ALL(),
 371
 372         /*IPSR0 - IPSR5*/
 373         /*IPSR6*/
 374         GPIO_FN(DACK0), GPIO_FN(IRQ0), GPIO_FN(INTC_IRQ0_N),
 375         GPIO_FN(SSI_SCK6_B), GPIO_FN(VI1_VSYNC_N), GPIO_FN(VI1_VSYNC_N_B),
 376         GPIO_FN(SSI_WS78_C), GPIO_FN(DREQ1_N), GPIO_FN(VI1_CLKENB),
 377         GPIO_FN(VI1_CLKENB_B), GPIO_FN(SSI_SDATA7_C), GPIO_FN(SSI_SCK78_B),
 378         GPIO_FN(DACK1), GPIO_FN(IRQ1), GPIO_FN(INTC_IRQ1_N), GPIO_FN(SSI_WS6_B),
 379         GPIO_FN(SSI_SDATA8_C), GPIO_FN(DREQ2_N), GPIO_FN(HSCK1_B),
 380         GPIO_FN(HCTS0_N_B), GPIO_FN(MSIOF0_TXD_B), GPIO_FN(DACK2),
 381         GPIO_FN(IRQ2), GPIO_FN(INTC_IRQ2_N), GPIO_FN(SSI_SDATA6_B),
 382         GPIO_FN(HRTS0_N_B), GPIO_FN(MSIOF0_RXD_B), GPIO_FN(ETH_CRS_DV),
 383         GPIO_FN(RMII_CRS_DV), GPIO_FN(STP_ISCLK_0_B), GPIO_FN(TS_SDEN0_D),
 384         GPIO_FN(GLO_Q0_C), GPIO_FN(SCL2_E), GPIO_FN(SCL2_CIS_E),
 385         GPIO_FN(ETH_RX_ER), GPIO_FN(RMII_RX_ER), GPIO_FN(STP_ISD_0_B),
 386         GPIO_FN(TS_SPSYNC0_D), GPIO_FN(GLO_Q1_C), GPIO_FN(SDA2_E),
 387         GPIO_FN(SDA2_CIS_E), GPIO_FN(ETH_RXD0), GPIO_FN(RMII_RXD0),
 388         GPIO_FN(STP_ISEN_0_B), GPIO_FN(TS_SDAT0_D), GPIO_FN(GLO_I0_C),
 389         GPIO_FN(SCIFB1_SCK_G), GPIO_FN(SCK1_E), GPIO_FN(ETH_RXD1),
 390         GPIO_FN(RMII_RXD1), GPIO_FN(HRX0_E), GPIO_FN(STP_ISSYNC_0_B),
 391         GPIO_FN(TS_SCK0_D), GPIO_FN(GLO_I1_C), GPIO_FN(SCIFB1_RXD_G),
 392         GPIO_FN(RX1_E), GPIO_FN(ETH_LINK), GPIO_FN(RMII_LINK), GPIO_FN(HTX0_E),
 393         GPIO_FN(STP_IVCXO27_0_B), GPIO_FN(SCIFB1_TXD_G), GPIO_FN(TX1_E),
 394         GPIO_FN(ETH_REF_CLK), GPIO_FN(RMII_REF_CLK), GPIO_FN(HCTS0_N_E),
 395         GPIO_FN(STP_IVCXO27_1_B), GPIO_FN(HRX0_F),
 396
 397         /*IPSR7*/
 398         GPIO_FN(ETH_MDIO), GPIO_FN(RMII_MDIO), GPIO_FN(HRTS0_N_E),
 399         GPIO_FN(SIM0_D_C), GPIO_FN(HCTS0_N_F), GPIO_FN(ETH_TXD1),
 400         GPIO_FN(RMII_TXD1), GPIO_FN(HTX0_F), GPIO_FN(BPFCLK_G),
 401         GPIO_FN(RDS_CLK_F), GPIO_FN(ETH_TX_EN), GPIO_FN(RMII_TX_EN),
 402         GPIO_FN(SIM0_CLK_C), GPIO_FN(HRTS0_N_F), GPIO_FN(ETH_MAGIC),
 403         GPIO_FN(RMII_MAGIC), GPIO_FN(SIM0_RST_C), GPIO_FN(ETH_TXD0),
 404         GPIO_FN(RMII_TXD0), GPIO_FN(STP_ISCLK_1_B), GPIO_FN(TS_SDEN1_C),
 405         GPIO_FN(GLO_SCLK_C), GPIO_FN(ETH_MDC), GPIO_FN(RMII_MDC),
 406         GPIO_FN(STP_ISD_1_B), GPIO_FN(TS_SPSYNC1_C), GPIO_FN(GLO_SDATA_C),
 407         GPIO_FN(PWM0), GPIO_FN(SCIFA2_SCK_C), GPIO_FN(STP_ISEN_1_B),
 408         GPIO_FN(TS_SDAT1_C), GPIO_FN(GLO_SS_C), GPIO_FN(PWM1),
 409         GPIO_FN(SCIFA2_TXD_C), GPIO_FN(STP_ISSYNC_1_B), GPIO_FN(TS_SCK1_C),
 410         GPIO_FN(GLO_RFON_C), GPIO_FN(PCMOE_N), GPIO_FN(PWM2), GPIO_FN(PWMFSW0),
 411         GPIO_FN(SCIFA2_RXD_C), GPIO_FN(PCMWE_N), GPIO_FN(IECLK_C),
 412         GPIO_FN(DU1_DOTCLKIN), GPIO_FN(AUDIO_CLKC), GPIO_FN(AUDIO_CLKOUT_C),
 413         GPIO_FN(VI0_CLK), GPIO_FN(ATACS00_N), GPIO_FN(AVB_RXD1),
 414         GPIO_FN(MII_RXD1), GPIO_FN(VI0_DATA0_VI0_B0), GPIO_FN(ATACS10_N),
 415         GPIO_FN(AVB_RXD2), GPIO_FN(MII_RXD2),
 416         /*IPSR8 - IPSR16*/
 417 };
 418
 419 static struct pinmux_cfg_reg pinmux_config_regs[] = {
 420         { PINMUX_CFG_REG("GPSR0", 0xE6060004, 32, 1) {
 421                 GP_0_31_FN, FN_IP3_17_15,
 422                 GP_0_30_FN, FN_IP3_14_12,
 423                 GP_0_29_FN, FN_IP3_11_8,
 424                 GP_0_28_FN, FN_IP3_7_4,
 425                 GP_0_27_FN, FN_IP3_3_0,
 426                 GP_0_26_FN, FN_IP2_28_26,
 427                 GP_0_25_FN, FN_IP2_25_22,
 428                 GP_0_24_FN, FN_IP2_21_18,
 429                 GP_0_23_FN, FN_IP2_17_15,
 430                 GP_0_22_FN, FN_IP2_14_12,
 431                 GP_0_21_FN, FN_IP2_11_9,
 432                 GP_0_20_FN, FN_IP2_8_6,
 433                 GP_0_19_FN, FN_IP2_5_3,
 434                 GP_0_18_FN, FN_IP2_2_0,
 435                 GP_0_17_FN, FN_IP1_29_28,
 436                 GP_0_16_FN, FN_IP1_27_26,
 437                 GP_0_15_FN, FN_IP1_25_22,
 438                 GP_0_14_FN, FN_IP1_21_18,
 439                 GP_0_13_FN, FN_IP1_17_15,
 440                 GP_0_12_FN, FN_IP1_14_12,
 441                 GP_0_11_FN, FN_IP1_11_8,
 442                 GP_0_10_FN, FN_IP1_7_4,
 443                 GP_0_9_FN, FN_IP1_3_0,
 444                 GP_0_8_FN, FN_IP0_30_27,
 445                 GP_0_7_FN, FN_IP0_26_23,
 446                 GP_0_6_FN, FN_IP0_22_20,
 447                 GP_0_5_FN, FN_IP0_19_16,
 448                 GP_0_4_FN, FN_IP0_15_12,
 449                 GP_0_3_FN, FN_IP0_11_9,
 450                 GP_0_2_FN, FN_IP0_8_6,
 451                 GP_0_1_FN, FN_IP0_5_3,
 452                 GP_0_0_FN, FN_IP0_2_0 }
 453         },
 454         { PINMUX_CFG_REG("GPSR1", 0xE6060008, 32, 1) {
 455                 0, 0,
 456                 0, 0,
 457                 GP_1_29_FN, FN_IP6_13_11,
 458                 GP_1_28_FN, FN_IP6_10_9,
 459                 GP_1_27_FN, FN_IP6_8_6,
 460                 GP_1_26_FN, FN_IP6_5_3,
 461                 GP_1_25_FN, FN_IP6_2_0,
 462                 GP_1_24_FN, FN_IP5_29_27,
 463                 GP_1_23_FN, FN_IP5_26_24,
 464                 GP_1_22_FN, FN_IP5_23_21,
 465                 GP_1_21_FN, FN_IP5_20_18,
 466                 GP_1_20_FN, FN_IP5_17_15,
 467                 GP_1_19_FN, FN_IP5_14_13,
 468                 GP_1_18_FN, FN_IP5_12_10,
 469                 GP_1_17_FN, FN_IP5_9_6,
 470                 GP_1_16_FN, FN_IP5_5_3,
 471                 GP_1_15_FN, FN_IP5_2_0,
 472                 GP_1_14_FN, FN_IP4_29_27,
 473                 GP_1_13_FN, FN_IP4_26_24,
 474                 GP_1_12_FN, FN_IP4_23_21,
 475                 GP_1_11_FN, FN_IP4_20_18,
 476                 GP_1_10_FN, FN_IP4_17_15,
 477                 GP_1_9_FN, FN_IP4_14_12,
 478                 GP_1_8_FN, FN_IP4_11_9,
 479                 GP_1_7_FN, FN_IP4_8_6,
 480                 GP_1_6_FN, FN_IP4_5_3,
 481                 GP_1_5_FN, FN_IP4_2_0,
 482                 GP_1_4_FN, FN_IP3_31_29,
 483                 GP_1_3_FN, FN_IP3_28_26,
 484                 GP_1_2_FN, FN_IP3_25_23,
 485                 GP_1_1_FN, FN_IP3_22_20,
 486                 GP_1_0_FN, FN_IP3_19_18, }
 487         },
 488         { PINMUX_CFG_REG("GPSR2", 0xE606000C, 32, 1) {
 489                 0, 0,
 490                 0, 0,
 491                 GP_2_29_FN, FN_IP7_15_13,
 492                 GP_2_28_FN, FN_IP7_12_10,
 493                 GP_2_27_FN, FN_IP7_9_8,
 494                 GP_2_26_FN, FN_IP7_7_6,
 495                 GP_2_25_FN, FN_IP7_5_3,
 496                 GP_2_24_FN, FN_IP7_2_0,
 497                 GP_2_23_FN, FN_IP6_31_29,
 498                 GP_2_22_FN, FN_IP6_28_26,
 499                 GP_2_21_FN, FN_IP6_25_23,
 500                 GP_2_20_FN, FN_IP6_22_20,
 501                 GP_2_19_FN, FN_IP6_19_17,
 502                 GP_2_18_FN, FN_IP6_16_14,
 503                 GP_2_17_FN, FN_VI1_DATA7_VI1_B7,
 504                 GP_2_16_FN, FN_IP8_27,
 505                 GP_2_15_FN, FN_IP8_26,
 506                 GP_2_14_FN, FN_IP8_25_24,
 507                 GP_2_13_FN, FN_IP8_23_22,
 508                 GP_2_12_FN, FN_IP8_21_20,
 509                 GP_2_11_FN, FN_IP8_19_18,
 510                 GP_2_10_FN, FN_IP8_17_16,
 511                 GP_2_9_FN, FN_IP8_15_14,
 512                 GP_2_8_FN, FN_IP8_13_12,
 513                 GP_2_7_FN, FN_IP8_11_10,
 514                 GP_2_6_FN, FN_IP8_9_8,
 515                 GP_2_5_FN, FN_IP8_7_6,
 516                 GP_2_4_FN, FN_IP8_5_4,
 517                 GP_2_3_FN, FN_IP8_3_2,
 518                 GP_2_2_FN, FN_IP8_1_0,
 519                 GP_2_1_FN, FN_IP7_30_29,
 520                 GP_2_0_FN, FN_IP7_28_27 }
 521         },
 522         { PINMUX_CFG_REG("GPSR3", 0xE6060010, 32, 1) {
 523                 GP_3_31_FN, FN_IP11_21_18,
 524                 GP_3_30_FN, FN_IP11_17_15,
 525                 GP_3_29_FN, FN_IP11_14_13,
 526                 GP_3_28_FN, FN_IP11_12_11,
 527                 GP_3_27_FN, FN_IP11_10_9,
 528                 GP_3_26_FN, FN_IP11_8_7,
 529                 GP_3_25_FN, FN_IP11_6_5,
 530                 GP_3_24_FN, FN_IP11_4,
 531                 GP_3_23_FN, FN_IP11_3_0,
 532                 GP_3_22_FN, FN_IP10_29_26,
 533                 GP_3_21_FN, FN_IP10_25_23,
 534                 GP_3_20_FN, FN_IP10_22_19,
 535                 GP_3_19_FN, FN_IP10_18_15,
 536                 GP_3_18_FN, FN_IP10_14_11,
 537                 GP_3_17_FN, FN_IP10_10_7,
 538                 GP_3_16_FN, FN_IP10_6_4,
 539                 GP_3_15_FN, FN_IP10_3_0,
 540                 GP_3_14_FN, FN_IP9_31_28,
 541                 GP_3_13_FN, FN_IP9_27_26,
 542                 GP_3_12_FN, FN_IP9_25_24,
 543                 GP_3_11_FN, FN_IP9_23_22,
 544                 GP_3_10_FN, FN_IP9_21_20,
 545                 GP_3_9_FN, FN_IP9_19_18,
 546                 GP_3_8_FN, FN_IP9_17_16,
 547                 GP_3_7_FN, FN_IP9_15_12,
 548                 GP_3_6_FN, FN_IP9_11_8,
 549                 GP_3_5_FN, FN_IP9_7_6,
 550                 GP_3_4_FN, FN_IP9_5_4,
 551                 GP_3_3_FN, FN_IP9_3_2,
 552                 GP_3_2_FN, FN_IP9_1_0,
 553                 GP_3_1_FN, FN_IP8_30_29,
 554                 GP_3_0_FN, FN_IP8_28 }
 555         },
 556         { PINMUX_CFG_REG("GPSR4", 0xE6060014, 32, 1) {
 557                 GP_4_31_FN, FN_IP14_18_16,
 558                 GP_4_30_FN, FN_IP14_15_12,
 559                 GP_4_29_FN, FN_IP14_11_9,
 560                 GP_4_28_FN, FN_IP14_8_6,
 561                 GP_4_27_FN, FN_IP14_5_3,
 562                 GP_4_26_FN, FN_IP14_2_0,
 563                 GP_4_25_FN, FN_IP13_30_29,
 564                 GP_4_24_FN, FN_IP13_28_26,
 565                 GP_4_23_FN, FN_IP13_25_23,
 566                 GP_4_22_FN, FN_IP13_22_19,
 567                 GP_4_21_FN, FN_IP13_18_16,
 568                 GP_4_20_FN, FN_IP13_15_13,
 569                 GP_4_19_FN, FN_IP13_12_10,
 570                 GP_4_18_FN, FN_IP13_9_7,
 571                 GP_4_17_FN, FN_IP13_6_3,
 572                 GP_4_16_FN, FN_IP13_2_0,
 573                 GP_4_15_FN, FN_IP12_30_28,
 574                 GP_4_14_FN, FN_IP12_27_25,
 575                 GP_4_13_FN, FN_IP12_24_23,
 576                 GP_4_12_FN, FN_IP12_22_20,
 577                 GP_4_11_FN, FN_IP12_19_17,
 578                 GP_4_10_FN, FN_IP12_16_14,
 579                 GP_4_9_FN, FN_IP12_13_11,
 580                 GP_4_8_FN, FN_IP12_10_8,
 581                 GP_4_7_FN, FN_IP12_7_6,
 582                 GP_4_6_FN, FN_IP12_5_4,
 583                 GP_4_5_FN, FN_IP12_3_2,
 584                 GP_4_4_FN, FN_IP12_1_0,
 585                 GP_4_3_FN, FN_IP11_31_30,
 586                 GP_4_2_FN, FN_IP11_29_27,
 587                 GP_4_1_FN, FN_IP11_26_24,
 588                 GP_4_0_FN, FN_IP11_23_22 }
 589         },
 590         { PINMUX_CFG_REG("GPSR5", 0xE6060018, 32, 1) {
 591                 GP_5_31_FN, FN_IP7_24_22,
 592                 GP_5_30_FN, FN_IP7_21_19,
 593                 GP_5_29_FN, FN_IP7_18_16,
 594                 GP_5_28_FN, FN_DU_DOTCLKIN2,
 595                 GP_5_27_FN, FN_IP7_26_25,
 596                 GP_5_26_FN, FN_DU_DOTCLKIN0,
 597                 GP_5_25_FN, FN_AVS2,
 598                 GP_5_24_FN, FN_AVS1,
 599                 GP_5_23_FN, FN_USB2_OVC,
 600                 GP_5_22_FN, FN_USB2_PWEN,
 601                 GP_5_21_FN, FN_IP16_7,
 602                 GP_5_20_FN, FN_IP16_6,
 603                 GP_5_19_FN, FN_USB0_OVC_VBUS,
 604                 GP_5_18_FN, FN_USB0_PWEN,
 605                 GP_5_17_FN, FN_IP16_5_3,
 606                 GP_5_16_FN, FN_IP16_2_0,
 607                 GP_5_15_FN, FN_IP15_29_28,
 608                 GP_5_14_FN, FN_IP15_27_26,
 609                 GP_5_13_FN, FN_IP15_25_23,
 610                 GP_5_12_FN, FN_IP15_22_20,
 611                 GP_5_11_FN, FN_IP15_19_18,
 612                 GP_5_10_FN, FN_IP15_17_16,
 613                 GP_5_9_FN, FN_IP15_15_14,
 614                 GP_5_8_FN, FN_IP15_13_12,
 615                 GP_5_7_FN, FN_IP15_11_9,
 616                 GP_5_6_FN, FN_IP15_8_6,
 617                 GP_5_5_FN, FN_IP15_5_3,
 618                 GP_5_4_FN, FN_IP15_2_0,
 619                 GP_5_3_FN, FN_IP14_30_28,
 620                 GP_5_2_FN, FN_IP14_27_25,
 621                 GP_5_1_FN, FN_IP14_24_22,
 622                 GP_5_0_FN, FN_IP14_21_19 }
 623         },
 624
 625         /*IPSR0 - IPSR5*/
 626         { PINMUX_CFG_REG_VAR("IPSR6", 0xE6060038, 32,
 627                              3, 3, 3, 3, 3, 3, 3, 2, 3, 3, 3) {
 628                 /* IP6_31_29 [3] */
 629                 FN_ETH_REF_CLK, FN_RMII_REF_CLK, FN_HCTS0_N_E,
 630                 FN_STP_IVCXO27_1_B, FN_HRX0_F, 0, 0, 0,
 631                 /* IP6_28_26 [3] */
 632                 FN_ETH_LINK, FN_RMII_LINK, FN_HTX0_E,
 633                 FN_STP_IVCXO27_0_B, FN_SCIFB1_TXD_G, FN_TX1_E, 0, 0,
 634                 /* IP6_25_23 [3] */
 635                 FN_ETH_RXD1, FN_RMII_RXD1, FN_HRX0_E, FN_STP_ISSYNC_0_B,
 636                 FN_TS_SCK0_D, FN_GLO_I1_C, FN_SCIFB1_RXD_G, FN_RX1_E,
 637                 /* IP6_22_20 [3] */
 638                 FN_ETH_RXD0, FN_RMII_RXD0, FN_STP_ISEN_0_B, FN_TS_SDAT0_D,
 639                 FN_GLO_I0_C, FN_SCIFB1_SCK_G, FN_SCK1_E, 0,
 640                 /* IP6_19_17 [3] */
 641                 FN_ETH_RX_ER, FN_RMII_RX_ER, FN_STP_ISD_0_B,
 642                 FN_TS_SPSYNC0_D, FN_GLO_Q1_C, FN_SDA2_E, FN_SDA2_CIS_E, 0,
 643                 /* IP6_16_14 [3] */
 644                 FN_ETH_CRS_DV, FN_RMII_CRS_DV, FN_STP_ISCLK_0_B,
 645                 FN_TS_SDEN0_D, FN_GLO_Q0_C, FN_SCL2_E,
 646                 FN_SCL2_CIS_E, 0,
 647                 /* IP6_13_11 [3] */
 648                 FN_DACK2, FN_IRQ2, FN_INTC_IRQ2_N,
 649                 FN_SSI_SDATA6_B, FN_HRTS0_N_B, FN_MSIOF0_RXD_B, 0, 0,
 650                 /* IP6_10_9 [2] */
 651                 FN_DREQ2_N, FN_HSCK1_B, FN_HCTS0_N_B, FN_MSIOF0_TXD_B,
 652                 /* IP6_8_6 [3] */
 653                 FN_DACK1, FN_IRQ1, FN_INTC_IRQ1_N, FN_SSI_WS6_B,
 654                 FN_SSI_SDATA8_C, 0, 0, 0,
 655                 /* IP6_5_3 [3] */
 656                 FN_DREQ1_N, FN_VI1_CLKENB, FN_VI1_CLKENB_B,
 657                 FN_SSI_SDATA7_C, FN_SSI_SCK78_B, 0, 0, 0,
 658                 /* IP6_2_0 [3] */
 659                 FN_DACK0, FN_IRQ0, FN_INTC_IRQ0_N, FN_SSI_SCK6_B,
 660                 FN_VI1_VSYNC_N, FN_VI1_VSYNC_N_B, FN_SSI_WS78_C, 0, }
 661         },
 662         { PINMUX_CFG_REG_VAR("IPSR7", 0xE606003C, 32,
 663                              1, 2, 2, 2, 3, 3, 3, 3, 3, 2, 2, 3, 3) {
 664                 /* IP7_31 [1] */
 665                 0, 0,
 666                 /* IP7_30_29 [2] */
 667                 FN_VI0_DATA0_VI0_B0, FN_ATACS10_N, FN_AVB_RXD2,
 668                 FN_MII_RXD2,
 669                 /* IP7_28_27 [2] */
 670                 FN_VI0_CLK, FN_ATACS00_N, FN_AVB_RXD1, FN_MII_RXD1,
 671                 /* IP7_26_25 [2] */
 672                 FN_DU1_DOTCLKIN, FN_AUDIO_CLKC, FN_AUDIO_CLKOUT_C, 0,
 673                 /* IP7_24_22 [3] */
 674                 FN_PWM2, FN_PWMFSW0, FN_SCIFA2_RXD_C, FN_PCMWE_N, FN_IECLK_C,
 675                 0, 0, 0,
 676                 /* IP7_21_19 [3] */
 677                 FN_PWM1, FN_SCIFA2_TXD_C, FN_STP_ISSYNC_1_B, FN_TS_SCK1_C,
 678                 FN_GLO_RFON_C, FN_PCMOE_N, 0, 0,
 679                 /* IP7_18_16 [3] */
 680                 FN_PWM0, FN_SCIFA2_SCK_C, FN_STP_ISEN_1_B, FN_TS_SDAT1_C,
 681                 FN_GLO_SS_C, 0, 0, 0,
 682                 /* IP7_15_13 [3] */
 683                 FN_ETH_MDC, FN_RMII_MDC, FN_STP_ISD_1_B,
 684                 FN_TS_SPSYNC1_C, FN_GLO_SDATA_C, 0, 0, 0,
 685                 /* IP7_12_10 [3] */
 686                 FN_ETH_TXD0, FN_RMII_TXD0, FN_STP_ISCLK_1_B, FN_TS_SDEN1_C,
 687                 FN_GLO_SCLK_C, 0, 0, 0,
 688                 /* IP7_9_8 [2] */
 689                 FN_ETH_MAGIC, FN_RMII_MAGIC, FN_SIM0_RST_C, 0,
 690                 /* IP7_7_6 [2] */
 691                 FN_ETH_TX_EN, FN_RMII_TX_EN, FN_SIM0_CLK_C, FN_HRTS0_N_F,
 692                 /* IP7_5_3 [3] */
 693                 FN_ETH_TXD1, FN_RMII_TXD1, FN_HTX0_F, FN_BPFCLK_G, FN_RDS_CLK_F,
 694                 0, 0, 0,
 695                 /* IP7_2_0 [3] */
 696                 FN_ETH_MDIO, FN_RMII_MDIO, FN_HRTS0_N_E,
 697                 FN_SIM0_D_C, FN_HCTS0_N_F, 0, 0, 0, }
 698         },
 699         /*IPSR8 - IPSR16*/
 700         { PINMUX_CFG_REG("INOUTSEL0", 0xE6050004, 32, 1) { GP_INOUTSEL(0) } },
 701         { PINMUX_CFG_REG("INOUTSEL1", 0xE6051004, 32, 1) {
 702                 0, 0,
 703                 0, 0,
 704                 GP_1_29_IN, GP_1_29_OUT,
 705                 GP_1_28_IN, GP_1_28_OUT,
 706                 GP_1_27_IN, GP_1_27_OUT,
 707                 GP_1_26_IN, GP_1_26_OUT,
 708                 GP_1_25_IN, GP_1_25_OUT,
 709                 GP_1_24_IN, GP_1_24_OUT,
 710                 GP_1_23_IN, GP_1_23_OUT,
 711                 GP_1_22_IN, GP_1_22_OUT,
 712                 GP_1_21_IN, GP_1_21_OUT,
 713                 GP_1_20_IN, GP_1_20_OUT,
 714                 GP_1_19_IN, GP_1_19_OUT,
 715                 GP_1_18_IN, GP_1_18_OUT,
 716                 GP_1_17_IN, GP_1_17_OUT,
 717                 GP_1_16_IN, GP_1_16_OUT,
 718                 GP_1_15_IN, GP_1_15_OUT,
 719                 GP_1_14_IN, GP_1_14_OUT,
 720                 GP_1_13_IN, GP_1_13_OUT,
 721                 GP_1_12_IN, GP_1_12_OUT,
 722                 GP_1_11_IN, GP_1_11_OUT,
 723                 GP_1_10_IN, GP_1_10_OUT,
 724                 GP_1_9_IN, GP_1_9_OUT,
 725                 GP_1_8_IN, GP_1_8_OUT,
 726                 GP_1_7_IN, GP_1_7_OUT,
 727                 GP_1_6_IN, GP_1_6_OUT,
 728                 GP_1_5_IN, GP_1_5_OUT,
 729                 GP_1_4_IN, GP_1_4_OUT,
 730                 GP_1_3_IN, GP_1_3_OUT,
 731                 GP_1_2_IN, GP_1_2_OUT,
 732                 GP_1_1_IN, GP_1_1_OUT,
 733                 GP_1_0_IN, GP_1_0_OUT, }
 734         },
 735         { PINMUX_CFG_REG("INOUTSEL2", 0xE6052004, 32, 1) {
 736                 0, 0,
 737                 0, 0,
 738                 GP_2_29_IN, GP_2_29_OUT,
 739                 GP_2_28_IN, GP_2_28_OUT,
 740                 GP_2_27_IN, GP_2_27_OUT,
 741                 GP_2_26_IN, GP_2_26_OUT,
 742                 GP_2_25_IN, GP_2_25_OUT,
 743                 GP_2_24_IN, GP_2_24_OUT,
 744                 GP_2_23_IN, GP_2_23_OUT,
 745                 GP_2_22_IN, GP_2_22_OUT,
 746                 GP_2_21_IN, GP_2_21_OUT,
 747                 GP_2_20_IN, GP_2_20_OUT,
 748                 GP_2_19_IN, GP_2_19_OUT,
 749                 GP_2_18_IN, GP_2_18_OUT,
 750                 GP_2_17_IN, GP_2_17_OUT,
 751                 GP_2_16_IN, GP_2_16_OUT,
 752                 GP_2_15_IN, GP_2_15_OUT,
 753                 GP_2_14_IN, GP_2_14_OUT,
 754                 GP_2_13_IN, GP_2_13_OUT,
 755                 GP_2_12_IN, GP_2_12_OUT,
 756                 GP_2_11_IN, GP_2_11_OUT,
 757                 GP_2_10_IN, GP_2_10_OUT,
 758                 GP_2_9_IN, GP_2_9_OUT,
 759                 GP_2_8_IN, GP_2_8_OUT,
 760                 GP_2_7_IN, GP_2_7_OUT,
 761                 GP_2_6_IN, GP_2_6_OUT,
 762                 GP_2_5_IN, GP_2_5_OUT,
 763                 GP_2_4_IN, GP_2_4_OUT,
 764                 GP_2_3_IN, GP_2_3_OUT,
 765                 GP_2_2_IN, GP_2_2_OUT,
 766                 GP_2_1_IN, GP_2_1_OUT,
 767                 GP_2_0_IN, GP_2_0_OUT, }
 768         },
 769         { PINMUX_CFG_REG("INOUTSEL3", 0xE6053004, 32, 1) { GP_INOUTSEL(3) } },
 770         { PINMUX_CFG_REG("INOUTSEL4", 0xE6054004, 32, 1) { GP_INOUTSEL(4) } },
 771         { PINMUX_CFG_REG("INOUTSEL5", 0xE6055004, 32, 1) { GP_INOUTSEL(5) } },
 772         { },
 773 };
 774
 775 static struct pinmux_data_reg pinmux_data_regs[] = {
 776         { PINMUX_DATA_REG("INDT0", 0xE6050008, 32) { GP_INDT(0) } },
 777         { PINMUX_DATA_REG("INDT1", 0xE6051008, 32) {
 778                 0, 0, GP_1_29_DATA, GP_1_28_DATA,
 779                 GP_1_27_DATA, GP_1_26_DATA, GP_1_25_DATA, GP_1_24_DATA,
 780                 GP_1_23_DATA, GP_1_22_DATA, GP_1_21_DATA, GP_1_20_DATA,
 781                 GP_1_19_DATA, GP_1_18_DATA, GP_1_17_DATA, GP_1_16_DATA,
 782                 GP_1_15_DATA, GP_1_14_DATA, GP_1_13_DATA, GP_1_12_DATA,
 783                 GP_1_11_DATA, GP_1_10_DATA, GP_1_9_DATA, GP_1_8_DATA,
 784                 GP_1_7_DATA, GP_1_6_DATA, GP_1_5_DATA, GP_1_4_DATA,
 785                 GP_1_3_DATA, GP_1_2_DATA, GP_1_1_DATA, GP_1_0_DATA }
 786         },
 787         { PINMUX_DATA_REG("INDT2", 0xE6052008, 32) {
 788                 0, 0, GP_2_29_DATA, GP_2_28_DATA,
 789                 GP_2_27_DATA, GP_2_26_DATA, GP_2_25_DATA, GP_2_24_DATA,
 790                 GP_2_23_DATA, GP_2_22_DATA, GP_2_21_DATA, GP_2_20_DATA,
 791                 GP_2_19_DATA, GP_2_18_DATA, GP_2_17_DATA, GP_2_16_DATA,
 792                 GP_2_15_DATA, GP_2_14_DATA, GP_2_13_DATA, GP_2_12_DATA,
 793                 GP_2_11_DATA, GP_2_10_DATA, GP_2_9_DATA, GP_2_8_DATA,
 794                 GP_2_7_DATA, GP_2_6_DATA, GP_2_5_DATA, GP_2_4_DATA,
 795                 GP_2_3_DATA, GP_2_2_DATA, GP_2_1_DATA, GP_2_0_DATA }
 796         },
 797         { PINMUX_DATA_REG("INDT3", 0xE6053008, 32) { GP_INDT(3) } },
 798         { PINMUX_DATA_REG("INDT4", 0xE6054008, 32) { GP_INDT(4) } },
 799         { PINMUX_DATA_REG("INDT5", 0xE6055008, 32) { GP_INDT(5) } },
 800         { },
 801 };
 802
 803 static struct pinmux_info r8a7790_pinmux_info = {
 804         .name = "r8a7790_pfc",
 805
 806         .unlock_reg = 0xe6060000, /* PMMR */
 807
 808         .reserved_id = PINMUX_RESERVED,
 809         .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END },
 810         .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
 811         .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
 812         .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
 813         .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
 814
 815         .first_gpio = GPIO_GP_0_0,
 816         .last_gpio = GPIO_FN_MII_RXD2 /* GPIO_FN_TCLK1_B */,
 817
 818         .gpios = pinmux_gpios,
 819         .cfg_regs = pinmux_config_regs,
 820         .data_regs = pinmux_data_regs,
 821
 822         .gpio_data = pinmux_data,
 823         .gpio_data_size = ARRAY_SIZE(pinmux_data),
 824 };
 825
 826 void r8a7790_pinmux_init(void)
 827 {
 828         register_pinmux(&r8a7790_pinmux_info);
 829 }