arch/arm/dts/exynos4x12.dtsi

   1 /*
   2  * Samsung's Exynos4x12 SoCs device tree source
   3  *
   4  * Copyright (c) 2012 Samsung Electronics Co., Ltd.
   5  *              http://www.samsung.com
   6  *
   7  * Samsung's Exynos4x12 SoCs device nodes are listed in this file. Exynos4x12
   8  * based board files can include this file and provide values for board specfic
   9  * bindings.
  10  *
  11  * Note: This file does not include device nodes for all the controllers in
  12  * Exynos4x12 SoC. As device tree coverage for Exynos4x12 increases, additional
  13  * nodes can be added to this file.
  14  *
  15  * This program is free software; you can redistribute it and/or modify
  16  * it under the terms of the GNU General Public License version 2 as
  17 ` * published by the Free Software Foundation.
  18 */
  19
  20 #include "exynos4.dtsi"
  21 #include "exynos4x12-pinctrl.dtsi"
  22
  23 / {
  24         aliases {
  25                 pinctrl0 = &pinctrl_0;
  26                 pinctrl1 = &pinctrl_1;
  27                 pinctrl2 = &pinctrl_2;
  28                 pinctrl3 = &pinctrl_3;
  29                 fimc-lite0 = &fimc_lite_0;
  30                 fimc-lite1 = &fimc_lite_1;
  31                 mshc0 = &mshc_0;
  32         };
  33
  34         pd_isp: isp-power-domain@10023CA0 {
  35                 compatible = "samsung,exynos4210-pd";
  36                 reg = <0x10023CA0 0x20>;
  37         };
  38
  39         clock: clock-controller@10030000 {
  40                 compatible = "samsung,exynos4412-clock";
  41                 reg = <0x10030000 0x20000>;
  42                 #clock-cells = <1>;
  43         };
  44
  45         mct@10050000 {
  46                 compatible = "samsung,exynos4412-mct";
  47                 reg = <0x10050000 0x800>;
  48                 interrupt-parent = <&mct_map>;
  49                 interrupts = <0>, <1>, <2>, <3>, <4>;
  50                 clocks = <&clock 3>, <&clock 344>;
  51                 clock-names = "fin_pll", "mct";
  52
  53                 mct_map: mct-map {
  54                         #interrupt-cells = <1>;
  55                         #address-cells = <0>;
  56                         #size-cells = <0>;
  57                         interrupt-map = <0 &gic 0 57 0>,
  58                                         <1 &combiner 12 5>,
  59                                         <2 &combiner 12 6>,
  60                                         <3 &combiner 12 7>,
  61                                         <4 &gic 1 12 0>;
  62                 };
  63         };
  64
  65         pinctrl_0: pinctrl@11400000 {
  66                 compatible = "samsung,exynos4x12-pinctrl";
  67                 reg = <0x11400000 0x1000>;
  68                 interrupts = <0 47 0>;
  69         };
  70
  71         pinctrl_1: pinctrl@11000000 {
  72                 compatible = "samsung,exynos4x12-pinctrl";
  73                 reg = <0x11000000 0x1000>;
  74                 interrupts = <0 46 0>;
  75
  76                 wakup_eint: wakeup-interrupt-controller {
  77                         compatible = "samsung,exynos4210-wakeup-eint";
  78                         interrupt-parent = <&gic>;
  79                         interrupts = <0 32 0>;
  80                 };
  81         };
  82
  83         pinctrl_2: pinctrl@03860000 {
  84                 compatible = "samsung,exynos4x12-pinctrl";
  85                 reg = <0x03860000 0x1000>;
  86                 interrupt-parent = <&combiner>;
  87                 interrupts = <10 0>;
  88         };
  89
  90         pinctrl_3: pinctrl@106E0000 {
  91                 compatible = "samsung,exynos4x12-pinctrl";
  92                 reg = <0x106E0000 0x1000>;
  93                 interrupts = <0 72 0>;
  94         };
  95
  96         g2d@10800000 {
  97                 compatible = "samsung,exynos4212-g2d";
  98                 reg = <0x10800000 0x1000>;
  99                 interrupts = <0 89 0>;
 100                 clocks = <&clock 177>, <&clock 277>;
 101                 clock-names = "sclk_fimg2d", "fimg2d";
 102                 status = "disabled";
 103         };
 104
 105         camera {
 106                 clocks = <&clock 132>, <&clock 133>, <&clock 351>, <&clock 352>;
 107                 clock-names = "sclk_cam0", "sclk_cam1", "pxl_async0", "pxl_async1";
 108                 #address-cells = <1>;
 109                 #size-cells = <1>;
 110
 111                 fimc_0: fimc@11800000 {
 112                         compatible = "samsung,exynos4212-fimc";
 113                         samsung,pix-limits = <4224 8192 1920 4224>;
 114                         samsung,mainscaler-ext;
 115                         samsung,isp-wb;
 116                         samsung,cam-if;
 117                 };
 118
 119                 fimc_1: fimc@11810000 {
 120                         compatible = "samsung,exynos4212-fimc";
 121                         samsung,pix-limits = <4224 8192 1920 4224>;
 122                         samsung,mainscaler-ext;
 123                         samsung,isp-wb;
 124                         samsung,cam-if;
 125                 };
 126
 127                 fimc_2: fimc@11820000 {
 128                         compatible = "samsung,exynos4212-fimc";
 129                         samsung,pix-limits = <4224 8192 1920 4224>;
 130                         samsung,mainscaler-ext;
 131                         samsung,isp-wb;
 132                         samsung,lcd-wb;
 133                         samsung,cam-if;
 134                 };
 135
 136                 fimc_3: fimc@11830000 {
 137                         compatible = "samsung,exynos4212-fimc";
 138                         samsung,pix-limits = <1920 8192 1366 1920>;
 139                         samsung,rotators = <0>;
 140                         samsung,mainscaler-ext;
 141                         samsung,isp-wb;
 142                         samsung,lcd-wb;
 143                 };
 144
 145                 fimc_lite_0: fimc-lite@12390000 {
 146                         compatible = "samsung,exynos4212-fimc-lite";
 147                         reg = <0x12390000 0x1000>;
 148                         interrupts = <0 105 0>;
 149                         samsung,power-domain = <&pd_isp>;
 150                         clocks = <&clock 353>;
 151                         clock-names = "flite";
 152                         status = "disabled";
 153                 };
 154
 155                 fimc_lite_1: fimc-lite@123A0000 {
 156                         compatible = "samsung,exynos4212-fimc-lite";
 157                         reg = <0x123A0000 0x1000>;
 158                         interrupts = <0 106 0>;
 159                         samsung,power-domain = <&pd_isp>;
 160                         clocks = <&clock 354>;
 161                         clock-names = "flite";
 162                         status = "disabled";
 163                 };
 164
 165                 fimc_is: fimc-is@12000000 {
 166                         compatible = "samsung,exynos4212-fimc-is", "simple-bus";
 167                         reg = <0x12000000 0x260000>;
 168                         interrupts = <0 90 0>, <0 95 0>;
 169                         samsung,power-domain = <&pd_isp>;
 170                         clocks = <&clock 353>, <&clock 354>, <&clock 355>,
 171                                 <&clock 356>, <&clock 17>, <&clock 357>,
 172                                 <&clock 358>, <&clock 359>, <&clock 360>,
 173                                 <&clock 450>,<&clock 451>, <&clock 452>,
 174                                 <&clock 453>, <&clock 176>, <&clock 13>,
 175                                 <&clock 454>, <&clock 395>, <&clock 455>;
 176                         clock-names = "lite0", "lite1", "ppmuispx",
 177                                       "ppmuispmx", "mpll", "isp",
 178                                       "drc", "fd", "mcuisp",
 179                                       "ispdiv0", "ispdiv1", "mcuispdiv0",
 180                                       "mcuispdiv1", "uart", "aclk200",
 181                                       "div_aclk200", "aclk400mcuisp",
 182                                       "div_aclk400mcuisp";
 183                         #address-cells = <1>;
 184                         #size-cells = <1>;
 185                         ranges;
 186                         status = "disabled";
 187
 188                         pmu {
 189                                 reg = <0x10020000 0x3000>;
 190                         };
 191
 192                         i2c1_isp: i2c-isp@12140000 {
 193                                 compatible = "samsung,exynos4212-i2c-isp";
 194                                 reg = <0x12140000 0x100>;
 195                                 clocks = <&clock 370>;
 196                                 clock-names = "i2c_isp";
 197                                 #address-cells = <1>;
 198                                 #size-cells = <0>;
 199                         };
 200                 };
 201         };
 202
 203         mshc_0: mmc@12550000 {
 204                 compatible = "samsung,exynos4412-dw-mshc";
 205                 reg = <0x12550000 0x1000>;
 206                 interrupts = <0 77 0>;
 207                 #address-cells = <1>;
 208                 #size-cells = <0>;
 209                 fifo-depth = <0x80>;
 210                 clocks = <&clock 301>, <&clock 149>;
 211                 clock-names = "biu", "ciu";
 212                 status = "disabled";
 213         };
 214 };