arch/arm/dts/mx53.dtsi

   1 /*
   2  * Copyright 2011 Freescale Semiconductor, Inc.
   3  * Copyright 2011 Linaro Ltd.
   4  *
   5  * The code contained herein is licensed under the GNU General Public
   6  * License. You may obtain a copy of the GNU General Public License
   7  * Version 2 or later at the following locations:
   8  *
   9  * http://www.opensource.org/licenses/gpl-license.html
  10  * http://www.gnu.org/copyleft/gpl.html
  11  */
  12
  13 /include/ "skeleton.dtsi"
  14
  15 / {
  16         aliases {
  17                 serial0 = &uart1;
  18                 serial1 = &uart2;
  19                 serial2 = &uart3;
  20                 serial3 = &uart4;
  21                 serial4 = &uart5;
  22                 gpio1 = &gpio1;
  23                 gpio2 = &gpio2;
  24                 gpio3 = &gpio3;
  25                 gpio4 = &gpio4;
  26                 gpio5 = &gpio5;
  27                 gpio6 = &gpio6;
  28                 gpio7 = &gpio7;
  29         };
  30
  31         tzic: tz-interrupt-controller@0fffc000 {
  32                 compatible = "fsl,imx53-tzic", "fsl,tzic";
  33                 interrupt-controller;
  34                 #interrupt-cells = <1>;
  35                 reg = <0x0fffc000 0x4000>;
  36         };
  37
  38         clocks {
  39                 #address-cells = <1>;
  40                 #size-cells = <0>;
  41
  42                 ckil {
  43                         compatible = "fsl,imx-ckil", "fixed-clock";
  44                         clock-frequency = <32768>;
  45                 };
  46
  47                 ckih1 {
  48                         compatible = "fsl,imx-ckih1", "fixed-clock";
  49                         clock-frequency = <22579200>;
  50                 };
  51
  52                 ckih2 {
  53                         compatible = "fsl,imx-ckih2", "fixed-clock";
  54                         clock-frequency = <0>;
  55                 };
  56
  57                 osc {
  58                         compatible = "fsl,imx-osc", "fixed-clock";
  59                         clock-frequency = <24000000>;
  60                 };
  61         };
  62
  63         soc {
  64                 #address-cells = <1>;
  65                 #size-cells = <1>;
  66                 compatible = "simple-bus";
  67                 interrupt-parent = <&tzic>;
  68                 ranges;
  69
  70                 extmc@00000000 {
  71                         compatible = "fsl,extmc", "simple-bus";
  72                         #address-cells = <1>;
  73                         #size-cells = <1>;
  74                         reg = <0x00000000 0x40000000>;
  75                         ranges;
  76
  77                         sata@10000000 {
  78                                 compatible = "fsl,imx53-sata", "fsl,imx-ahci";
  79                                 reg = <0x10000000 0x00004000>;
  80                                 interrupts = <28>;
  81                                 status = "disabled";
  82                         };
  83
  84                         ipu@1e000000 {
  85                                 compatible = "fsl,imx-ipuv3";
  86                                 #address-cells = <1>;
  87                                 #size-cells = <0>;
  88                                 reg = <0x1e000000 0x02000000>;
  89                                 interrupts = <10 11>;
  90                                 status = "disabled";
  91                         };
  92                 };
  93
  94                 aips@50000000 { /* AIPS1 */
  95                         compatible = "fsl,aips-bus", "simple-bus";
  96                         #address-cells = <1>;
  97                         #size-cells = <1>;
  98                         reg = <0x50000000 0x10000000>;
  99                         ranges;
 100
 101                         spba@50000000 {
 102                                 compatible = "fsl,spba-bus", "simple-bus";
 103                                 #address-cells = <1>;
 104                                 #size-cells = <1>;
 105                                 reg = <0x50000000 0x40000>;
 106                                 ranges;
 107
 108                                 esdhc@50004000 { /* ESDHC1 */
 109                                         compatible = "fsl,imx53-esdhc";
 110                                         reg = <0x50004000 0x4000>;
 111                                         interrupts = <1>;
 112                                         status = "disabled";
 113                                 };
 114
 115                                 esdhc@50008000 { /* ESDHC2 */
 116                                         compatible = "fsl,imx53-esdhc";
 117                                         reg = <0x50008000 0x4000>;
 118                                         interrupts = <2>;
 119                                         status = "disabled";
 120                                 };
 121
 122                                 uart3: uart@5000c000 {
 123                                         compatible = "fsl,imx53-uart", "fsl,imx21-uart";
 124                                         reg = <0x5000c000 0x4000>;
 125                                         interrupts = <33>;
 126                                         status = "disabled";
 127                                 };
 128
 129                                 ecspi@50010000 { /* ECSPI1 */
 130                                         #address-cells = <1>;
 131                                         #size-cells = <0>;
 132                                         compatible = "fsl,imx53-ecspi", "fsl,imx51-ecspi";
 133                                         reg = <0x50010000 0x4000>;
 134                                         interrupts = <36>;
 135                                         status = "disabled";
 136                                 };
 137
 138                                 ssi2: ssi@50014000 {
 139                                         compatible = "fsl,imx-ssi";
 140                                         reg = <0x50014000 0x4000>;
 141                                         interrupts = <30>;
 142                                         status = "disabled";
 143                                 };
 144
 145                                 esdhc@50020000 { /* ESDHC3 */
 146                                         compatible = "fsl,imx53-esdhc";
 147                                         reg = <0x50020000 0x4000>;
 148                                         interrupts = <3>;
 149                                         status = "disabled";
 150                                 };
 151
 152                                 esdhc@50024000 { /* ESDHC4 */
 153                                         compatible = "fsl,imx53-esdhc";
 154                                         reg = <0x50024000 0x4000>;
 155                                         interrupts = <4>;
 156                                         status = "disabled";
 157                                 };
 158                         };
 159
 160                         imxotg@53f80000 {
 161                                 compatible = "fsl,imx-otg";
 162                                 reg = <0x53f80000 0x200>;
 163                                 interrupts = <18>;
 164                                 status = "disabled";
 165
 166                                 phy-mode = "utmi-wide";
 167                                 host-device-name = "mxc-ehci";
 168                                 host-device-id = <0>;
 169                                 gadget-device-name = "fsl-usb2-udc";
 170                         };
 171
 172                         imxotg@53f80200 {
 173                                 compatible = "fsl,imx-otg";
 174                                 reg = <0x53f80200 0x200>;
 175                                 interrupts = <14>;
 176                                 status = "disabled";
 177
 178                                 phy-mode = "utmi-wide";
 179                                 host-device-name = "mxc-ehci";
 180                                 host-device-id = <1>;
 181                         };
 182
 183                         mxc-ehci@53f80400 {
 184                                 compatible = "fsl,mxc-ehci";
 185                                 reg = <0x53f80400 0x200>;
 186                                 interrupts = <16>;
 187                                 status = "disabled";
 188                         };
 189
 190                         mxc-ehci@53f80600 {
 191                                 compatible = "fsl,mxc-ehci";
 192                                 reg = <0x53f80600 0x200>;
 193                                 interrupts = <17>;
 194                                 status = "disabled";
 195                         };
 196
 197                         imx-usb-phy@53f80800 {
 198                                 compatible = "fsl,imx53-usb-phy", "fsl,imx-usb-phy";
 199                                 reg = <0x53f80800 0x200>;
 200                                 status = "disabled";
 201                         };
 202
 203                         gpio1: gpio@53f84000 {
 204                                 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
 205                                 reg = <0x53f84000 0x4000>;
 206                                 interrupts = <50 51>;
 207                                 gpio-controller;
 208                                 #gpio-cells = <2>;
 209                                 interrupt-controller;
 210                                 #interrupt-cells = <1>;
 211                         };
 212
 213                         gpio2: gpio@53f88000 {
 214                                 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
 215                                 reg = <0x53f88000 0x4000>;
 216                                 interrupts = <52 53>;
 217                                 gpio-controller;
 218                                 #gpio-cells = <2>;
 219                                 interrupt-controller;
 220                                 #interrupt-cells = <1>;
 221                         };
 222
 223                         gpio3: gpio@53f8c000 {
 224                                 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
 225                                 reg = <0x53f8c000 0x4000>;
 226                                 interrupts = <54 55>;
 227                                 gpio-controller;
 228                                 #gpio-cells = <2>;
 229                                 interrupt-controller;
 230                                 #interrupt-cells = <1>;
 231                         };
 232
 233                         gpio4: gpio@53f90000 {
 234                                 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
 235                                 reg = <0x53f90000 0x4000>;
 236                                 interrupts = <56 57>;
 237                                 gpio-controller;
 238                                 #gpio-cells = <2>;
 239                                 interrupt-controller;
 240                                 #interrupt-cells = <1>;
 241                         };
 242
 243                         keypad@53f94000 {
 244                                 compatible = "fsl,imx-keypad";
 245                                 reg = <0x53f94000 0x4000>;
 246                                 interrupts = <60>;
 247                                 status = "disabled";
 248                         };
 249
 250                         wdog@53f98000 { /* WDOG1 */
 251                                 compatible = "fsl,imx53-wdt", "fsl,imx21-wdt";
 252                                 reg = <0x53f98000 0x4000>;
 253                                 interrupts = <58>;
 254                                 status = "disabled";
 255                         };
 256
 257                         wdog@53f9c000 { /* WDOG2 */
 258                                 compatible = "fsl,imx53-wdt", "fsl,imx21-wdt";
 259                                 reg = <0x53f9c000 0x4000>;
 260                                 interrupts = <59>;
 261                                 status = "disabled";
 262                         };
 263
 264                         iomuxc@53fa8000 {
 265                                 compatible = "fsl,imx53-iomuxc";
 266                                 reg = <0x53fa8000 0x4000>;
 267
 268                                 audmux {
 269                                         pinctrl_audmux_1: audmuxgrp-1 {
 270                                                 fsl,pins = <
 271                                                         10 0x80 /* MX53_PAD_KEY_COL0__AUDMUX_AUD5_TXC */
 272                                                         17 0x80 /* MX53_PAD_KEY_ROW0__AUDMUX_AUD5_TXD */
 273                                                         23 0x80 /* MX53_PAD_KEY_COL1__AUDMUX_AUD5_TXFS */
 274                                                         30 0x80 /* MX53_PAD_KEY_ROW1__AUDMUX_AUD5_RXD */
 275                                                 >;
 276                                         };
 277                                 };
 278
 279                                 fec {
 280                                         pinctrl_fec_1: fecgrp-1 {
 281                                                 fsl,pins = <
 282                                                         820 0x80        /* MX53_PAD_FEC_MDC__FEC_MDC */
 283                                                         779 0x80        /* MX53_PAD_FEC_MDIO__FEC_MDIO */
 284                                                         786 0x80        /* MX53_PAD_FEC_REF_CLK__FEC_TX_CLK */
 285                                                         791 0x80        /* MX53_PAD_FEC_RX_ER__FEC_RX_ER */
 286                                                         796 0x80        /* MX53_PAD_FEC_CRS_DV__FEC_RX_DV */
 287                                                         799 0x80        /* MX53_PAD_FEC_RXD1__FEC_RDATA_1 */
 288                                                         804 0x80        /* MX53_PAD_FEC_RXD0__FEC_RDATA_0 */
 289                                                         808 0x80        /* MX53_PAD_FEC_TX_EN__FEC_TX_EN */
 290                                                         811 0x80        /* MX53_PAD_FEC_TXD1__FEC_TDATA_1 */
 291                                                         816 0x80        /* MX53_PAD_FEC_TXD0__FEC_TDATA_0 */
 292                                                 >;
 293                                         };
 294                                 };
 295
 296                                 ecspi1 {
 297                                         pinctrl_ecspi1_1: ecspi1grp-1 {
 298                                                 fsl,pins = <
 299                                                         433 0x80        /* MX53_PAD_EIM_D16__ECSPI1_SCLK */
 300                                                         439 0x80        /* MX53_PAD_EIM_D17__ECSPI1_MISO */
 301                                                         445 0x80        /* MX53_PAD_EIM_D18__ECSPI1_MOSI */
 302                                                 >;
 303                                         };
 304                                 };
 305
 306                                 esdhc1 {
 307                                         pinctrl_esdhc1_1: esdhc1grp-1 {
 308                                                 fsl,pins = <
 309                                                         995  0x1d4      /* MX53_PAD_SD1_DATA0__ESDHC1_DAT0 */
 310                                                         1000 0x1d4      /* MX53_PAD_SD1_DATA1__ESDHC1_DAT1 */
 311                                                         1010 0x1d4      /* MX53_PAD_SD1_DATA2__ESDHC1_DAT2 */
 312                                                         1024 0x1c4      /* MX53_PAD_SD1_DATA3__ESDHC1_DAT3 */
 313                                                         1005 0x1d4      /* MX53_PAD_SD1_CMD__ESDHC1_CMD */
 314                                                         1018 0x1d4      /* MX53_PAD_SD1_CLK__ESDHC1_CLK */
 315                                                 >;
 316                                         };
 317
 318                                         pinctrl_esdhc1_2: esdhc1grp-2 {
 319                                                 fsl,pins = <
 320                                                         995  0x1d4      /* MX53_PAD_SD1_DATA0__ESDHC1_DAT0 */
 321                                                         1000 0x1d4      /* MX53_PAD_SD1_DATA1__ESDHC1_DAT1 */
 322                                                         1010 0x1d4      /* MX53_PAD_SD1_DATA2__ESDHC1_DAT2 */
 323                                                         1024 0x1c4      /* MX53_PAD_SD1_DATA3__ESDHC1_DAT3 */
 324                                                         941  0x1d4      /* MX53_PAD_PATA_DATA8__ESDHC1_DAT4 */
 325                                                         948  0x1d4      /* MX53_PAD_PATA_DATA9__ESDHC1_DAT5 */
 326                                                         955  0x1d4      /* MX53_PAD_PATA_DATA10__ESDHC1_DAT6 */
 327                                                         962  0x1d4      /* MX53_PAD_PATA_DATA11__ESDHC1_DAT7 */
 328                                                         1005 0x1d4      /* MX53_PAD_SD1_CMD__ESDHC1_CMD */
 329                                                         1018 0x1d4      /* MX53_PAD_SD1_CLK__ESDHC1_CLK */
 330                                                 >;
 331                                         };
 332                                 };
 333
 334                                 esdhc2 {
 335                                         pinctrl_esdhc2_1: esdhc2grp-1 {
 336                                                 fsl,pins = <
 337                                                         1038 0x1d5      /* MX53_PAD_SD2_CMD__ESDHC2_CMD */
 338                                                         1032 0x1d5      /* MX53_PAD_SD2_CLK__ESDHC2_CLK */
 339                                                         1062 0x1d5      /* MX53_PAD_SD2_DATA0__ESDHC2_DAT0 */
 340                                                         1056 0x1d5      /* MX53_PAD_SD2_DATA1__ESDHC2_DAT1 */
 341                                                         1050 0x1d5      /* MX53_PAD_SD2_DATA2__ESDHC2_DAT2 */
 342                                                         1044 0x1d5      /* MX53_PAD_SD2_DATA3__ESDHC2_DAT3 */
 343                                                 >;
 344                                         };
 345                                 };
 346
 347                                 esdhc3 {
 348                                         pinctrl_esdhc3_1: esdhc3grp-1 {
 349                                                 fsl,pins = <
 350                                                         943 0x1d5       /* MX53_PAD_PATA_DATA8__ESDHC3_DAT0 */
 351                                                         950 0x1d5       /* MX53_PAD_PATA_DATA9__ESDHC3_DAT1 */
 352                                                         957 0x1d5       /* MX53_PAD_PATA_DATA10__ESDHC3_DAT2 */
 353                                                         964 0x1d5       /* MX53_PAD_PATA_DATA11__ESDHC3_DAT3 */
 354                                                         893 0x1d5       /* MX53_PAD_PATA_DATA0__ESDHC3_DAT4 */
 355                                                         900 0x1d5       /* MX53_PAD_PATA_DATA1__ESDHC3_DAT5 */
 356                                                         906 0x1d5       /* MX53_PAD_PATA_DATA2__ESDHC3_DAT6 */
 357                                                         912 0x1d5       /* MX53_PAD_PATA_DATA3__ESDHC3_DAT7 */
 358                                                         857 0x1d5       /* MX53_PAD_PATA_RESET_B__ESDHC3_CMD */
 359                                                         863 0x1d5       /* MX53_PAD_PATA_IORDY__ESDHC3_CLK */
 360                                                 >;
 361                                         };
 362                                 };
 363
 364                                 i2c1 {
 365                                         pinctrl_i2c1_1: i2c1grp-1 {
 366                                                 fsl,pins = <
 367                                                         333 0xc0        /* MX53_PAD_CSI0_DAT8__I2C1_SDA */
 368                                                         341 0xc0        /* MX53_PAD_CSI0_DAT9__I2C1_SCL */
 369                                                 >;
 370                                         };
 371
 372                                         pinctrl_i2c1_2: i2c1grp-2 {
 373                                                 fsl,pins = <
 374                                                         529 0xc0        /* MX53_PAD_EIM_D28__I2C1_SDA */
 375                                                         469 0xc0        /* MX53_PAD_EIM_D21__I2C1_SCL */
 376                                                 >;
 377                                         };
 378                                 };
 379
 380                                 i2c2 {
 381                                         pinctrl_i2c2_1: i2c2grp-1 {
 382                                                 fsl,pins = <
 383                                                         61 0xc0         /* MX53_PAD_KEY_ROW3__I2C2_SDA */
 384                                                         53 0xc0         /* MX53_PAD_KEY_COL3__I2C2_SCL */
 385                                                 >;
 386                                         };
 387                                 };
 388
 389                                 i2c3 {
 390                                         pinctrl_i2c3_1: i2c3grp-1 {
 391                                                 fsl,pins = <
 392                                                         1102 0xc0       /* MX53_PAD_GPIO_6__I2C3_SDA */
 393                                                         1094 0xc0       /* MX53_PAD_GPIO_3__I2C3_SCL */
 394                                                 >;
 395                                         };
 396                                 };
 397
 398                                 uart1 {
 399                                         pinctrl_uart1_1: uart1grp-1 {
 400                                                 fsl,pins = <
 401                                                         346 0x1c5       /* MX53_PAD_CSI0_DAT10__UART1_TXD_MUX */
 402                                                         354 0x1c5       /* MX53_PAD_CSI0_DAT11__UART1_RXD_MUX */
 403                                                 >;
 404                                         };
 405
 406                                         pinctrl_uart1_2: uart1grp-2 {
 407                                                 fsl,pins = <
 408                                                         828 0x1c5       /* MX53_PAD_PATA_DIOW__UART1_TXD_MUX */
 409                                                         832 0x1c5       /* MX53_PAD_PATA_DMACK__UART1_RXD_MUX */
 410                                                 >;
 411                                         };
 412                                 };
 413
 414                                 uart2 {
 415                                         pinctrl_uart2_1: uart2grp-1 {
 416                                                 fsl,pins = <
 417                                                         841 0x1c5       /* MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX */
 418                                                         836 0x1c5       /* MX53_PAD_PATA_DMARQ__UART2_TXD_MUX */
 419                                                 >;
 420                                         };
 421                                 };
 422
 423                                 uart3 {
 424                                         pinctrl_uart3_1: uart3grp-1 {
 425                                                 fsl,pins = <
 426                                                         884 0x1c5       /* MX53_PAD_PATA_CS_0__UART3_TXD_MUX */
 427                                                         888 0x1c5       /* MX53_PAD_PATA_CS_1__UART3_RXD_MUX */
 428                                                         875 0x1c5       /* MX53_PAD_PATA_DA_1__UART3_CTS */
 429                                                         880 0x1c5       /* MX53_PAD_PATA_DA_2__UART3_RTS */
 430                                                 >;
 431                                         };
 432                                 };
 433                         };
 434                         pwm@53fb4000 {
 435                                 compatible = "fsl,imx53-pwm", "fsl,imx27-pwm";
 436                                 reg = <0x53fb4000 0x4000>;
 437                                 interrupts = <61>;
 438                                 status = "disabled";
 439                         };
 440
 441                         pwm@53fb8000 {
 442                                 compatible = "fsl,imx53-pwm", "fsl,imx27-pwm";
 443                                 reg = <0x53fb8000 0x4000>;
 444                                 interrupts = <94>;
 445                                 status = "disabled";
 446                         };
 447
 448                         uart1: uart@53fbc000 {
 449                                 compatible = "fsl,imx53-uart", "fsl,imx21-uart";
 450                                 reg = <0x53fbc000 0x4000>;
 451                                 interrupts = <31>;
 452                                 status = "disabled";
 453                         };
 454
 455                         uart2: uart@53fc0000 {
 456                                 compatible = "fsl,imx53-uart", "fsl,imx21-uart";
 457                                 reg = <0x53fc0000 0x4000>;
 458                                 interrupts = <32>;
 459                                 status = "disabled";
 460                         };
 461
 462                         can1: flexcan@53fc8000 {
 463                                 compatible = "fsl,p1010-flexcan";
 464                                 reg = <0x53fc8000 0x4000>;
 465                                 interrupts = <82>;
 466                                 status = "disabled";
 467                         };
 468
 469                         can2: flexcan@53fcc000 {
 470                                 compatible = "fsl,p1010-flexcan";
 471                                 reg = <0x53fcc000 0x4000>;
 472                                 interrupts = <83>;
 473                                 status = "disabled";
 474                         };
 475
 476                         gpio5: gpio@53fdc000 {
 477                                 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
 478                                 reg = <0x53fdc000 0x4000>;
 479                                 interrupts = <103 104>;
 480                                 gpio-controller;
 481                                 #gpio-cells = <2>;
 482                                 interrupt-controller;
 483                                 #interrupt-cells = <1>;
 484                         };
 485
 486                         gpio6: gpio@53fe0000 {
 487                                 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
 488                                 reg = <0x53fe0000 0x4000>;
 489                                 interrupts = <105 106>;
 490                                 gpio-controller;
 491                                 #gpio-cells = <2>;
 492                                 interrupt-controller;
 493                                 #interrupt-cells = <1>;
 494                         };
 495
 496                         gpio7: gpio@53fe4000 {
 497                                 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
 498                                 reg = <0x53fe4000 0x4000>;
 499                                 interrupts = <107 108>;
 500                                 gpio-controller;
 501                                 #gpio-cells = <2>;
 502                                 interrupt-controller;
 503                                 #interrupt-cells = <1>;
 504                         };
 505
 506                         i2c@53fec000 { /* I2C3 */
 507                                 #address-cells = <1>;
 508                                 #size-cells = <0>;
 509                                 compatible = "fsl,imx53-i2c", "fsl,imx1-i2c";
 510                                 reg = <0x53fec000 0x4000>;
 511                                 interrupts = <64>;
 512                                 status = "disabled";
 513                         };
 514
 515                         uart4: uart@53ff0000 {
 516                                 compatible = "fsl,imx53-uart", "fsl,imx21-uart";
 517                                 reg = <0x53ff0000 0x4000>;
 518                                 interrupts = <13>;
 519                                 status = "disabled";
 520                         };
 521                 };
 522
 523                 aips@60000000 { /* AIPS2 */
 524                         compatible = "fsl,aips-bus", "simple-bus";
 525                         #address-cells = <1>;
 526                         #size-cells = <1>;
 527                         reg = <0x60000000 0x10000000>;
 528                         ranges;
 529
 530                         uart5: uart@63f90000 {
 531                                 compatible = "fsl,imx53-uart", "fsl,imx21-uart";
 532                                 reg = <0x63f90000 0x4000>;
 533                                 interrupts = <86>;
 534                                 status = "disabled";
 535                         };
 536
 537                         ecspi@63fac000 { /* ECSPI2 */
 538                                 #address-cells = <1>;
 539                                 #size-cells = <0>;
 540                                 compatible = "fsl,imx53-ecspi", "fsl,imx51-ecspi";
 541                                 reg = <0x63fac000 0x4000>;
 542                                 interrupts = <37>;
 543                                 status = "disabled";
 544                         };
 545
 546                         sdma@63fb0000 {
 547                                 compatible = "fsl,imx53-sdma", "fsl,imx35-sdma";
 548                                 reg = <0x63fb0000 0x4000>;
 549                                 interrupts = <6>;
 550                                 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx53.bin";
 551                         };
 552
 553                         cspi@63fc0000 {
 554                                 #address-cells = <1>;
 555                                 #size-cells = <0>;
 556                                 compatible = "fsl,imx53-cspi", "fsl,imx35-cspi";
 557                                 reg = <0x63fc0000 0x4000>;
 558                                 interrupts = <38>;
 559                                 status = "disabled";
 560                         };
 561
 562                         i2c@63fc4000 { /* I2C2 */
 563                                 #address-cells = <1>;
 564                                 #size-cells = <0>;
 565                                 compatible = "fsl,imx53-i2c", "fsl,imx1-i2c";
 566                                 reg = <0x63fc4000 0x4000>;
 567                                 interrupts = <63>;
 568                                 status = "disabled";
 569                         };
 570
 571                         i2c@63fc8000 { /* I2C1 */
 572                                 #address-cells = <1>;
 573                                 #size-cells = <0>;
 574                                 compatible = "fsl,imx53-i2c", "fsl,imx1-i2c";
 575                                 reg = <0x63fc8000 0x4000>;
 576                                 interrupts = <62>;
 577                                 status = "disabled";
 578                         };
 579
 580                         ssi1: ssi@63fcc000 {
 581                                 compatible = "fsl,imx-ssi";
 582                                 reg = <0x63fcc000 0x4000>;
 583                                 interrupts = <29>;
 584                                 status = "disabled";
 585                         };
 586
 587                         audmux@63fd0000 {
 588                                 compatible = "fsl,imx53-audmux", "fsl,imx31-audmux";
 589                                 reg = <0x63fd0000 0x4000>;
 590                                 status = "disabled";
 591                         };
 592
 593                         nand@63fdb000 {
 594                                 compatible = "fsl,imx53-nand", "mxc_nand";
 595                                 reg = <0xf7ff0000 0x10000>, <0x63fdb000 0x4000>;
 596                                 interrupts = <8>;
 597                                 status = "disabled";
 598                         };
 599
 600                         ssi3: ssi@63fe8000 {
 601                                 compatible = "fsl,imx-ssi";
 602                                 reg = <0x63fe8000 0x4000>;
 603                                 interrupts = <96>;
 604                                 status = "disabled";
 605                         };
 606
 607                         ethernet@63fec000 {
 608                                 compatible = "fsl,imx53-fec", "fsl,imx25-fec";
 609                                 reg = <0x63fec000 0x4000>;
 610                                 interrupts = <87>;
 611                                 status = "disabled";
 612                         };
 613                 };
 614         };
 615 };