arch/arm/imx-common/sata.c

   1 /*
   2  * Copyright 2011 Freescale Semiconductor, Inc.
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7 #include <asm/imx-common/iomux-v3.h>
   8 #include <asm/arch/iomux.h>
   9 #include <asm/io.h>
  10 #include <asm/arch/clock.h>
  11 #include <asm/arch/sys_proto.h>
  12
  13 int setup_sata(void)
  14 {
  15         struct iomuxc_base_regs *const iomuxc_regs
  16                 = (struct iomuxc_base_regs *)IOMUXC_BASE_ADDR;
  17         int ret;
  18
  19         if (!is_cpu_type(MXC_CPU_MX6Q) && !is_cpu_type(MXC_CPU_MX6D))
  20                 return 1;
  21
  22         ret = enable_sata_clock();
  23         if (ret)
  24                 return ret;
  25
  26         clrsetbits_le32(&iomuxc_regs->gpr[13],
  27                         IOMUXC_GPR13_SATA_MASK,
  28                         IOMUXC_GPR13_SATA_PHY_8_RXEQ_3P0DB
  29                         |IOMUXC_GPR13_SATA_PHY_7_SATA2M
  30                         |IOMUXC_GPR13_SATA_SPEED_3G
  31                         |(3<<IOMUXC_GPR13_SATA_PHY_6_SHIFT)
  32                         |IOMUXC_GPR13_SATA_SATA_PHY_5_SS_DISABLED
  33                         |IOMUXC_GPR13_SATA_SATA_PHY_4_ATTEN_9_16
  34                         |IOMUXC_GPR13_SATA_PHY_3_TXBOOST_0P00_DB
  35                         |IOMUXC_GPR13_SATA_PHY_2_TX_1P104V
  36                         |IOMUXC_GPR13_SATA_PHY_1_SLOW);
  37
  38         return 0;
  39 }