arch/arm/include/asm/arch-am33xx/nand.h

   1 /*
   2  * (C) Copyright 2010-2011 Texas Instruments, <www.ti.com>
   3  * Mansoor Ahamed <mansoor.ahamed@ti.com>
   4  *
   5  * Derived from work done by Rohit Choraria <rohitkc@ti.com> for omap3
   6  *
   7  * See file CREDITS for list of people who contributed to this
   8  * project.
   9  *
  10  * This program is free software; you can redistribute it and/or
  11  * modify it under the terms of the GNU General Public License as
  12  * published by the Free Software Foundation; either version 2 of
  13  * the License, or (at your option) any later version.
  14  *
  15  * This program is distributed in the hope that it will be useful,
  16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18  * GNU General Public License for more details.
  19  *
  20  * You should have received a copy of the GNU General Public License
  21  * along with this program; if not, write to the Free Software
  22  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  23  * MA 02111-1307 USA
  24  */
  25 #ifndef __ASM_ARCH_OMAP_GPMC_H
  26 #define __ASM_ARCH_OMAP_GPMC_H
  27
  28 #include <linux/mtd/nand.h>
  29
  30 #define GPMC_BUF_EMPTY          0
  31 #define GPMC_BUF_FULL           1
  32
  33 #define ECCCLEAR                (0x1 << 8)
  34 #define ECCRESULTREG1           (0x1 << 0)
  35 #define ECCSIZE512BYTE          0xFF
  36 #define ECCSIZE1                (ECCSIZE512BYTE << 22)
  37 #define ECCSIZE0                (ECCSIZE512BYTE << 12)
  38 #define ECCSIZE0SEL             (0x000 << 0)
  39
  40 /* Generic ECC Layouts */
  41 /* Large Page x8 NAND device Layout */
  42 #ifdef GPMC_NAND_ECC_LP_x8_LAYOUT
  43 #define GPMC_NAND_HW_ECC_LAYOUT {                                       \
  44         .eccbytes = 4 * 13,                                             \
  45         .eccpos = {  2,  3,  4,  5,  6,  7,  8,  9, 10, 11, 12, 13, 14, \
  46                     16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, \
  47                     30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, \
  48                     44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, \
  49                 },                                                      \
  50         .oobfree = {                                                    \
  51                 { .offset = 58, .length = 6, },                         \
  52         },                                                              \
  53 }
  54 #endif
  55
  56 /* Large Page x16 NAND device Layout */
  57 #ifdef GPMC_NAND_ECC_LP_x16_LAYOUT
  58 #define GPMC_NAND_HW_ECC_LAYOUT {                       \
  59         .eccbytes = 4 * 3,                              \
  60         .eccpos = { 2, 3, 4,                            \
  61                     5, 6, 7,                            \
  62                     8, 9, 10,                           \
  63                     11, 12, 13,                         \
  64                 },                                      \
  65         .oobfree = {                                    \
  66                 { .offset = 14, .length = 50, },        \
  67         },                                              \
  68 }
  69 #endif
  70
  71 /* NAND device layout in synch with the kernel */
  72 #ifdef GPMC_NAND_ECC_LP_x16_LAYOUT
  73 #define GPMC_NAND_HW_ECC_LAYOUT_KERNEL {                \
  74         .eccbytes = 4 * 3,                              \
  75         .eccpos = { 40, 41, 42,                         \
  76                     43, 44, 45,                         \
  77                     46, 47, 48,                         \
  78                     49, 50, 51,                         \
  79                 },                                      \
  80         .oobfree = {                                    \
  81                 { .offset = 2, .length = 38, },         \
  82         },                                              \
  83 }
  84 #endif
  85
  86 /* Small Page x8 NAND device Layout */
  87 #ifdef GPMC_NAND_ECC_SP_x8_LAYOUT
  88 #define GPMC_NAND_HW_ECC_LAYOUT {                       \
  89         .eccbytes = 3,                                  \
  90         .eccpos = { 1, 2, 3, },                         \
  91         .oobfree = {                                    \
  92                 { .offset = 4, .length = 12, },         \
  93         },                                              \
  94 }
  95 #endif
  96
  97 /* Small Page x16 NAND device Layout */
  98 #ifdef GPMC_NAND_ECC_SP_x16_LAYOUT
  99 #define GPMC_NAND_HW_ECC_LAYOUT {                       \
 100         .eccbytes = 3,                                  \
 101         .eccpos = { 2, 3, 4, },                         \
 102         .oobfree = {                                    \
 103                 { .offset = 58, .length = 6, },         \
 104         },                                              \
 105 }
 106 #endif
 107
 108 #define GPMC_NAND_HW_BCH4_ECC_LAYOUT {                  \
 109         .eccbytes = 4 * 8,                              \
 110         .eccpos = { 2, 3, 4, 5, 6, 7, 8, 9,             \
 111                     10, 11, 12, 13, 14, 15, 16, 17,     \
 112                     18, 19, 20, 21, 22, 23, 24, 25,     \
 113                     26, 27, 28, 29, 30, 31, 32, 33,     \
 114         },                                              \
 115         .oobfree = {                                    \
 116                 { .offset = 34, .length = 30, },        \
 117         },                                              \
 118 }
 119
 120 #define GPMC_NAND_HW_BCH8_ECC_LAYOUT {                                      \
 121         .eccbytes = 4 * 14,                                                 \
 122         .eccpos = {  2,  3,  4,  5,  6,  7,  8,  9, 10, 11, 12, 13, 14, 15, \
 123                     16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, \
 124                     30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, \
 125                     44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, \
 126                 },                                                          \
 127         .oobfree = {                                                        \
 128                 { .offset = 58, .length = 6, },                             \
 129         }                                                                   \
 130 }
 131
 132 #define GPMC_NAND_HW_BCH16_ECC_LAYOUT {                                       \
 133         .eccbytes = 4 * 26,                                                   \
 134         .eccpos = { 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14,               \
 135                     15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27,       \
 136                     28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40,       \
 137                     41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53,       \
 138                     54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66,       \
 139                     67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79,       \
 140                     80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92,       \
 141                     93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, \
 142         },                                                                    \
 143         .oobfree = {                                                          \
 144                 { .offset = 106, .length = 8, },                              \
 145         },                                                                    \
 146 }
 147
 148 /*
 149  * ELM Module Registers
 150  */
 151
 152 /* ELM registers bit fields */
 153 #define ELM_SYSCONFIG_SOFTRESET_MASK                    (0x2)
 154 #define ELM_SYSCONFIG_SOFTRESET                 (0x2)
 155 #define ELM_SYSSTATUS_RESETDONE_MASK                    (0x1)
 156 #define ELM_SYSSTATUS_RESETDONE                 (0x1)
 157 #define ELM_LOCATION_CONFIG_ECC_BCH_LEVEL_MASK          (0x3)
 158 #define ELM_LOCATION_CONFIG_ECC_SIZE_MASK               (0x7FF0000)
 159 #define ELM_LOCATION_CONFIG_ECC_SIZE_POS                (16)
 160 #define ELM_SYNDROME_FRAGMENT_6_SYNDROME_VALID          (0x00010000)
 161 #define ELM_LOCATION_STATUS_ECC_CORRECTABLE_MASK        (0x100)
 162 #define ELM_LOCATION_STATUS_ECC_NB_ERRORS_MASK          (0x1F)
 163
 164 #ifndef __KERNEL_STRICT_NAMES
 165 #ifndef __ASSEMBLY__
 166
 167 enum bch_level {
 168         BCH_4_BIT = 0,
 169         BCH_8_BIT,
 170         BCH_16_BIT
 171 };
 172
 173
 174 /* BCH syndrome registers */
 175 struct syndrome {
 176         u32 syndrome_fragment_x[7];     /* 0x400, 0x404.... 0x418 */
 177         u8 res1[36];                    /* 0x41c */
 178 };
 179
 180 /* BCH error status & location register */
 181 struct location {
 182         u32 location_status;            /* 0x800 */
 183         u8 res1[124];                   /* 0x804 */
 184         u32 error_location_x[16];       /* 0x880.... */
 185         u8 res2[64];                    /* 0x8c0 */
 186 };
 187
 188 /* BCH ELM register map - do not try to allocate memmory for this structure.
 189  * We have used plenty of reserved variables to fill the slots in the ELM
 190  * register memory map.
 191  * Directly initialize the struct pointer to ELM base address.
 192  */
 193 struct elm {
 194         u32 rev;                                /* 0x000 */
 195         u8 res1[12];                            /* 0x004 */
 196         u32 sysconfig;                          /* 0x010 */
 197         u32 sysstatus;                          /* 0x014 */
 198         u32 irqstatus;                          /* 0x018 */
 199         u32 irqenable;                          /* 0x01c */
 200         u32 location_config;                    /* 0x020 */
 201         u8 res2[92];                            /* 0x024 */
 202         u32 page_ctrl;                          /* 0x080 */
 203         u8 res3[892];                           /* 0x084 */
 204         struct  syndrome syndrome_fragments[8]; /* 0x400 */
 205         u8 res4[512];                           /* 0x600 */
 206         struct location  error_location[8];     /* 0x800 */
 207 };
 208
 209 int elm_check_error(u8 *syndrome, u32 nibbles, u32 *error_count,
 210                 u32 *error_locations);
 211 int elm_config(enum bch_level level);
 212 void elm_reset(void);
 213 void elm_init(void);
 214 void am33xx_nand_switch_ecc(nand_ecc_modes_t hardware, int32_t mode);
 215 #endif /* __ASSEMBLY__ */
 216 #endif /* __KERNEL_STRICT_NAMES */
 217
 218
 219 #endif /* __ASM_ARCH_OMAP_GPMC_H */