arch/arm/include/asm/arch-exynos/periph.h

   1 /*
   2  * Copyright (C) 2012 Samsung Electronics
   3  * Rajeshwari Shinde <rajeshwari.s@samsung.com>
   4  *
   5  * SPDX-License-Identifier:     GPL-2.0+
   6  */
   7
   8 #ifndef __ASM_ARM_ARCH_PERIPH_H
   9 #define __ASM_ARM_ARCH_PERIPH_H
  10
  11 /*
  12  * Peripherals required for pinmux configuration. List will
  13  * grow with support for more devices getting added.
  14  * Numbering based on interrupt table.
  15  *
  16  */
  17 enum periph_id {
  18         PERIPH_ID_UART0 = 51,
  19         PERIPH_ID_UART1,
  20         PERIPH_ID_UART2,
  21         PERIPH_ID_UART3,
  22         PERIPH_ID_I2C0 = 56,
  23         PERIPH_ID_I2C1,
  24         PERIPH_ID_I2C2,
  25         PERIPH_ID_I2C3,
  26         PERIPH_ID_I2C4,
  27         PERIPH_ID_I2C5,
  28         PERIPH_ID_I2C6,
  29         PERIPH_ID_I2C7,
  30         PERIPH_ID_SPI0 = 68,
  31         PERIPH_ID_SPI1,
  32         PERIPH_ID_SPI2,
  33         PERIPH_ID_SDMMC0 = 75,
  34         PERIPH_ID_SDMMC1,
  35         PERIPH_ID_SDMMC2,
  36         PERIPH_ID_SDMMC3,
  37         PERIPH_ID_I2C8 = 87,
  38         PERIPH_ID_I2C9,
  39         PERIPH_ID_I2S0 = 98,
  40         PERIPH_ID_I2S1 = 99,
  41
  42         /* Since following peripherals do
  43          * not have shared peripheral interrupts (SPIs)
  44          * they are numbered arbitiraly after the maximum
  45          * SPIs Exynos has (128)
  46          */
  47         PERIPH_ID_SROMC = 128,
  48         PERIPH_ID_SPI3,
  49         PERIPH_ID_SPI4,
  50         PERIPH_ID_SDMMC4,
  51         PERIPH_ID_PWM0,
  52         PERIPH_ID_PWM1,
  53         PERIPH_ID_PWM2,
  54         PERIPH_ID_PWM3,
  55         PERIPH_ID_PWM4,
  56         PERIPH_ID_I2C10 = 203,
  57
  58         PERIPH_ID_NONE = -1,
  59 };
  60
  61 #endif /* __ASM_ARM_ARCH_PERIPH_H */