arch/arm/include/asm/arch-mx6/iomux.h

   1 /*
   2  * This program is free software; you can redistribute it and/or
   3  * modify it under the terms of the GNU General Public License
   4  * as published by the Free Software Foundation; either version 2
   5  * of the License, or (at your option) any later version.
   6  * This program is distributed in the hope that it will be useful,
   7  * but WITHOUT ANY WARRANTY; without even the implied warranty of
   8  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   9  * GNU General Public License for more details.
  10  *
  11  * You should have received a copy of the GNU General Public License
  12  * along with this program; if not, write to the Free Software
  13  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
  14  * MA 02110-1301, USA.
  15  */
  16
  17 #ifndef __ASM_ARCH_IOMUX_H__
  18 #define __ASM_ARCH_IOMUX_H__
  19 /*
  20  * IOMUXC_GPR13 bit fields
  21  */
  22 #define IOMUXC_GPR13_SDMA_STOP_REQ      (1<<30)
  23 #define IOMUXC_GPR13_CAN2_STOP_REQ      (1<<29)
  24 #define IOMUXC_GPR13_CAN1_STOP_REQ      (1<<28)
  25 #define IOMUXC_GPR13_ENET_STOP_REQ      (1<<27)
  26 #define IOMUXC_GPR13_SATA_PHY_8_MASK    (7<<24)
  27 #define IOMUXC_GPR13_SATA_PHY_7_MASK    (0x1f<<19)
  28 #define IOMUXC_GPR13_SATA_PHY_6_SHIFT   16
  29 #define IOMUXC_GPR13_SATA_PHY_6_MASK    (7<<IOMUXC_GPR13_SATA_PHY_6_SHIFT)
  30 #define IOMUXC_GPR13_SATA_SPEED_MASK    (1<<15)
  31 #define IOMUXC_GPR13_SATA_PHY_5_MASK    (1<<14)
  32 #define IOMUXC_GPR13_SATA_PHY_4_MASK    (7<<11)
  33 #define IOMUXC_GPR13_SATA_PHY_3_MASK    (0x1f<<7)
  34 #define IOMUXC_GPR13_SATA_PHY_2_MASK    (0x1f<<2)
  35 #define IOMUXC_GPR13_SATA_PHY_1_MASK    (3<<0)
  36
  37 #define IOMUXC_GPR13_SATA_PHY_8_RXEQ_0P5DB      (0b000<<24)
  38 #define IOMUXC_GPR13_SATA_PHY_8_RXEQ_1P0DB      (0b001<<24)
  39 #define IOMUXC_GPR13_SATA_PHY_8_RXEQ_1P5DB      (0b010<<24)
  40 #define IOMUXC_GPR13_SATA_PHY_8_RXEQ_2P0DB      (0b011<<24)
  41 #define IOMUXC_GPR13_SATA_PHY_8_RXEQ_2P5DB      (0b100<<24)
  42 #define IOMUXC_GPR13_SATA_PHY_8_RXEQ_3P0DB      (0b101<<24)
  43 #define IOMUXC_GPR13_SATA_PHY_8_RXEQ_3P5DB      (0b110<<24)
  44 #define IOMUXC_GPR13_SATA_PHY_8_RXEQ_4P0DB      (0b111<<24)
  45
  46 #define IOMUXC_GPR13_SATA_PHY_7_SATA1I  (0b10000<<19)
  47 #define IOMUXC_GPR13_SATA_PHY_7_SATA1M  (0b10000<<19)
  48 #define IOMUXC_GPR13_SATA_PHY_7_SATA1X  (0b11010<<19)
  49 #define IOMUXC_GPR13_SATA_PHY_7_SATA2I  (0b10010<<19)
  50 #define IOMUXC_GPR13_SATA_PHY_7_SATA2M  (0b10010<<19)
  51 #define IOMUXC_GPR13_SATA_PHY_7_SATA2X  (0b11010<<19)
  52
  53 #define IOMUXC_GPR13_SATA_SPEED_1P5G    (0<<15)
  54 #define IOMUXC_GPR13_SATA_SPEED_3G      (1<<15)
  55
  56 #define IOMUXC_GPR13_SATA_SATA_PHY_5_SS_DISABLED        (0<<14)
  57 #define IOMUXC_GPR13_SATA_SATA_PHY_5_SS_ENABLED         (1<<14)
  58
  59 #define IOMUXC_GPR13_SATA_SATA_PHY_4_ATTEN_16_16        (0<<11)
  60 #define IOMUXC_GPR13_SATA_SATA_PHY_4_ATTEN_14_16        (1<<11)
  61 #define IOMUXC_GPR13_SATA_SATA_PHY_4_ATTEN_12_16        (2<<11)
  62 #define IOMUXC_GPR13_SATA_SATA_PHY_4_ATTEN_10_16        (3<<11)
  63 #define IOMUXC_GPR13_SATA_SATA_PHY_4_ATTEN_9_16         (4<<11)
  64 #define IOMUXC_GPR13_SATA_SATA_PHY_4_ATTEN_8_16         (5<<11)
  65
  66 #define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_0P00_DB (0b0000<<7)
  67 #define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_0P37_DB (0b0001<<7)
  68 #define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_0P74_DB (0b0010<<7)
  69 #define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_1P11_DB (0b0011<<7)
  70 #define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_1P48_DB (0b0100<<7)
  71 #define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_1P85_DB (0b0101<<7)
  72 #define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_2P22_DB (0b0110<<7)
  73 #define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_2P59_DB (0b0111<<7)
  74 #define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_2P96_DB (0b1000<<7)
  75 #define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_3P33_DB (0b1001<<7)
  76 #define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_3P70_DB (0b1010<<7)
  77 #define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_4P07_DB (0b1011<<7)
  78 #define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_4P44_DB (0b1100<<7)
  79 #define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_4P81_DB (0b1101<<7)
  80 #define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_5P28_DB (0b1110<<7)
  81 #define IOMUXC_GPR13_SATA_PHY_3_TXBOOST_5P75_DB (0b1111<<7)
  82
  83 #define IOMUXC_GPR13_SATA_PHY_2_TX_0P937V       (0b00000<<2)
  84 #define IOMUXC_GPR13_SATA_PHY_2_TX_0P947V       (0b00001<<2)
  85 #define IOMUXC_GPR13_SATA_PHY_2_TX_0P957V       (0b00010<<2)
  86 #define IOMUXC_GPR13_SATA_PHY_2_TX_0P966V       (0b00011<<2)
  87 #define IOMUXC_GPR13_SATA_PHY_2_TX_0P976V       (0b00100<<2)
  88 #define IOMUXC_GPR13_SATA_PHY_2_TX_0P986V       (0b00101<<2)
  89 #define IOMUXC_GPR13_SATA_PHY_2_TX_0P996V       (0b00110<<2)
  90 #define IOMUXC_GPR13_SATA_PHY_2_TX_1P005V       (0b00111<<2)
  91 #define IOMUXC_GPR13_SATA_PHY_2_TX_1P015V       (0b01000<<2)
  92 #define IOMUXC_GPR13_SATA_PHY_2_TX_1P025V       (0b01001<<2)
  93 #define IOMUXC_GPR13_SATA_PHY_2_TX_1P035V       (0b01010<<2)
  94 #define IOMUXC_GPR13_SATA_PHY_2_TX_1P045V       (0b01011<<2)
  95 #define IOMUXC_GPR13_SATA_PHY_2_TX_1P054V       (0b01100<<2)
  96 #define IOMUXC_GPR13_SATA_PHY_2_TX_1P064V       (0b01101<<2)
  97 #define IOMUXC_GPR13_SATA_PHY_2_TX_1P074V       (0b01110<<2)
  98 #define IOMUXC_GPR13_SATA_PHY_2_TX_1P084V       (0b01111<<2)
  99 #define IOMUXC_GPR13_SATA_PHY_2_TX_1P094V       (0b10000<<2)
 100 #define IOMUXC_GPR13_SATA_PHY_2_TX_1P104V       (0b10001<<2)
 101 #define IOMUXC_GPR13_SATA_PHY_2_TX_1P113V       (0b10010<<2)
 102 #define IOMUXC_GPR13_SATA_PHY_2_TX_1P123V       (0b10011<<2)
 103 #define IOMUXC_GPR13_SATA_PHY_2_TX_1P133V       (0b10100<<2)
 104 #define IOMUXC_GPR13_SATA_PHY_2_TX_1P143V       (0b10101<<2)
 105 #define IOMUXC_GPR13_SATA_PHY_2_TX_1P152V       (0b10110<<2)
 106 #define IOMUXC_GPR13_SATA_PHY_2_TX_1P162V       (0b10111<<2)
 107 #define IOMUXC_GPR13_SATA_PHY_2_TX_1P172V       (0b11000<<2)
 108 #define IOMUXC_GPR13_SATA_PHY_2_TX_1P182V       (0b11001<<2)
 109 #define IOMUXC_GPR13_SATA_PHY_2_TX_1P191V       (0b11010<<2)
 110 #define IOMUXC_GPR13_SATA_PHY_2_TX_1P201V       (0b11011<<2)
 111 #define IOMUXC_GPR13_SATA_PHY_2_TX_1P211V       (0b11100<<2)
 112 #define IOMUXC_GPR13_SATA_PHY_2_TX_1P221V       (0b11101<<2)
 113 #define IOMUXC_GPR13_SATA_PHY_2_TX_1P230V       (0b11110<<2)
 114 #define IOMUXC_GPR13_SATA_PHY_2_TX_1P240V       (0b11111<<2)
 115
 116 #define IOMUXC_GPR13_SATA_PHY_1_FAST    0
 117 #define IOMUXC_GPR13_SATA_PHY_1_MEDIUM  1
 118 #define IOMUXC_GPR13_SATA_PHY_1_SLOW    2
 119
 120 #define IOMUXC_GPR13_SATA_MASK (IOMUXC_GPR13_SATA_PHY_8_MASK \
 121                                 |IOMUXC_GPR13_SATA_PHY_7_MASK \
 122                                 |IOMUXC_GPR13_SATA_PHY_6_MASK \
 123                                 |IOMUXC_GPR13_SATA_SPEED_MASK \
 124                                 |IOMUXC_GPR13_SATA_PHY_5_MASK \
 125                                 |IOMUXC_GPR13_SATA_PHY_4_MASK \
 126                                 |IOMUXC_GPR13_SATA_PHY_3_MASK \
 127                                 |IOMUXC_GPR13_SATA_PHY_2_MASK \
 128                                 |IOMUXC_GPR13_SATA_PHY_1_MASK)
 129 #endif  /* __ASM_ARCH_IOMUX_H__ */