3 * Marvell Semiconductor <www.marvell.com>
4 * Written-by: Lei Wen <leiwen@marvell.com>
6 * SPDX-License-Identifier: GPL-2.0+
9 #ifndef _PANTHEON_CONFIG_H
10 #define _PANTHEON_CONFIG_H
12 #include <asm/arch/pantheon.h>
14 /* default Dcache Line length for pantheon */
15 #define CONFIG_SYS_CACHELINE_SIZE 32
17 #define CONFIG_SYS_TCLK (14745600) /* NS16550 clk config */
18 #define CONFIG_SYS_HZ_CLOCK (3250000) /* Timer Freq. 3.25MHZ */
19 #define CONFIG_MARVELL_MFP /* Enable mvmfp driver */
20 #define MV_MFPR_BASE PANTHEON_MFPR_BASE
21 #define MV_UART_CONSOLE_BASE PANTHEON_UART1_BASE
22 #define CONFIG_SYS_NS16550_IER (1 << 6) /* Bit 6 in UART_IER register
23 represents UART Unit Enable */
28 #define CONFIG_I2C_MV 1
29 #define CONFIG_MV_I2C_REG 0xd4011000
30 #define CONFIG_HARD_I2C 1
31 #define CONFIG_SYS_I2C_SPEED 0
32 #define CONFIG_SYS_I2C_SLAVE 0xfe
39 #define CONFIG_CMD_FAT 1
41 #define CONFIG_GENERIC_MMC 1
42 #define CONFIG_SDHCI 1
43 #define CONFIG_MMC_SDHCI_IO_ACCESSORS 1
44 #define CONFIG_SYS_MMC_MAX_BLK_COUNT 0x1000
45 #define CONFIG_MMC_SDMA 1
46 #define CONFIG_MV_SDHCI 1
47 #define CONFIG_DOS_PARTITION 1
48 #define CONFIG_EFI_PARTITION 1
49 #define CONFIG_SYS_MMC_NUM 2
50 #define CONFIG_SYS_MMC_BASE {0xD4280000, 0xd4281000}
53 #endif /* _PANTHEON_CONFIG_H */