arch/arm/include/asm/arch-socfpga/socfpga_base_addrs.h

   1 /*
   2  *  Copyright (C) 2012 Altera Corporation <www.altera.com>
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7 #ifndef _SOCFPGA_BASE_ADDRS_H_
   8 #define _SOCFPGA_BASE_ADDRS_H_
   9
  10 #define SOCFPGA_STM_ADDRESS             0xfc000000
  11 #define SOCFPGA_DAP_ADDRESS             0xff000000
  12 #define SOCFPGA_EMAC0_ADDRESS           0xff700000
  13 #define SOCFPGA_EMAC1_ADDRESS           0xff702000
  14 #define SOCFPGA_SDMMC_ADDRESS           0xff704000
  15 #define SOCFPGA_QSPI_ADDRESS            0xff705000
  16 #define SOCFPGA_GPIO0_ADDRESS           0xff708000
  17 #define SOCFPGA_GPIO1_ADDRESS           0xff709000
  18 #define SOCFPGA_GPIO2_ADDRESS           0xff70a000
  19 #define SOCFPGA_L3REGS_ADDRESS          0xff800000
  20 #define SOCFPGA_USB0_ADDRESS            0xffb00000
  21 #define SOCFPGA_USB1_ADDRESS            0xffb40000
  22 #define SOCFPGA_CAN0_ADDRESS            0xffc00000
  23 #define SOCFPGA_CAN1_ADDRESS            0xffc01000
  24 #define SOCFPGA_UART0_ADDRESS           0xffc02000
  25 #define SOCFPGA_UART1_ADDRESS           0xffc03000
  26 #define SOCFPGA_I2C0_ADDRESS            0xffc04000
  27 #define SOCFPGA_I2C1_ADDRESS            0xffc05000
  28 #define SOCFPGA_I2C2_ADDRESS            0xffc06000
  29 #define SOCFPGA_I2C3_ADDRESS            0xffc07000
  30 #define SOCFPGA_SDR_ADDRESS             0xffc20000
  31 #define SOCFPGA_L4WD0_ADDRESS           0xffd02000
  32 #define SOCFPGA_L4WD1_ADDRESS           0xffd03000
  33 #define SOCFPGA_CLKMGR_ADDRESS          0xffd04000
  34 #define SOCFPGA_RSTMGR_ADDRESS          0xffd05000
  35 #define SOCFPGA_SYSMGR_ADDRESS          0xffd08000
  36 #define SOCFPGA_SPIS0_ADDRESS           0xffe02000
  37 #define SOCFPGA_SPIS1_ADDRESS           0xffe03000
  38 #define SOCFPGA_SPIM0_ADDRESS           0xfff00000
  39 #define SOCFPGA_SPIM1_ADDRESS           0xfff01000
  40 #define SOCFPGA_SCANMGR_ADDRESS         0xfff02000
  41 #define SOCFPGA_ROM_ADDRESS             0xfffd0000
  42 #define SOCFPGA_MPUSCU_ADDRESS          0xfffec000
  43 #define SOCFPGA_MPUL2_ADDRESS           0xfffef000
  44 #define SOCFPGA_OCRAM_ADDRESS           0xffff0000
  45 #define SOCFPGA_LWFPGASLAVES_ADDRESS    0xff200000
  46 #define SOCFPGA_LWHPS2FPGAREGS_ADDRESS  0xff400000
  47 #define SOCFPGA_HPS2FPGAREGS_ADDRESS    0xff500000
  48 #define SOCFPGA_FPGA2HPSREGS_ADDRESS    0xff600000
  49 #define SOCFPGA_FPGAMGRREGS_ADDRESS     0xff706000
  50 #define SOCFPGA_ACPIDMAP_ADDRESS        0xff707000
  51 #define SOCFPGA_NANDDATA_ADDRESS        0xff900000
  52 #define SOCFPGA_QSPIDATA_ADDRESS        0xffa00000
  53 #define SOCFPGA_NANDREGS_ADDRESS        0xffb80000
  54 #define SOCFPGA_FPGAMGRDATA_ADDRESS     0xffb90000
  55 #define SOCFPGA_SPTIMER0_ADDRESS        0xffc08000
  56 #define SOCFPGA_SPTIMER1_ADDRESS        0xffc09000
  57 #define SOCFPGA_OSC1TIMER0_ADDRESS      0xffd00000
  58 #define SOCFPGA_OSC1TIMER1_ADDRESS      0xffd01000
  59 #define SOCFPGA_DMANONSECURE_ADDRESS    0xffe00000
  60 #define SOCFPGA_DMASECURE_ADDRESS       0xffe01000
  61
  62 #endif /* _SOCFPGA_BASE_ADDRS_H_ */