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1 /*
2  * (C) Copyright 2010
3  * Texas Instruments, <www.ti.com>
4  * Aneesh V <aneesh@ti.com>
5  *
6  * SPDX-License-Identifier:     GPL-2.0+
7  */
8 #ifndef _PL310_H_
9 #define _PL310_H_
10
11 #include <linux/types.h>
12
13 /* Register bit fields */
14 #define PL310_AUX_CTRL_ASSOCIATIVITY_MASK       (1 << 16)
15 #define L2X0_DYNAMIC_CLK_GATING_EN              (1 << 1)
16 #define L2X0_STNDBY_MODE_EN                     (1 << 0)
17 #define L2X0_CTRL_EN                            1
18
19 #define L310_SHARED_ATT_OVERRIDE_ENABLE         (1 << 22)
20
21 struct pl310_regs {
22         u32 pl310_cache_id;
23         u32 pl310_cache_type;
24         u32 pad1[62];
25         u32 pl310_ctrl;
26         u32 pl310_aux_ctrl;
27         u32 pl310_tag_latency_ctrl;
28         u32 pl310_data_latency_ctrl;
29         u32 pad2[60];
30         u32 pl310_event_cnt_ctrl;
31         u32 pl310_event_cnt1_cfg;
32         u32 pl310_event_cnt0_cfg;
33         u32 pl310_event_cnt1_val;
34         u32 pl310_event_cnt0_val;
35         u32 pl310_intr_mask;
36         u32 pl310_masked_intr_stat;
37         u32 pl310_raw_intr_stat;
38         u32 pl310_intr_clear;
39         u32 pad3[323];
40         u32 pl310_cache_sync;
41         u32 pad4[15];
42         u32 pl310_inv_line_pa;
43         u32 pad5[2];
44         u32 pl310_inv_way;
45         u32 pad6[12];
46         u32 pl310_clean_line_pa;
47         u32 pad7[1];
48         u32 pl310_clean_line_idx;
49         u32 pl310_clean_way;
50         u32 pad8[12];
51         u32 pl310_clean_inv_line_pa;
52         u32 pad9[1];
53         u32 pl310_clean_inv_line_idx;
54         u32 pl310_clean_inv_way;
55         u32 pad10[64];
56         u32 pl310_lockdown_dbase;
57         u32 pl310_lockdown_ibase;
58         u32 pad11[190];
59         u32 pl310_addr_filter_start;
60         u32 pl310_addr_filter_end;
61         u32 pad12[190];
62         u32 pl310_test_operation;
63         u32 pad13[3];
64         u32 pl310_line_data;
65         u32 pad14[7];
66         u32 pl310_line_tag;
67         u32 pad15[3];
68         u32 pl310_debug_ctrl;
69         u32 pad16[7];
70         u32 pl310_prefetch_ctrl;
71         u32 pad17[7];
72         u32 pl310_power_ctrl;
73 };
74
75 void pl310_inval_all(void);
76 void pl310_clean_inval_all(void);
77 void pl310_inval_range(u32 start, u32 end);
78 void pl310_clean_inval_range(u32 start, u32 end);
79
80 #endif