arch/arm/include/asm/ti-common/ti-edma3.h

   1 /*
   2  * Enhanced Direct Memory Access (EDMA3) Controller
   3  *
   4  * (C) Copyright 2014
   5  *     Texas Instruments Incorporated, <www.ti.com>
   6  *
   7  * SPDX-License-Identifier:     GPL-2.0+
   8  */
   9
  10 #ifndef _EDMA3_H_
  11 #define _EDMA3_H_
  12
  13 #include <linux/stddef.h>
  14
  15 #define EDMA3_PARSET_NULL_LINK                  0xffff
  16
  17 /*
  18  * All parameter RAM set options
  19  * opt field in edma3_param_set_config structure
  20  */
  21 #define EDMA3_SLOPT_PRIV_LEVEL                  BIT(31)
  22 #define EDMA3_SLOPT_PRIV_ID(id)                 ((0xf & (id)) << 24)
  23 #define EDMA3_SLOPT_INTERM_COMP_CHAIN_ENB       BIT(23)
  24 #define EDMA3_SLOPT_TRANS_COMP_CHAIN_ENB        BIT(22)
  25 #define EDMA3_SLOPT_INTERM_COMP_INT_ENB         BIT(21)
  26 #define EDMA3_SLOPT_TRANS_COMP_INT_ENB          BIT(20)
  27 #define EDMA3_SLOPT_COMP_CODE(code)             ((0x3f & (code)) << 12)
  28 #define EDMA3_SLOPT_FIFO_WIDTH_8                0
  29 #define EDMA3_SLOPT_FIFO_WIDTH_16               (1 << 8)
  30 #define EDMA3_SLOPT_FIFO_WIDTH_32               (2 << 8)
  31 #define EDMA3_SLOPT_FIFO_WIDTH_64               (3 << 8)
  32 #define EDMA3_SLOPT_FIFO_WIDTH_128              (4 << 8)
  33 #define EDMA3_SLOPT_FIFO_WIDTH_256              (5 << 8)
  34 #define EDMA3_SLOPT_FIFO_WIDTH_SET(w)           ((w & 0x7) << 8)
  35 #define EDMA3_SLOPT_STATIC                      BIT(3)
  36 #define EDMA3_SLOPT_AB_SYNC                     BIT(2)
  37 #define EDMA3_SLOPT_DST_ADDR_CONST_MODE         BIT(1)
  38 #define EDMA3_SLOPT_SRC_ADDR_CONST_MODE         BIT(0)
  39
  40 enum edma3_address_mode {
  41         INCR = 0,
  42         FIFO = 1
  43 };
  44
  45 enum edma3_fifo_width {
  46         W8BIT = 0,
  47         W16BIT = 1,
  48         W32BIT = 2,
  49         W64BIT = 3,
  50         W128BIT = 4,
  51         W256BIT = 5
  52 };
  53
  54 enum edma3_sync_dimension {
  55         ASYNC = 0,
  56         ABSYNC = 1
  57 };
  58
  59 /* PaRAM slots are laid out like this */
  60 struct edma3_slot_layout {
  61         u32 opt;
  62         u32 src;
  63         u32 a_b_cnt;
  64         u32 dst;
  65         u32 src_dst_bidx;
  66         u32 link_bcntrld;
  67         u32 src_dst_cidx;
  68         u32 ccnt;
  69 } __packed;
  70
  71 /*
  72  * Use this to assign trigger word number of edma3_slot_layout struct.
  73  * trigger_word_name - is the exact name from edma3_slot_layout.
  74  */
  75 #define EDMA3_TWORD(trigger_word_name)\
  76                 (offsetof(struct edma3_slot_layout, trigger_word_name) / 4)
  77
  78 struct edma3_slot_config {
  79         u32 opt;
  80         u32 src;
  81         u32 dst;
  82         int bcnt;
  83         int acnt;
  84         int ccnt;
  85         int src_bidx;
  86         int dst_bidx;
  87         int src_cidx;
  88         int dst_cidx;
  89         int bcntrld;
  90         int link;
  91 };
  92
  93 struct edma3_channel_config {
  94         int slot;
  95         int chnum;
  96         int complete_code;      /* indicate pending complete interrupt */
  97         int trigger_slot_word;  /* only used for qedma */
  98 };
  99
 100 void qedma3_start(u32 base, struct edma3_channel_config *cfg);
 101 void qedma3_stop(u32 base, struct edma3_channel_config *cfg);
 102 void edma3_slot_configure(u32 base, int slot, struct edma3_slot_config *cfg);
 103 int edma3_check_for_transfer(u32 base, struct edma3_channel_config *cfg);
 104 void edma3_write_slot(u32 base, int slot, struct edma3_slot_layout *param);
 105 void edma3_read_slot(u32 base, int slot, struct edma3_slot_layout *param);
 106
 107 void edma3_set_dest(u32 base, int slot, u32 dst, enum edma3_address_mode mode,
 108                     enum edma3_fifo_width width);
 109 void edma3_set_dest_index(u32 base, unsigned slot, int bidx, int cidx);
 110 void edma3_set_dest_addr(u32 base, int slot, u32 dst);
 111
 112 void edma3_set_src(u32 base, int slot, u32 src, enum edma3_address_mode mode,
 113                    enum edma3_fifo_width width);
 114 void edma3_set_src_index(u32 base, unsigned slot, int bidx, int cidx);
 115 void edma3_set_src_addr(u32 base, int slot, u32 src);
 116
 117 void edma3_set_transfer_params(u32 base, int slot, int acnt,
 118                                int bcnt, int ccnt, u16 bcnt_rld,
 119                                enum edma3_sync_dimension sync_mode);
 120
 121 #endif