arch/microblaze/include/asm/asm.h

   1 /*
   2  * (C) Copyright 2007 Michal Simek
   3  *
   4  * Michal  SIMEK <monstr@monstr.eu>
   5  *
   6  * SPDX-License-Identifier:     GPL-2.0+
   7  */
   8
   9 /* FSL macros */
  10 #define NGET(val, fslnum) \
  11         __asm__ __volatile__ ("nget %0, rfsl" #fslnum :"=r" (val));
  12
  13 #define GET(val, fslnum) \
  14         __asm__ __volatile__ ("get %0, rfsl" #fslnum :"=r" (val));
  15
  16 #define NCGET(val, fslnum) \
  17         __asm__ __volatile__ ("ncget %0, rfsl" #fslnum :"=r" (val));
  18
  19 #define CGET(val, fslnum) \
  20         __asm__ __volatile__ ("cget %0, rfsl" #fslnum :"=r" (val));
  21
  22 #define NPUT(val, fslnum) \
  23         __asm__ __volatile__ ("nput %0, rfsl" #fslnum ::"r" (val));
  24
  25 #define PUT(val, fslnum) \
  26         __asm__ __volatile__ ("put %0, rfsl" #fslnum ::"r" (val));
  27
  28 #define NCPUT(val, fslnum) \
  29         __asm__ __volatile__ ("ncput %0, rfsl" #fslnum ::"r" (val));
  30
  31 #define CPUT(val, fslnum) \
  32         __asm__ __volatile__ ("cput %0, rfsl" #fslnum ::"r" (val));
  33
  34 /* CPU dependent */
  35 /* machine status register */
  36 #define MFS(val, reg) \
  37         __asm__ __volatile__ ("mfs %0," #reg :"=r" (val));
  38
  39 #define MTS(val, reg) \
  40         __asm__ __volatile__ ("mts " #reg ", %0"::"r" (val));
  41
  42 /* get return address from interrupt */
  43 #define R14(val) \
  44         __asm__ __volatile__ ("addi %0, r14, 0":"=r" (val));
  45
  46 #define NOP     __asm__ __volatile__ ("nop");
  47
  48 /* use machine status registe USE_MSR_REG */
  49 #if XILINX_USE_MSR_INSTR == 1
  50 #define MSRSET(val) \
  51         __asm__ __volatile__ ("msrset r0," #val );
  52
  53 #define MSRCLR(val) \
  54         __asm__ __volatile__ ("msrclr r0," #val );
  55
  56 #else
  57 #define MSRSET(val)                                             \
  58 {                                                               \
  59         register unsigned tmp;                                  \
  60         __asm__ __volatile__ ("                                 \
  61                         mfs     %0, rmsr;                       \
  62                         ori     %0, %0, "#val";                 \
  63                         mts     rmsr, %0;                       \
  64                         nop;"                                   \
  65                         : "=r" (tmp)                            \
  66                         : "d" (val)                             \
  67                         : "memory");                            \
  68 }
  69
  70 #define MSRCLR(val)                                             \
  71 {                                                               \
  72         register unsigned tmp;                                  \
  73         __asm__ __volatile__ ("                                 \
  74                         mfs     %0, rmsr;                       \
  75                         andi    %0, %0, ~"#val";                \
  76                         mts     rmsr, %0;                       \
  77                         nop;"                                   \
  78                         : "=r" (tmp)                            \
  79                         : "d" (val)                             \
  80                         : "memory");                            \
  81 }
  82 #endif