arch/powerpc/cpu/mpc85xx/fdt.c

   1 /*
   2  * Copyright 2007-2011 Freescale Semiconductor, Inc.
   3  *
   4  * (C) Copyright 2000
   5  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   6  *
   7  * SPDX-License-Identifier:     GPL-2.0+
   8  */
   9
  10 #include <common.h>
  11 #include <libfdt.h>
  12 #include <fdt_support.h>
  13 #include <asm/processor.h>
  14 #include <linux/ctype.h>
  15 #include <asm/io.h>
  16 #include <asm/fsl_portals.h>
  17 #include <hwconfig.h>
  18 #ifdef CONFIG_FSL_ESDHC
  19 #include <fsl_esdhc.h>
  20 #endif
  21 #include "../../../../drivers/qe/qe.h"          /* For struct qe_firmware */
  22
  23 DECLARE_GLOBAL_DATA_PTR;
  24
  25 extern void ft_qe_setup(void *blob);
  26 extern void ft_fixup_num_cores(void *blob);
  27 extern void ft_srio_setup(void *blob);
  28
  29 #ifdef CONFIG_MP
  30 #include "mp.h"
  31
  32 void ft_fixup_cpu(void *blob, u64 memory_limit)
  33 {
  34         int off;
  35         phys_addr_t spin_tbl_addr = get_spin_phys_addr();
  36         u32 bootpg = determine_mp_bootpg(NULL);
  37         u32 id = get_my_id();
  38         const char *enable_method;
  39 #if defined(T1040_TDM_QUIRK_CCSR_BASE)
  40         int ret;
  41         int tdm_hwconfig_enabled = 0;
  42         char buffer[HWCONFIG_BUFFER_SIZE] = {0};
  43 #endif
  44
  45         off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
  46         while (off != -FDT_ERR_NOTFOUND) {
  47                 u32 *reg = (u32 *)fdt_getprop(blob, off, "reg", 0);
  48
  49                 if (reg) {
  50                         u32 phys_cpu_id = thread_to_core(*reg);
  51                         u64 val = phys_cpu_id * SIZE_BOOT_ENTRY + spin_tbl_addr;
  52                         val = cpu_to_fdt64(val);
  53                         if (*reg == id) {
  54                                 fdt_setprop_string(blob, off, "status",
  55                                                                 "okay");
  56                         } else {
  57                                 fdt_setprop_string(blob, off, "status",
  58                                                                 "disabled");
  59                         }
  60
  61                         if (hold_cores_in_reset(0)) {
  62 #ifdef CONFIG_FSL_CORENET
  63                                 /* Cores held in reset, use BRR to release */
  64                                 enable_method = "fsl,brr-holdoff";
  65 #else
  66                                 /* Cores held in reset, use EEBPCR to release */
  67                                 enable_method = "fsl,eebpcr-holdoff";
  68 #endif
  69                         } else {
  70                                 /* Cores out of reset and in a spin-loop */
  71                                 enable_method = "spin-table";
  72
  73                                 fdt_setprop(blob, off, "cpu-release-addr",
  74                                                 &val, sizeof(val));
  75                         }
  76
  77                         fdt_setprop_string(blob, off, "enable-method",
  78                                                         enable_method);
  79                 } else {
  80                         printf ("cpu NULL\n");
  81                 }
  82                 off = fdt_node_offset_by_prop_value(blob, off,
  83                                 "device_type", "cpu", 4);
  84         }
  85
  86 #if defined(T1040_TDM_QUIRK_CCSR_BASE)
  87 #define CONFIG_MEM_HOLE_16M     0x1000000
  88         /*
  89          * Extract hwconfig from environment.
  90          * Search for tdm entry in hwconfig.
  91          */
  92         ret = getenv_f("hwconfig", buffer, sizeof(buffer));
  93         if (ret > 0)
  94                 tdm_hwconfig_enabled = hwconfig_f("tdm", buffer);
  95
  96         /* Reserve the memory hole created by TDM LAW, so OSes dont use it */
  97         if (tdm_hwconfig_enabled) {
  98                 off = fdt_add_mem_rsv(blob, T1040_TDM_QUIRK_CCSR_BASE,
  99                                       CONFIG_MEM_HOLE_16M);
 100                 if (off < 0)
 101                         printf("Failed  to reserve memory for tdm: %s\n",
 102                                fdt_strerror(off));
 103         }
 104 #endif
 105
 106         /* Reserve the boot page so OSes dont use it */
 107         if ((u64)bootpg < memory_limit) {
 108                 off = fdt_add_mem_rsv(blob, bootpg, (u64)4096);
 109                 if (off < 0)
 110                         printf("Failed to reserve memory for bootpg: %s\n",
 111                                 fdt_strerror(off));
 112         }
 113
 114 #ifndef CONFIG_MPC8xxx_DISABLE_BPTR
 115         /*
 116          * Reserve the default boot page so OSes dont use it.
 117          * The default boot page is always mapped to bootpg above using
 118          * boot page translation.
 119          */
 120         if (0xfffff000ull < memory_limit) {
 121                 off = fdt_add_mem_rsv(blob, 0xfffff000ull, (u64)4096);
 122                 if (off < 0) {
 123                         printf("Failed to reserve memory for 0xfffff000: %s\n",
 124                                 fdt_strerror(off));
 125                 }
 126         }
 127 #endif
 128
 129         /* Reserve spin table page */
 130         if (spin_tbl_addr < memory_limit) {
 131                 off = fdt_add_mem_rsv(blob,
 132                         (spin_tbl_addr & ~0xffful), 4096);
 133                 if (off < 0)
 134                         printf("Failed to reserve memory for spin table: %s\n",
 135                                 fdt_strerror(off));
 136         }
 137 #ifdef CONFIG_DEEP_SLEEP
 138 #ifdef CONFIG_SPL_MMC_BOOT
 139         off = fdt_add_mem_rsv(blob, CONFIG_SYS_MMC_U_BOOT_START,
 140                 CONFIG_SYS_MMC_U_BOOT_SIZE);
 141         if (off < 0)
 142                 printf("Failed to reserve memory for SD deep sleep: %s\n",
 143                        fdt_strerror(off));
 144 #elif defined(CONFIG_SPL_SPI_BOOT)
 145         off = fdt_add_mem_rsv(blob, CONFIG_SYS_SPI_FLASH_U_BOOT_START,
 146                 CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE);
 147         if (off < 0)
 148                 printf("Failed to reserve memory for SPI deep sleep: %s\n",
 149                        fdt_strerror(off));
 150 #endif
 151 #endif
 152 }
 153 #endif
 154
 155 #ifdef CONFIG_SYS_FSL_CPC
 156 static inline void ft_fixup_l3cache(void *blob, int off)
 157 {
 158         u32 line_size, num_ways, size, num_sets;
 159         cpc_corenet_t *cpc = (void *)CONFIG_SYS_FSL_CPC_ADDR;
 160         u32 cfg0 = in_be32(&cpc->cpccfg0);
 161
 162         size = CPC_CFG0_SZ_K(cfg0) * 1024 * CONFIG_SYS_NUM_CPC;
 163         num_ways = CPC_CFG0_NUM_WAYS(cfg0);
 164         line_size = CPC_CFG0_LINE_SZ(cfg0);
 165         num_sets = size / (line_size * num_ways);
 166
 167         fdt_setprop(blob, off, "cache-unified", NULL, 0);
 168         fdt_setprop_cell(blob, off, "cache-block-size", line_size);
 169         fdt_setprop_cell(blob, off, "cache-size", size);
 170         fdt_setprop_cell(blob, off, "cache-sets", num_sets);
 171         fdt_setprop_cell(blob, off, "cache-level", 3);
 172 #ifdef CONFIG_SYS_CACHE_STASHING
 173         fdt_setprop_cell(blob, off, "cache-stash-id", 1);
 174 #endif
 175 }
 176 #else
 177 #define ft_fixup_l3cache(x, y)
 178 #endif
 179
 180 #if defined(CONFIG_L2_CACHE)
 181 /* return size in kilobytes */
 182 static inline u32 l2cache_size(void)
 183 {
 184         volatile ccsr_l2cache_t *l2cache = (void *)CONFIG_SYS_MPC85xx_L2_ADDR;
 185         volatile u32 l2siz_field = (l2cache->l2ctl >> 28) & 0x3;
 186         u32 ver = SVR_SOC_VER(get_svr());
 187
 188         switch (l2siz_field) {
 189         case 0x0:
 190                 break;
 191         case 0x1:
 192                 if (ver == SVR_8540 || ver == SVR_8560   ||
 193                     ver == SVR_8541 || ver == SVR_8555)
 194                         return 128;
 195                 else
 196                         return 256;
 197                 break;
 198         case 0x2:
 199                 if (ver == SVR_8540 || ver == SVR_8560   ||
 200                     ver == SVR_8541 || ver == SVR_8555)
 201                         return 256;
 202                 else
 203                         return 512;
 204                 break;
 205         case 0x3:
 206                 return 1024;
 207                 break;
 208         }
 209
 210         return 0;
 211 }
 212
 213 static inline void ft_fixup_l2cache(void *blob)
 214 {
 215         int len, off;
 216         u32 *ph;
 217         struct cpu_type *cpu = identify_cpu(SVR_SOC_VER(get_svr()));
 218
 219         const u32 line_size = 32;
 220         const u32 num_ways = 8;
 221         const u32 size = l2cache_size() * 1024;
 222         const u32 num_sets = size / (line_size * num_ways);
 223
 224         off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
 225         if (off < 0) {
 226                 debug("no cpu node fount\n");
 227                 return;
 228         }
 229
 230         ph = (u32 *)fdt_getprop(blob, off, "next-level-cache", 0);
 231
 232         if (ph == NULL) {
 233                 debug("no next-level-cache property\n");
 234                 return ;
 235         }
 236
 237         off = fdt_node_offset_by_phandle(blob, *ph);
 238         if (off < 0) {
 239                 printf("%s: %s\n", __func__, fdt_strerror(off));
 240                 return ;
 241         }
 242
 243         if (cpu) {
 244                 char buf[40];
 245
 246                 if (isdigit(cpu->name[0])) {
 247                         /* MPCxxxx, where xxxx == 4-digit number */
 248                         len = sprintf(buf, "fsl,mpc%s-l2-cache-controller",
 249                                 cpu->name) + 1;
 250                 } else {
 251                         /* Pxxxx or Txxxx, where xxxx == 4-digit number */
 252                         len = sprintf(buf, "fsl,%c%s-l2-cache-controller",
 253                                 tolower(cpu->name[0]), cpu->name + 1) + 1;
 254                 }
 255
 256                 /*
 257                  * append "cache" after the NULL character that the previous
 258                  * sprintf wrote.  This is how a device tree stores multiple
 259                  * strings in a property.
 260                  */
 261                 len += sprintf(buf + len, "cache") + 1;
 262
 263                 fdt_setprop(blob, off, "compatible", buf, len);
 264         }
 265         fdt_setprop(blob, off, "cache-unified", NULL, 0);
 266         fdt_setprop_cell(blob, off, "cache-block-size", line_size);
 267         fdt_setprop_cell(blob, off, "cache-size", size);
 268         fdt_setprop_cell(blob, off, "cache-sets", num_sets);
 269         fdt_setprop_cell(blob, off, "cache-level", 2);
 270
 271         /* we dont bother w/L3 since no platform of this type has one */
 272 }
 273 #elif defined(CONFIG_BACKSIDE_L2_CACHE) || \
 274         defined(CONFIG_SYS_FSL_QORIQ_CHASSIS2)
 275 static inline void ft_fixup_l2cache(void *blob)
 276 {
 277         int off, l2_off, l3_off = -1;
 278         u32 *ph;
 279 #ifdef  CONFIG_BACKSIDE_L2_CACHE
 280         u32 l2cfg0 = mfspr(SPRN_L2CFG0);
 281 #else
 282         struct ccsr_cluster_l2 *l2cache =
 283                 (struct ccsr_cluster_l2 __iomem *)(CONFIG_SYS_FSL_CLUSTER_1_L2);
 284         u32 l2cfg0 = in_be32(&l2cache->l2cfg0);
 285 #endif
 286         u32 size, line_size, num_ways, num_sets;
 287         int has_l2 = 1;
 288
 289         /* P2040/P2040E has no L2, so dont set any L2 props */
 290         if (SVR_SOC_VER(get_svr()) == SVR_P2040)
 291                 has_l2 = 0;
 292
 293         size = (l2cfg0 & 0x3fff) * 64 * 1024;
 294         num_ways = ((l2cfg0 >> 14) & 0x1f) + 1;
 295         line_size = (((l2cfg0 >> 23) & 0x3) + 1) * 32;
 296         num_sets = size / (line_size * num_ways);
 297
 298         off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
 299
 300         while (off != -FDT_ERR_NOTFOUND) {
 301                 ph = (u32 *)fdt_getprop(blob, off, "next-level-cache", 0);
 302
 303                 if (ph == NULL) {
 304                         debug("no next-level-cache property\n");
 305                         goto next;
 306                 }
 307
 308                 l2_off = fdt_node_offset_by_phandle(blob, *ph);
 309                 if (l2_off < 0) {
 310                         printf("%s: %s\n", __func__, fdt_strerror(off));
 311                         goto next;
 312                 }
 313
 314                 if (has_l2) {
 315 #ifdef CONFIG_SYS_CACHE_STASHING
 316                         u32 *reg = (u32 *)fdt_getprop(blob, off, "reg", 0);
 317 #if defined(CONFIG_SYS_FSL_QORIQ_CHASSIS2) && defined(CONFIG_E6500)
 318                         /* Only initialize every eighth thread */
 319                         if (reg && !((*reg) % 8)) {
 320                                 fdt_setprop_cell(blob, l2_off, "cache-stash-id",
 321                                                  (*reg / 4) + 32 + 1);
 322                         }
 323 #else
 324                         if (reg) {
 325                                 fdt_setprop_cell(blob, l2_off, "cache-stash-id",
 326                                                  (*reg * 2) + 32 + 1);
 327                         }
 328 #endif
 329 #endif
 330
 331                         fdt_setprop(blob, l2_off, "cache-unified", NULL, 0);
 332                         fdt_setprop_cell(blob, l2_off, "cache-block-size",
 333                                                 line_size);
 334                         fdt_setprop_cell(blob, l2_off, "cache-size", size);
 335                         fdt_setprop_cell(blob, l2_off, "cache-sets", num_sets);
 336                         fdt_setprop_cell(blob, l2_off, "cache-level", 2);
 337                         fdt_setprop(blob, l2_off, "compatible", "cache", 6);
 338                 }
 339
 340                 if (l3_off < 0) {
 341                         ph = (u32 *)fdt_getprop(blob, l2_off, "next-level-cache", 0);
 342
 343                         if (ph == NULL) {
 344                                 debug("no next-level-cache property\n");
 345                                 goto next;
 346                         }
 347                         l3_off = *ph;
 348                 }
 349 next:
 350                 off = fdt_node_offset_by_prop_value(blob, off,
 351                                 "device_type", "cpu", 4);
 352         }
 353         if (l3_off > 0) {
 354                 l3_off = fdt_node_offset_by_phandle(blob, l3_off);
 355                 if (l3_off < 0) {
 356                         printf("%s: %s\n", __func__, fdt_strerror(off));
 357                         return ;
 358                 }
 359                 ft_fixup_l3cache(blob, l3_off);
 360         }
 361 }
 362 #else
 363 #define ft_fixup_l2cache(x)
 364 #endif
 365
 366 static inline void ft_fixup_cache(void *blob)
 367 {
 368         int off;
 369
 370         off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
 371
 372         while (off != -FDT_ERR_NOTFOUND) {
 373                 u32 l1cfg0 = mfspr(SPRN_L1CFG0);
 374                 u32 l1cfg1 = mfspr(SPRN_L1CFG1);
 375                 u32 isize, iline_size, inum_sets, inum_ways;
 376                 u32 dsize, dline_size, dnum_sets, dnum_ways;
 377
 378                 /* d-side config */
 379                 dsize = (l1cfg0 & 0x7ff) * 1024;
 380                 dnum_ways = ((l1cfg0 >> 11) & 0xff) + 1;
 381                 dline_size = (((l1cfg0 >> 23) & 0x3) + 1) * 32;
 382                 dnum_sets = dsize / (dline_size * dnum_ways);
 383
 384                 fdt_setprop_cell(blob, off, "d-cache-block-size", dline_size);
 385                 fdt_setprop_cell(blob, off, "d-cache-size", dsize);
 386                 fdt_setprop_cell(blob, off, "d-cache-sets", dnum_sets);
 387
 388 #ifdef CONFIG_SYS_CACHE_STASHING
 389                 {
 390                         u32 *reg = (u32 *)fdt_getprop(blob, off, "reg", 0);
 391                         if (reg)
 392                                 fdt_setprop_cell(blob, off, "cache-stash-id",
 393                                          (*reg * 2) + 32 + 0);
 394                 }
 395 #endif
 396
 397                 /* i-side config */
 398                 isize = (l1cfg1 & 0x7ff) * 1024;
 399                 inum_ways = ((l1cfg1 >> 11) & 0xff) + 1;
 400                 iline_size = (((l1cfg1 >> 23) & 0x3) + 1) * 32;
 401                 inum_sets = isize / (iline_size * inum_ways);
 402
 403                 fdt_setprop_cell(blob, off, "i-cache-block-size", iline_size);
 404                 fdt_setprop_cell(blob, off, "i-cache-size", isize);
 405                 fdt_setprop_cell(blob, off, "i-cache-sets", inum_sets);
 406
 407                 off = fdt_node_offset_by_prop_value(blob, off,
 408                                 "device_type", "cpu", 4);
 409         }
 410
 411         ft_fixup_l2cache(blob);
 412 }
 413
 414
 415 void fdt_add_enet_stashing(void *fdt)
 416 {
 417         do_fixup_by_compat(fdt, "gianfar", "bd-stash", NULL, 0, 1);
 418
 419         do_fixup_by_compat_u32(fdt, "gianfar", "rx-stash-len", 96, 1);
 420
 421         do_fixup_by_compat_u32(fdt, "gianfar", "rx-stash-idx", 0, 1);
 422         do_fixup_by_compat(fdt, "fsl,etsec2", "bd-stash", NULL, 0, 1);
 423         do_fixup_by_compat_u32(fdt, "fsl,etsec2", "rx-stash-len", 96, 1);
 424         do_fixup_by_compat_u32(fdt, "fsl,etsec2", "rx-stash-idx", 0, 1);
 425 }
 426
 427 #if defined(CONFIG_SYS_DPAA_FMAN) || defined(CONFIG_SYS_DPAA_PME)
 428 #ifdef CONFIG_SYS_DPAA_FMAN
 429 static void ft_fixup_clks(void *blob, const char *compat, u32 offset,
 430                           unsigned long freq)
 431 {
 432         phys_addr_t phys = offset + CONFIG_SYS_CCSRBAR_PHYS;
 433         int off = fdt_node_offset_by_compat_reg(blob, compat, phys);
 434
 435         if (off >= 0) {
 436                 off = fdt_setprop_cell(blob, off, "clock-frequency", freq);
 437                 if (off > 0)
 438                         printf("WARNING enable to set clock-frequency "
 439                                 "for %s: %s\n", compat, fdt_strerror(off));
 440         }
 441 }
 442 #endif
 443
 444 static void ft_fixup_dpaa_clks(void *blob)
 445 {
 446         sys_info_t sysinfo;
 447
 448         get_sys_info(&sysinfo);
 449 #ifdef CONFIG_SYS_DPAA_FMAN
 450         ft_fixup_clks(blob, "fsl,fman", CONFIG_SYS_FSL_FM1_OFFSET,
 451                         sysinfo.freq_fman[0]);
 452
 453 #if (CONFIG_SYS_NUM_FMAN == 2)
 454         ft_fixup_clks(blob, "fsl,fman", CONFIG_SYS_FSL_FM2_OFFSET,
 455                         sysinfo.freq_fman[1]);
 456 #endif
 457 #endif
 458
 459 #ifdef CONFIG_SYS_DPAA_QBMAN
 460         do_fixup_by_compat_u32(blob, "fsl,qman",
 461                         "clock-frequency", sysinfo.freq_qman, 1);
 462 #endif
 463
 464 #ifdef CONFIG_SYS_DPAA_PME
 465         do_fixup_by_compat_u32(blob, "fsl,pme",
 466                 "clock-frequency", sysinfo.freq_pme, 1);
 467 #endif
 468 }
 469 #else
 470 #define ft_fixup_dpaa_clks(x)
 471 #endif
 472
 473 #ifdef CONFIG_QE
 474 static void ft_fixup_qe_snum(void *blob)
 475 {
 476         unsigned int svr;
 477
 478         svr = mfspr(SPRN_SVR);
 479         if (SVR_SOC_VER(svr) == SVR_8569) {
 480                 if(IS_SVR_REV(svr, 1, 0))
 481                         do_fixup_by_compat_u32(blob, "fsl,qe",
 482                                 "fsl,qe-num-snums", 46, 1);
 483                 else
 484                         do_fixup_by_compat_u32(blob, "fsl,qe",
 485                                 "fsl,qe-num-snums", 76, 1);
 486         }
 487 }
 488 #endif
 489
 490 /**
 491  * fdt_fixup_fman_firmware -- insert the Fman firmware into the device tree
 492  *
 493  * The binding for an Fman firmware node is documented in
 494  * Documentation/powerpc/dts-bindings/fsl/dpaa/fman.txt.  This node contains
 495  * the actual Fman firmware binary data.  The operating system is expected to
 496  * be able to parse the binary data to determine any attributes it needs.
 497  */
 498 #ifdef CONFIG_SYS_DPAA_FMAN
 499 void fdt_fixup_fman_firmware(void *blob)
 500 {
 501         int rc, fmnode, fwnode = -1;
 502         uint32_t phandle;
 503         struct qe_firmware *fmanfw;
 504         const struct qe_header *hdr;
 505         unsigned int length;
 506         uint32_t crc;
 507         const char *p;
 508
 509         /* The first Fman we find will contain the actual firmware. */
 510         fmnode = fdt_node_offset_by_compatible(blob, -1, "fsl,fman");
 511         if (fmnode < 0)
 512                 /* Exit silently if there are no Fman devices */
 513                 return;
 514
 515         /* If we already have a firmware node, then also exit silently. */
 516         if (fdt_node_offset_by_compatible(blob, -1, "fsl,fman-firmware") > 0)
 517                 return;
 518
 519         /* If the environment variable is not set, then exit silently */
 520         p = getenv("fman_ucode");
 521         if (!p)
 522                 return;
 523
 524         fmanfw = (struct qe_firmware *) simple_strtoul(p, NULL, 16);
 525         if (!fmanfw)
 526                 return;
 527
 528         hdr = &fmanfw->header;
 529         length = be32_to_cpu(hdr->length);
 530
 531         /* Verify the firmware. */
 532         if ((hdr->magic[0] != 'Q') || (hdr->magic[1] != 'E') ||
 533                 (hdr->magic[2] != 'F')) {
 534                 printf("Data at %p is not an Fman firmware\n", fmanfw);
 535                 return;
 536         }
 537
 538         if (length > CONFIG_SYS_QE_FMAN_FW_LENGTH) {
 539                 printf("Fman firmware at %p is too large (size=%u)\n",
 540                        fmanfw, length);
 541                 return;
 542         }
 543
 544         length -= sizeof(u32);  /* Subtract the size of the CRC */
 545         crc = be32_to_cpu(*(u32 *)((void *)fmanfw + length));
 546         if (crc != crc32_no_comp(0, (void *)fmanfw, length)) {
 547                 printf("Fman firmware at %p has invalid CRC\n", fmanfw);
 548                 return;
 549         }
 550
 551         /* Increase the size of the fdt to make room for the node. */
 552         rc = fdt_increase_size(blob, fmanfw->header.length);
 553         if (rc < 0) {
 554                 printf("Unable to make room for Fman firmware: %s\n",
 555                         fdt_strerror(rc));
 556                 return;
 557         }
 558
 559         /* Create the firmware node. */
 560         fwnode = fdt_add_subnode(blob, fmnode, "fman-firmware");
 561         if (fwnode < 0) {
 562                 char s[64];
 563                 fdt_get_path(blob, fmnode, s, sizeof(s));
 564                 printf("Could not add firmware node to %s: %s\n", s,
 565                        fdt_strerror(fwnode));
 566                 return;
 567         }
 568         rc = fdt_setprop_string(blob, fwnode, "compatible", "fsl,fman-firmware");
 569         if (rc < 0) {
 570                 char s[64];
 571                 fdt_get_path(blob, fwnode, s, sizeof(s));
 572                 printf("Could not add compatible property to node %s: %s\n", s,
 573                        fdt_strerror(rc));
 574                 return;
 575         }
 576         phandle = fdt_create_phandle(blob, fwnode);
 577         if (!phandle) {
 578                 char s[64];
 579                 fdt_get_path(blob, fwnode, s, sizeof(s));
 580                 printf("Could not add phandle property to node %s: %s\n", s,
 581                        fdt_strerror(rc));
 582                 return;
 583         }
 584         rc = fdt_setprop(blob, fwnode, "fsl,firmware", fmanfw, fmanfw->header.length);
 585         if (rc < 0) {
 586                 char s[64];
 587                 fdt_get_path(blob, fwnode, s, sizeof(s));
 588                 printf("Could not add firmware property to node %s: %s\n", s,
 589                        fdt_strerror(rc));
 590                 return;
 591         }
 592
 593         /* Find all other Fman nodes and point them to the firmware node. */
 594         while ((fmnode = fdt_node_offset_by_compatible(blob, fmnode, "fsl,fman")) > 0) {
 595                 rc = fdt_setprop_cell(blob, fmnode, "fsl,firmware-phandle", phandle);
 596                 if (rc < 0) {
 597                         char s[64];
 598                         fdt_get_path(blob, fmnode, s, sizeof(s));
 599                         printf("Could not add pointer property to node %s: %s\n",
 600                                s, fdt_strerror(rc));
 601                         return;
 602                 }
 603         }
 604 }
 605 #else
 606 #define fdt_fixup_fman_firmware(x)
 607 #endif
 608
 609 #if defined(CONFIG_PPC_P4080)
 610 static void fdt_fixup_usb(void *fdt)
 611 {
 612         ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
 613         u32 rcwsr11 = in_be32(&gur->rcwsr[11]);
 614         int off;
 615
 616         off = fdt_node_offset_by_compatible(fdt, -1, "fsl,mpc85xx-usb2-mph");
 617         if ((rcwsr11 & FSL_CORENET_RCWSR11_EC1) !=
 618                                 FSL_CORENET_RCWSR11_EC1_FM1_USB1)
 619                 fdt_status_disabled(fdt, off);
 620
 621         off = fdt_node_offset_by_compatible(fdt, -1, "fsl,mpc85xx-usb2-dr");
 622         if ((rcwsr11 & FSL_CORENET_RCWSR11_EC2) !=
 623                                 FSL_CORENET_RCWSR11_EC2_USB2)
 624                 fdt_status_disabled(fdt, off);
 625 }
 626 #else
 627 #define fdt_fixup_usb(x)
 628 #endif
 629
 630 #if defined(CONFIG_PPC_T2080) || defined(CONFIG_PPC_T4240) || \
 631         defined(CONFIG_PPC_T4160) || defined(CONFIG_PPC_T4080)
 632 void fdt_fixup_dma3(void *blob)
 633 {
 634         /* the 3rd DMA is not functional if SRIO2 is chosen */
 635         int nodeoff;
 636         ccsr_gur_t __iomem *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
 637
 638 #define CONFIG_SYS_ELO3_DMA3 (0xffe000000 + 0x102300)
 639 #if defined(CONFIG_PPC_T2080)
 640         u32 srds_prtcl_s2 = in_be32(&gur->rcwsr[4]) &
 641                                     FSL_CORENET2_RCWSR4_SRDS2_PRTCL;
 642         srds_prtcl_s2 >>= FSL_CORENET2_RCWSR4_SRDS2_PRTCL_SHIFT;
 643
 644         switch (srds_prtcl_s2) {
 645         case 0x29:
 646         case 0x2d:
 647         case 0x2e:
 648 #elif defined(CONFIG_PPC_T4240) || defined(CONFIG_PPC_T4160) || \
 649         defined(CONFIG_PPC_T4080)
 650         u32 srds_prtcl_s4 = in_be32(&gur->rcwsr[4]) &
 651                                     FSL_CORENET2_RCWSR4_SRDS4_PRTCL;
 652         srds_prtcl_s4 >>= FSL_CORENET2_RCWSR4_SRDS4_PRTCL_SHIFT;
 653
 654         switch (srds_prtcl_s4) {
 655         case 6:
 656         case 8:
 657         case 14:
 658         case 16:
 659 #endif
 660                 nodeoff = fdt_node_offset_by_compat_reg(blob, "fsl,elo3-dma",
 661                                                         CONFIG_SYS_ELO3_DMA3);
 662                 if (nodeoff > 0)
 663                         fdt_status_disabled(blob, nodeoff);
 664                 else
 665                         printf("WARNING: unable to disable dma3\n");
 666                 break;
 667         default:
 668                 break;
 669         }
 670 }
 671 #else
 672 #define fdt_fixup_dma3(x)
 673 #endif
 674
 675 #if defined(CONFIG_PPC_T1040)
 676 static void fdt_fixup_l2_switch(void *blob)
 677 {
 678         uchar l2swaddr[6];
 679         int node;
 680
 681         /* The l2switch node from device-tree has
 682          * compatible string "vitesse-9953" */
 683         node = fdt_node_offset_by_compatible(blob, -1, "vitesse-9953");
 684         if (node == -FDT_ERR_NOTFOUND)
 685                 /* no l2switch node has been found */
 686                 return;
 687
 688         /* Get MAC address for the l2switch from "l2switchaddr"*/
 689         if (!eth_getenv_enetaddr("l2switchaddr", l2swaddr)) {
 690                 printf("Warning: MAC address for l2switch not found\n");
 691                 memset(l2swaddr, 0, sizeof(l2swaddr));
 692         }
 693
 694         /* Add MAC address to l2switch node */
 695         fdt_setprop(blob, node, "local-mac-address", l2swaddr,
 696                     sizeof(l2swaddr));
 697 }
 698 #else
 699 #define fdt_fixup_l2_switch(x)
 700 #endif
 701
 702 void ft_cpu_setup(void *blob, bd_t *bd)
 703 {
 704         int off;
 705         int val;
 706         int len;
 707         sys_info_t sysinfo;
 708
 709         /* delete crypto node if not on an E-processor */
 710         if (!IS_E_PROCESSOR(get_svr()))
 711                 fdt_fixup_crypto_node(blob, 0);
 712 #if CONFIG_SYS_FSL_SEC_COMPAT >= 4
 713         else {
 714                 ccsr_sec_t __iomem *sec;
 715
 716                 sec = (void __iomem *)CONFIG_SYS_FSL_SEC_ADDR;
 717                 fdt_fixup_crypto_node(blob, in_be32(&sec->secvid_ms));
 718         }
 719 #endif
 720
 721         fdt_fixup_ethernet(blob);
 722
 723         fdt_add_enet_stashing(blob);
 724
 725 #ifndef CONFIG_FSL_TBCLK_EXTRA_DIV
 726 #define CONFIG_FSL_TBCLK_EXTRA_DIV 1
 727 #endif
 728         do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
 729                 "timebase-frequency", get_tbclk() / CONFIG_FSL_TBCLK_EXTRA_DIV,
 730                 1);
 731         do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
 732                 "bus-frequency", bd->bi_busfreq, 1);
 733         get_sys_info(&sysinfo);
 734         off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
 735         while (off != -FDT_ERR_NOTFOUND) {
 736                 u32 *reg = (u32 *)fdt_getprop(blob, off, "reg", &len);
 737                 val = cpu_to_fdt32(sysinfo.freq_processor[(*reg) / (len / 4)]);
 738                 fdt_setprop(blob, off, "clock-frequency", &val, 4);
 739                 off = fdt_node_offset_by_prop_value(blob, off, "device_type",
 740                                                         "cpu", 4);
 741         }
 742         do_fixup_by_prop_u32(blob, "device_type", "soc", 4,
 743                 "bus-frequency", bd->bi_busfreq, 1);
 744
 745         do_fixup_by_compat_u32(blob, "fsl,pq3-localbus",
 746                 "bus-frequency", gd->arch.lbc_clk, 1);
 747         do_fixup_by_compat_u32(blob, "fsl,elbc",
 748                 "bus-frequency", gd->arch.lbc_clk, 1);
 749 #ifdef CONFIG_QE
 750         ft_qe_setup(blob);
 751         ft_fixup_qe_snum(blob);
 752 #endif
 753
 754         fdt_fixup_fman_firmware(blob);
 755
 756 #ifdef CONFIG_SYS_NS16550
 757         do_fixup_by_compat_u32(blob, "ns16550",
 758                 "clock-frequency", CONFIG_SYS_NS16550_CLK, 1);
 759 #endif
 760
 761 #ifdef CONFIG_CPM2
 762         do_fixup_by_compat_u32(blob, "fsl,cpm2-scc-uart",
 763                 "current-speed", gd->baudrate, 1);
 764
 765         do_fixup_by_compat_u32(blob, "fsl,cpm2-brg",
 766                 "clock-frequency", bd->bi_brgfreq, 1);
 767 #endif
 768
 769 #ifdef CONFIG_FSL_CORENET
 770         do_fixup_by_compat_u32(blob, "fsl,qoriq-clockgen-1.0",
 771                 "clock-frequency", CONFIG_SYS_CLK_FREQ, 1);
 772         do_fixup_by_compat_u32(blob, "fsl,qoriq-clockgen-2.0",
 773                 "clock-frequency", CONFIG_SYS_CLK_FREQ, 1);
 774         do_fixup_by_compat_u32(blob, "fsl,mpic",
 775                 "clock-frequency", get_bus_freq(0)/2, 1);
 776 #else
 777         do_fixup_by_compat_u32(blob, "fsl,mpic",
 778                 "clock-frequency", get_bus_freq(0), 1);
 779 #endif
 780
 781         fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
 782
 783 #ifdef CONFIG_MP
 784         ft_fixup_cpu(blob, (u64)bd->bi_memstart + (u64)bd->bi_memsize);
 785         ft_fixup_num_cores(blob);
 786 #endif
 787
 788         ft_fixup_cache(blob);
 789
 790 #if defined(CONFIG_FSL_ESDHC)
 791         fdt_fixup_esdhc(blob, bd);
 792 #endif
 793
 794         ft_fixup_dpaa_clks(blob);
 795
 796 #if defined(CONFIG_SYS_BMAN_MEM_PHYS)
 797         fdt_portal(blob, "fsl,bman-portal", "bman-portals",
 798                         (u64)CONFIG_SYS_BMAN_MEM_PHYS,
 799                         CONFIG_SYS_BMAN_MEM_SIZE);
 800         fdt_fixup_bportals(blob);
 801 #endif
 802
 803 #if defined(CONFIG_SYS_QMAN_MEM_PHYS)
 804         fdt_portal(blob, "fsl,qman-portal", "qman-portals",
 805                         (u64)CONFIG_SYS_QMAN_MEM_PHYS,
 806                         CONFIG_SYS_QMAN_MEM_SIZE);
 807
 808         fdt_fixup_qportals(blob);
 809 #endif
 810
 811 #ifdef CONFIG_SYS_SRIO
 812         ft_srio_setup(blob);
 813 #endif
 814
 815         /*
 816          * system-clock = CCB clock/2
 817          * Here gd->bus_clk = CCB clock
 818          * We are using the system clock as 1588 Timer reference
 819          * clock source select
 820          */
 821         do_fixup_by_compat_u32(blob, "fsl,gianfar-ptp-timer",
 822                         "timer-frequency", gd->bus_clk/2, 1);
 823
 824         /*
 825          * clock-freq should change to clock-frequency and
 826          * flexcan-v1.0 should change to p1010-flexcan respectively
 827          * in the future.
 828          */
 829         do_fixup_by_compat_u32(blob, "fsl,flexcan-v1.0",
 830                         "clock_freq", gd->bus_clk/2, 1);
 831
 832         do_fixup_by_compat_u32(blob, "fsl,flexcan-v1.0",
 833                         "clock-frequency", gd->bus_clk/2, 1);
 834
 835         do_fixup_by_compat_u32(blob, "fsl,p1010-flexcan",
 836                         "clock-frequency", gd->bus_clk/2, 1);
 837
 838         fdt_fixup_usb(blob);
 839
 840         fdt_fixup_l2_switch(blob);
 841
 842         fdt_fixup_dma3(blob);
 843 }
 844
 845 /*
 846  * For some CCSR devices, we only have the virtual address, not the physical
 847  * address.  This is because we map CCSR as a whole, so we typically don't need
 848  * a macro for the physical address of any device within CCSR.  In this case,
 849  * we calculate the physical address of that device using it's the difference
 850  * between the virtual address of the device and the virtual address of the
 851  * beginning of CCSR.
 852  */
 853 #define CCSR_VIRT_TO_PHYS(x) \
 854         (CONFIG_SYS_CCSRBAR_PHYS + ((x) - CONFIG_SYS_CCSRBAR))
 855
 856 static void msg(const char *name, uint64_t uaddr, uint64_t daddr)
 857 {
 858         printf("Warning: U-Boot configured %s at address %llx,\n"
 859                "but the device tree has it at %llx\n", name, uaddr, daddr);
 860 }
 861
 862 /*
 863  * Verify the device tree
 864  *
 865  * This function compares several CONFIG_xxx macros that contain physical
 866  * addresses with the corresponding nodes in the device tree, to see if
 867  * the physical addresses are all correct.  For example, if
 868  * CONFIG_SYS_NS16550_COM1 is defined, then it contains the virtual address
 869  * of the first UART.  We convert this to a physical address and compare
 870  * that with the physical address of the first ns16550-compatible node
 871  * in the device tree.  If they don't match, then we display a warning.
 872  *
 873  * Returns 1 on success, 0 on failure
 874  */
 875 int ft_verify_fdt(void *fdt)
 876 {
 877         uint64_t addr = 0;
 878         int aliases;
 879         int off;
 880
 881         /* First check the CCSR base address */
 882         off = fdt_node_offset_by_prop_value(fdt, -1, "device_type", "soc", 4);
 883         if (off > 0)
 884                 addr = fdt_get_base_address(fdt, off);
 885
 886         if (!addr) {
 887                 printf("Warning: could not determine base CCSR address in "
 888                        "device tree\n");
 889                 /* No point in checking anything else */
 890                 return 0;
 891         }
 892
 893         if (addr != CONFIG_SYS_CCSRBAR_PHYS) {
 894                 msg("CCSR", CONFIG_SYS_CCSRBAR_PHYS, addr);
 895                 /* No point in checking anything else */
 896                 return 0;
 897         }
 898
 899         /*
 900          * Check some nodes via aliases.  We assume that U-Boot and the device
 901          * tree enumerate the devices equally.  E.g. the first serial port in
 902          * U-Boot is the same as "serial0" in the device tree.
 903          */
 904         aliases = fdt_path_offset(fdt, "/aliases");
 905         if (aliases > 0) {
 906 #ifdef CONFIG_SYS_NS16550_COM1
 907                 if (!fdt_verify_alias_address(fdt, aliases, "serial0",
 908                         CCSR_VIRT_TO_PHYS(CONFIG_SYS_NS16550_COM1)))
 909                         return 0;
 910 #endif
 911
 912 #ifdef CONFIG_SYS_NS16550_COM2
 913                 if (!fdt_verify_alias_address(fdt, aliases, "serial1",
 914                         CCSR_VIRT_TO_PHYS(CONFIG_SYS_NS16550_COM2)))
 915                         return 0;
 916 #endif
 917         }
 918
 919         /*
 920          * The localbus node is typically a root node, even though the lbc
 921          * controller is part of CCSR.  If we were to put the lbc node under
 922          * the SOC node, then the 'ranges' property in the lbc node would
 923          * translate through the 'ranges' property of the parent SOC node, and
 924          * we don't want that.  Since it's a separate node, it's possible for
 925          * the 'reg' property to be wrong, so check it here.  For now, we
 926          * only check for "fsl,elbc" nodes.
 927          */
 928 #ifdef CONFIG_SYS_LBC_ADDR
 929         off = fdt_node_offset_by_compatible(fdt, -1, "fsl,elbc");
 930         if (off > 0) {
 931                 const fdt32_t *reg = fdt_getprop(fdt, off, "reg", NULL);
 932                 if (reg) {
 933                         uint64_t uaddr = CCSR_VIRT_TO_PHYS(CONFIG_SYS_LBC_ADDR);
 934
 935                         addr = fdt_translate_address(fdt, off, reg);
 936                         if (uaddr != addr) {
 937                                 msg("the localbus", uaddr, addr);
 938                                 return 0;
 939                         }
 940                 }
 941         }
 942 #endif
 943
 944         return 1;
 945 }