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1 /*
2  * Copyright 2007-2011 Freescale Semiconductor, Inc.
3  *
4  * (C) Copyright 2000
5  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6  *
7  * See file CREDITS for list of people who contributed to this
8  * project.
9  *
10  * This program is free software; you can redistribute it and/or
11  * modify it under the terms of the GNU General Public License as
12  * published by the Free Software Foundation; either version 2 of
13  * the License, or (at your option) any later version.
14  *
15  * This program is distributed in the hope that it will be useful,
16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
18  * GNU General Public License for more details.
19  *
20  * You should have received a copy of the GNU General Public License
21  * along with this program; if not, write to the Free Software
22  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23  * MA 02111-1307 USA
24  */
25
26 #include <common.h>
27 #include <libfdt.h>
28 #include <fdt_support.h>
29 #include <asm/processor.h>
30 #include <linux/ctype.h>
31 #include <asm/io.h>
32 #include <asm/fsl_portals.h>
33 #ifdef CONFIG_FSL_ESDHC
34 #include <fsl_esdhc.h>
35 #endif
36 #include "../../../../drivers/qe/qe.h"          /* For struct qe_firmware */
37
38 DECLARE_GLOBAL_DATA_PTR;
39
40 extern void ft_qe_setup(void *blob);
41 extern void ft_fixup_num_cores(void *blob);
42 extern void ft_srio_setup(void *blob);
43
44 #ifdef CONFIG_MP
45 #include "mp.h"
46
47 void ft_fixup_cpu(void *blob, u64 memory_limit)
48 {
49         int off;
50         ulong spin_tbl_addr = get_spin_phys_addr();
51         u32 bootpg = determine_mp_bootpg();
52         u32 id = get_my_id();
53         const char *enable_method;
54
55         off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
56         while (off != -FDT_ERR_NOTFOUND) {
57                 u32 *reg = (u32 *)fdt_getprop(blob, off, "reg", 0);
58
59                 if (reg) {
60                         u32 phys_cpu_id = thread_to_core(*reg);
61                         u64 val = phys_cpu_id * SIZE_BOOT_ENTRY + spin_tbl_addr;
62                         val = cpu_to_fdt64(val);
63                         if (*reg == id) {
64                                 fdt_setprop_string(blob, off, "status",
65                                                                 "okay");
66                         } else {
67                                 fdt_setprop_string(blob, off, "status",
68                                                                 "disabled");
69                         }
70
71                         if (hold_cores_in_reset(0)) {
72 #ifdef CONFIG_FSL_CORENET
73                                 /* Cores held in reset, use BRR to release */
74                                 enable_method = "fsl,brr-holdoff";
75 #else
76                                 /* Cores held in reset, use EEBPCR to release */
77                                 enable_method = "fsl,eebpcr-holdoff";
78 #endif
79                         } else {
80                                 /* Cores out of reset and in a spin-loop */
81                                 enable_method = "spin-table";
82
83                                 fdt_setprop(blob, off, "cpu-release-addr",
84                                                 &val, sizeof(val));
85                         }
86
87                         fdt_setprop_string(blob, off, "enable-method",
88                                                         enable_method);
89                 } else {
90                         printf ("cpu NULL\n");
91                 }
92                 off = fdt_node_offset_by_prop_value(blob, off,
93                                 "device_type", "cpu", 4);
94         }
95
96         /* Reserve the boot page so OSes dont use it */
97         if ((u64)bootpg < memory_limit) {
98                 off = fdt_add_mem_rsv(blob, bootpg, (u64)4096);
99                 if (off < 0)
100                         printf("%s: %s\n", __FUNCTION__, fdt_strerror(off));
101         }
102 }
103 #endif
104
105 #ifdef CONFIG_SYS_FSL_CPC
106 static inline void ft_fixup_l3cache(void *blob, int off)
107 {
108         u32 line_size, num_ways, size, num_sets;
109         cpc_corenet_t *cpc = (void *)CONFIG_SYS_FSL_CPC_ADDR;
110         u32 cfg0 = in_be32(&cpc->cpccfg0);
111
112         size = CPC_CFG0_SZ_K(cfg0) * 1024 * CONFIG_SYS_NUM_CPC;
113         num_ways = CPC_CFG0_NUM_WAYS(cfg0);
114         line_size = CPC_CFG0_LINE_SZ(cfg0);
115         num_sets = size / (line_size * num_ways);
116
117         fdt_setprop(blob, off, "cache-unified", NULL, 0);
118         fdt_setprop_cell(blob, off, "cache-block-size", line_size);
119         fdt_setprop_cell(blob, off, "cache-size", size);
120         fdt_setprop_cell(blob, off, "cache-sets", num_sets);
121         fdt_setprop_cell(blob, off, "cache-level", 3);
122 #ifdef CONFIG_SYS_CACHE_STASHING
123         fdt_setprop_cell(blob, off, "cache-stash-id", 1);
124 #endif
125 }
126 #else
127 #define ft_fixup_l3cache(x, y)
128 #endif
129
130 #if defined(CONFIG_L2_CACHE)
131 /* return size in kilobytes */
132 static inline u32 l2cache_size(void)
133 {
134         volatile ccsr_l2cache_t *l2cache = (void *)CONFIG_SYS_MPC85xx_L2_ADDR;
135         volatile u32 l2siz_field = (l2cache->l2ctl >> 28) & 0x3;
136         u32 ver = SVR_SOC_VER(get_svr());
137
138         switch (l2siz_field) {
139         case 0x0:
140                 break;
141         case 0x1:
142                 if (ver == SVR_8540 || ver == SVR_8560   ||
143                     ver == SVR_8541 || ver == SVR_8555)
144                         return 128;
145                 else
146                         return 256;
147                 break;
148         case 0x2:
149                 if (ver == SVR_8540 || ver == SVR_8560   ||
150                     ver == SVR_8541 || ver == SVR_8555)
151                         return 256;
152                 else
153                         return 512;
154                 break;
155         case 0x3:
156                 return 1024;
157                 break;
158         }
159
160         return 0;
161 }
162
163 static inline void ft_fixup_l2cache(void *blob)
164 {
165         int len, off;
166         u32 *ph;
167         struct cpu_type *cpu = identify_cpu(SVR_SOC_VER(get_svr()));
168
169         const u32 line_size = 32;
170         const u32 num_ways = 8;
171         const u32 size = l2cache_size() * 1024;
172         const u32 num_sets = size / (line_size * num_ways);
173
174         off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
175         if (off < 0) {
176                 debug("no cpu node fount\n");
177                 return;
178         }
179
180         ph = (u32 *)fdt_getprop(blob, off, "next-level-cache", 0);
181
182         if (ph == NULL) {
183                 debug("no next-level-cache property\n");
184                 return ;
185         }
186
187         off = fdt_node_offset_by_phandle(blob, *ph);
188         if (off < 0) {
189                 printf("%s: %s\n", __func__, fdt_strerror(off));
190                 return ;
191         }
192
193         if (cpu) {
194                 char buf[40];
195
196                 if (isdigit(cpu->name[0])) {
197                         /* MPCxxxx, where xxxx == 4-digit number */
198                         len = sprintf(buf, "fsl,mpc%s-l2-cache-controller",
199                                 cpu->name) + 1;
200                 } else {
201                         /* Pxxxx or Txxxx, where xxxx == 4-digit number */
202                         len = sprintf(buf, "fsl,%c%s-l2-cache-controller",
203                                 tolower(cpu->name[0]), cpu->name + 1) + 1;
204                 }
205
206                 /*
207                  * append "cache" after the NULL character that the previous
208                  * sprintf wrote.  This is how a device tree stores multiple
209                  * strings in a property.
210                  */
211                 len += sprintf(buf + len, "cache") + 1;
212
213                 fdt_setprop(blob, off, "compatible", buf, len);
214         }
215         fdt_setprop(blob, off, "cache-unified", NULL, 0);
216         fdt_setprop_cell(blob, off, "cache-block-size", line_size);
217         fdt_setprop_cell(blob, off, "cache-size", size);
218         fdt_setprop_cell(blob, off, "cache-sets", num_sets);
219         fdt_setprop_cell(blob, off, "cache-level", 2);
220
221         /* we dont bother w/L3 since no platform of this type has one */
222 }
223 #elif defined(CONFIG_BACKSIDE_L2_CACHE)
224 static inline void ft_fixup_l2cache(void *blob)
225 {
226         int off, l2_off, l3_off = -1;
227         u32 *ph;
228         u32 l2cfg0 = mfspr(SPRN_L2CFG0);
229         u32 size, line_size, num_ways, num_sets;
230         int has_l2 = 1;
231
232         /* P2040/P2040E has no L2, so dont set any L2 props */
233         if (SVR_SOC_VER(get_svr()) == SVR_P2040)
234                 has_l2 = 0;
235
236         size = (l2cfg0 & 0x3fff) * 64 * 1024;
237         num_ways = ((l2cfg0 >> 14) & 0x1f) + 1;
238         line_size = (((l2cfg0 >> 23) & 0x3) + 1) * 32;
239         num_sets = size / (line_size * num_ways);
240
241         off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
242
243         while (off != -FDT_ERR_NOTFOUND) {
244                 ph = (u32 *)fdt_getprop(blob, off, "next-level-cache", 0);
245
246                 if (ph == NULL) {
247                         debug("no next-level-cache property\n");
248                         goto next;
249                 }
250
251                 l2_off = fdt_node_offset_by_phandle(blob, *ph);
252                 if (l2_off < 0) {
253                         printf("%s: %s\n", __func__, fdt_strerror(off));
254                         goto next;
255                 }
256
257                 if (has_l2) {
258 #ifdef CONFIG_SYS_CACHE_STASHING
259                         u32 *reg = (u32 *)fdt_getprop(blob, off, "reg", 0);
260                         if (reg)
261                                 fdt_setprop_cell(blob, l2_off, "cache-stash-id",
262                                          (*reg * 2) + 32 + 1);
263 #endif
264
265                         fdt_setprop(blob, l2_off, "cache-unified", NULL, 0);
266                         fdt_setprop_cell(blob, l2_off, "cache-block-size",
267                                                 line_size);
268                         fdt_setprop_cell(blob, l2_off, "cache-size", size);
269                         fdt_setprop_cell(blob, l2_off, "cache-sets", num_sets);
270                         fdt_setprop_cell(blob, l2_off, "cache-level", 2);
271                         fdt_setprop(blob, l2_off, "compatible", "cache", 6);
272                 }
273
274                 if (l3_off < 0) {
275                         ph = (u32 *)fdt_getprop(blob, l2_off, "next-level-cache", 0);
276
277                         if (ph == NULL) {
278                                 debug("no next-level-cache property\n");
279                                 goto next;
280                         }
281                         l3_off = *ph;
282                 }
283 next:
284                 off = fdt_node_offset_by_prop_value(blob, off,
285                                 "device_type", "cpu", 4);
286         }
287         if (l3_off > 0) {
288                 l3_off = fdt_node_offset_by_phandle(blob, l3_off);
289                 if (l3_off < 0) {
290                         printf("%s: %s\n", __func__, fdt_strerror(off));
291                         return ;
292                 }
293                 ft_fixup_l3cache(blob, l3_off);
294         }
295 }
296 #else
297 #define ft_fixup_l2cache(x)
298 #endif
299
300 static inline void ft_fixup_cache(void *blob)
301 {
302         int off;
303
304         off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
305
306         while (off != -FDT_ERR_NOTFOUND) {
307                 u32 l1cfg0 = mfspr(SPRN_L1CFG0);
308                 u32 l1cfg1 = mfspr(SPRN_L1CFG1);
309                 u32 isize, iline_size, inum_sets, inum_ways;
310                 u32 dsize, dline_size, dnum_sets, dnum_ways;
311
312                 /* d-side config */
313                 dsize = (l1cfg0 & 0x7ff) * 1024;
314                 dnum_ways = ((l1cfg0 >> 11) & 0xff) + 1;
315                 dline_size = (((l1cfg0 >> 23) & 0x3) + 1) * 32;
316                 dnum_sets = dsize / (dline_size * dnum_ways);
317
318                 fdt_setprop_cell(blob, off, "d-cache-block-size", dline_size);
319                 fdt_setprop_cell(blob, off, "d-cache-size", dsize);
320                 fdt_setprop_cell(blob, off, "d-cache-sets", dnum_sets);
321
322 #ifdef CONFIG_SYS_CACHE_STASHING
323                 {
324                         u32 *reg = (u32 *)fdt_getprop(blob, off, "reg", 0);
325                         if (reg)
326                                 fdt_setprop_cell(blob, off, "cache-stash-id",
327                                          (*reg * 2) + 32 + 0);
328                 }
329 #endif
330
331                 /* i-side config */
332                 isize = (l1cfg1 & 0x7ff) * 1024;
333                 inum_ways = ((l1cfg1 >> 11) & 0xff) + 1;
334                 iline_size = (((l1cfg1 >> 23) & 0x3) + 1) * 32;
335                 inum_sets = isize / (iline_size * inum_ways);
336
337                 fdt_setprop_cell(blob, off, "i-cache-block-size", iline_size);
338                 fdt_setprop_cell(blob, off, "i-cache-size", isize);
339                 fdt_setprop_cell(blob, off, "i-cache-sets", inum_sets);
340
341                 off = fdt_node_offset_by_prop_value(blob, off,
342                                 "device_type", "cpu", 4);
343         }
344
345         ft_fixup_l2cache(blob);
346 }
347
348
349 void fdt_add_enet_stashing(void *fdt)
350 {
351         do_fixup_by_compat(fdt, "gianfar", "bd-stash", NULL, 0, 1);
352
353         do_fixup_by_compat_u32(fdt, "gianfar", "rx-stash-len", 96, 1);
354
355         do_fixup_by_compat_u32(fdt, "gianfar", "rx-stash-idx", 0, 1);
356         do_fixup_by_compat(fdt, "fsl,etsec2", "bd-stash", NULL, 0, 1);
357         do_fixup_by_compat_u32(fdt, "fsl,etsec2", "rx-stash-len", 96, 1);
358         do_fixup_by_compat_u32(fdt, "fsl,etsec2", "rx-stash-idx", 0, 1);
359 }
360
361 #if defined(CONFIG_SYS_DPAA_FMAN) || defined(CONFIG_SYS_DPAA_PME)
362 #ifdef CONFIG_SYS_DPAA_FMAN
363 static void ft_fixup_clks(void *blob, const char *compat, u32 offset,
364                           unsigned long freq)
365 {
366         phys_addr_t phys = offset + CONFIG_SYS_CCSRBAR_PHYS;
367         int off = fdt_node_offset_by_compat_reg(blob, compat, phys);
368
369         if (off >= 0) {
370                 off = fdt_setprop_cell(blob, off, "clock-frequency", freq);
371                 if (off > 0)
372                         printf("WARNING enable to set clock-frequency "
373                                 "for %s: %s\n", compat, fdt_strerror(off));
374         }
375 }
376 #endif
377
378 static void ft_fixup_dpaa_clks(void *blob)
379 {
380         sys_info_t sysinfo;
381
382         get_sys_info(&sysinfo);
383 #ifdef CONFIG_SYS_DPAA_FMAN
384         ft_fixup_clks(blob, "fsl,fman", CONFIG_SYS_FSL_FM1_OFFSET,
385                         sysinfo.freqFMan[0]);
386
387 #if (CONFIG_SYS_NUM_FMAN == 2)
388         ft_fixup_clks(blob, "fsl,fman", CONFIG_SYS_FSL_FM2_OFFSET,
389                         sysinfo.freqFMan[1]);
390 #endif
391 #endif
392
393 #ifdef CONFIG_SYS_DPAA_PME
394         do_fixup_by_compat_u32(blob, "fsl,pme",
395                 "clock-frequency", sysinfo.freqPME, 1);
396 #endif
397 }
398 #else
399 #define ft_fixup_dpaa_clks(x)
400 #endif
401
402 #ifdef CONFIG_QE
403 static void ft_fixup_qe_snum(void *blob)
404 {
405         unsigned int svr;
406
407         svr = mfspr(SPRN_SVR);
408         if (SVR_SOC_VER(svr) == SVR_8569) {
409                 if(IS_SVR_REV(svr, 1, 0))
410                         do_fixup_by_compat_u32(blob, "fsl,qe",
411                                 "fsl,qe-num-snums", 46, 1);
412                 else
413                         do_fixup_by_compat_u32(blob, "fsl,qe",
414                                 "fsl,qe-num-snums", 76, 1);
415         }
416 }
417 #endif
418
419 /**
420  * fdt_fixup_fman_firmware -- insert the Fman firmware into the device tree
421  *
422  * The binding for an Fman firmware node is documented in
423  * Documentation/powerpc/dts-bindings/fsl/dpaa/fman.txt.  This node contains
424  * the actual Fman firmware binary data.  The operating system is expected to
425  * be able to parse the binary data to determine any attributes it needs.
426  */
427 #ifdef CONFIG_SYS_DPAA_FMAN
428 void fdt_fixup_fman_firmware(void *blob)
429 {
430         int rc, fmnode, fwnode = -1;
431         uint32_t phandle;
432         struct qe_firmware *fmanfw;
433         const struct qe_header *hdr;
434         unsigned int length;
435         uint32_t crc;
436         const char *p;
437
438         /* The first Fman we find will contain the actual firmware. */
439         fmnode = fdt_node_offset_by_compatible(blob, -1, "fsl,fman");
440         if (fmnode < 0)
441                 /* Exit silently if there are no Fman devices */
442                 return;
443
444         /* If we already have a firmware node, then also exit silently. */
445         if (fdt_node_offset_by_compatible(blob, -1, "fsl,fman-firmware") > 0)
446                 return;
447
448         /* If the environment variable is not set, then exit silently */
449         p = getenv("fman_ucode");
450         if (!p)
451                 return;
452
453         fmanfw = (struct qe_firmware *) simple_strtoul(p, NULL, 0);
454         if (!fmanfw)
455                 return;
456
457         hdr = &fmanfw->header;
458         length = be32_to_cpu(hdr->length);
459
460         /* Verify the firmware. */
461         if ((hdr->magic[0] != 'Q') || (hdr->magic[1] != 'E') ||
462                 (hdr->magic[2] != 'F')) {
463                 printf("Data at %p is not an Fman firmware\n", fmanfw);
464                 return;
465         }
466
467         if (length > CONFIG_SYS_QE_FMAN_FW_LENGTH) {
468                 printf("Fman firmware at %p is too large (size=%u)\n",
469                        fmanfw, length);
470                 return;
471         }
472
473         length -= sizeof(u32);  /* Subtract the size of the CRC */
474         crc = be32_to_cpu(*(u32 *)((void *)fmanfw + length));
475         if (crc != crc32_no_comp(0, (void *)fmanfw, length)) {
476                 printf("Fman firmware at %p has invalid CRC\n", fmanfw);
477                 return;
478         }
479
480         /* Increase the size of the fdt to make room for the node. */
481         rc = fdt_increase_size(blob, fmanfw->header.length);
482         if (rc < 0) {
483                 printf("Unable to make room for Fman firmware: %s\n",
484                         fdt_strerror(rc));
485                 return;
486         }
487
488         /* Create the firmware node. */
489         fwnode = fdt_add_subnode(blob, fmnode, "fman-firmware");
490         if (fwnode < 0) {
491                 char s[64];
492                 fdt_get_path(blob, fmnode, s, sizeof(s));
493                 printf("Could not add firmware node to %s: %s\n", s,
494                        fdt_strerror(fwnode));
495                 return;
496         }
497         rc = fdt_setprop_string(blob, fwnode, "compatible", "fsl,fman-firmware");
498         if (rc < 0) {
499                 char s[64];
500                 fdt_get_path(blob, fwnode, s, sizeof(s));
501                 printf("Could not add compatible property to node %s: %s\n", s,
502                        fdt_strerror(rc));
503                 return;
504         }
505         phandle = fdt_create_phandle(blob, fwnode);
506         if (!phandle) {
507                 char s[64];
508                 fdt_get_path(blob, fwnode, s, sizeof(s));
509                 printf("Could not add phandle property to node %s: %s\n", s,
510                        fdt_strerror(rc));
511                 return;
512         }
513         rc = fdt_setprop(blob, fwnode, "fsl,firmware", fmanfw, fmanfw->header.length);
514         if (rc < 0) {
515                 char s[64];
516                 fdt_get_path(blob, fwnode, s, sizeof(s));
517                 printf("Could not add firmware property to node %s: %s\n", s,
518                        fdt_strerror(rc));
519                 return;
520         }
521
522         /* Find all other Fman nodes and point them to the firmware node. */
523         while ((fmnode = fdt_node_offset_by_compatible(blob, fmnode, "fsl,fman")) > 0) {
524                 rc = fdt_setprop_cell(blob, fmnode, "fsl,firmware-phandle", phandle);
525                 if (rc < 0) {
526                         char s[64];
527                         fdt_get_path(blob, fmnode, s, sizeof(s));
528                         printf("Could not add pointer property to node %s: %s\n",
529                                s, fdt_strerror(rc));
530                         return;
531                 }
532         }
533 }
534 #else
535 #define fdt_fixup_fman_firmware(x)
536 #endif
537
538 #if defined(CONFIG_PPC_P4080)
539 static void fdt_fixup_usb(void *fdt)
540 {
541         ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
542         u32 rcwsr11 = in_be32(&gur->rcwsr[11]);
543         int off;
544
545         off = fdt_node_offset_by_compatible(fdt, -1, "fsl,mpc85xx-usb2-mph");
546         if ((rcwsr11 & FSL_CORENET_RCWSR11_EC1) !=
547                                 FSL_CORENET_RCWSR11_EC1_FM1_USB1)
548                 fdt_status_disabled(fdt, off);
549
550         off = fdt_node_offset_by_compatible(fdt, -1, "fsl,mpc85xx-usb2-dr");
551         if ((rcwsr11 & FSL_CORENET_RCWSR11_EC2) !=
552                                 FSL_CORENET_RCWSR11_EC2_USB2)
553                 fdt_status_disabled(fdt, off);
554 }
555 #else
556 #define fdt_fixup_usb(x)
557 #endif
558
559 void ft_cpu_setup(void *blob, bd_t *bd)
560 {
561         int off;
562         int val;
563         sys_info_t sysinfo;
564
565         /* delete crypto node if not on an E-processor */
566         if (!IS_E_PROCESSOR(get_svr()))
567                 fdt_fixup_crypto_node(blob, 0);
568
569         fdt_fixup_ethernet(blob);
570
571         fdt_add_enet_stashing(blob);
572
573         do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
574                 "timebase-frequency", get_tbclk(), 1);
575         do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
576                 "bus-frequency", bd->bi_busfreq, 1);
577         get_sys_info(&sysinfo);
578         off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
579         while (off != -FDT_ERR_NOTFOUND) {
580                 u32 *reg = (u32 *)fdt_getprop(blob, off, "reg", 0);
581                 val = cpu_to_fdt32(sysinfo.freqProcessor[*reg]);
582                 fdt_setprop(blob, off, "clock-frequency", &val, 4);
583                 off = fdt_node_offset_by_prop_value(blob, off, "device_type",
584                                                         "cpu", 4);
585         }
586         do_fixup_by_prop_u32(blob, "device_type", "soc", 4,
587                 "bus-frequency", bd->bi_busfreq, 1);
588
589         do_fixup_by_compat_u32(blob, "fsl,pq3-localbus",
590                 "bus-frequency", gd->lbc_clk, 1);
591         do_fixup_by_compat_u32(blob, "fsl,elbc",
592                 "bus-frequency", gd->lbc_clk, 1);
593 #ifdef CONFIG_QE
594         ft_qe_setup(blob);
595         ft_fixup_qe_snum(blob);
596 #endif
597
598         fdt_fixup_fman_firmware(blob);
599
600 #ifdef CONFIG_SYS_NS16550
601         do_fixup_by_compat_u32(blob, "ns16550",
602                 "clock-frequency", CONFIG_SYS_NS16550_CLK, 1);
603 #endif
604
605 #ifdef CONFIG_CPM2
606         do_fixup_by_compat_u32(blob, "fsl,cpm2-scc-uart",
607                 "current-speed", bd->bi_baudrate, 1);
608
609         do_fixup_by_compat_u32(blob, "fsl,cpm2-brg",
610                 "clock-frequency", bd->bi_brgfreq, 1);
611 #endif
612
613 #ifdef CONFIG_FSL_CORENET
614         do_fixup_by_compat_u32(blob, "fsl,qoriq-clockgen-1.0",
615                 "clock-frequency", CONFIG_SYS_CLK_FREQ, 1);
616 #endif
617
618         fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
619
620 #ifdef CONFIG_MP
621         ft_fixup_cpu(blob, (u64)bd->bi_memstart + (u64)bd->bi_memsize);
622         ft_fixup_num_cores(blob);
623 #endif
624
625         ft_fixup_cache(blob);
626
627 #if defined(CONFIG_FSL_ESDHC)
628         fdt_fixup_esdhc(blob, bd);
629 #endif
630
631         ft_fixup_dpaa_clks(blob);
632
633 #if defined(CONFIG_SYS_BMAN_MEM_PHYS)
634         fdt_portal(blob, "fsl,bman-portal", "bman-portals",
635                         (u64)CONFIG_SYS_BMAN_MEM_PHYS,
636                         CONFIG_SYS_BMAN_MEM_SIZE);
637         fdt_fixup_bportals(blob);
638 #endif
639
640 #if defined(CONFIG_SYS_QMAN_MEM_PHYS)
641         fdt_portal(blob, "fsl,qman-portal", "qman-portals",
642                         (u64)CONFIG_SYS_QMAN_MEM_PHYS,
643                         CONFIG_SYS_QMAN_MEM_SIZE);
644
645         fdt_fixup_qportals(blob);
646 #endif
647
648 #ifdef CONFIG_SYS_SRIO
649         ft_srio_setup(blob);
650 #endif
651
652         /*
653          * system-clock = CCB clock/2
654          * Here gd->bus_clk = CCB clock
655          * We are using the system clock as 1588 Timer reference
656          * clock source select
657          */
658         do_fixup_by_compat_u32(blob, "fsl,gianfar-ptp-timer",
659                         "timer-frequency", gd->bus_clk/2, 1);
660
661         /*
662          * clock-freq should change to clock-frequency and
663          * flexcan-v1.0 should change to p1010-flexcan respectively
664          * in the future.
665          */
666         do_fixup_by_compat_u32(blob, "fsl,flexcan-v1.0",
667                         "clock_freq", gd->bus_clk/2, 1);
668
669         do_fixup_by_compat_u32(blob, "fsl,flexcan-v1.0",
670                         "clock-frequency", gd->bus_clk/2, 1);
671
672         do_fixup_by_compat_u32(blob, "fsl,p1010-flexcan",
673                         "clock-frequency", gd->bus_clk/2, 1);
674
675         fdt_fixup_usb(blob);
676 }
677
678 /*
679  * For some CCSR devices, we only have the virtual address, not the physical
680  * address.  This is because we map CCSR as a whole, so we typically don't need
681  * a macro for the physical address of any device within CCSR.  In this case,
682  * we calculate the physical address of that device using it's the difference
683  * between the virtual address of the device and the virtual address of the
684  * beginning of CCSR.
685  */
686 #define CCSR_VIRT_TO_PHYS(x) \
687         (CONFIG_SYS_CCSRBAR_PHYS + ((x) - CONFIG_SYS_CCSRBAR))
688
689 static void msg(const char *name, uint64_t uaddr, uint64_t daddr)
690 {
691         printf("Warning: U-Boot configured %s at address %llx,\n"
692                "but the device tree has it at %llx\n", name, uaddr, daddr);
693 }
694
695 /*
696  * Verify the device tree
697  *
698  * This function compares several CONFIG_xxx macros that contain physical
699  * addresses with the corresponding nodes in the device tree, to see if
700  * the physical addresses are all correct.  For example, if
701  * CONFIG_SYS_NS16550_COM1 is defined, then it contains the virtual address
702  * of the first UART.  We convert this to a physical address and compare
703  * that with the physical address of the first ns16550-compatible node
704  * in the device tree.  If they don't match, then we display a warning.
705  *
706  * Returns 1 on success, 0 on failure
707  */
708 int ft_verify_fdt(void *fdt)
709 {
710         uint64_t addr = 0;
711         int aliases;
712         int off;
713
714         /* First check the CCSR base address */
715         off = fdt_node_offset_by_prop_value(fdt, -1, "device_type", "soc", 4);
716         if (off > 0)
717                 addr = fdt_get_base_address(fdt, off);
718
719         if (!addr) {
720                 printf("Warning: could not determine base CCSR address in "
721                        "device tree\n");
722                 /* No point in checking anything else */
723                 return 0;
724         }
725
726         if (addr != CONFIG_SYS_CCSRBAR_PHYS) {
727                 msg("CCSR", CONFIG_SYS_CCSRBAR_PHYS, addr);
728                 /* No point in checking anything else */
729                 return 0;
730         }
731
732         /*
733          * Check some nodes via aliases.  We assume that U-Boot and the device
734          * tree enumerate the devices equally.  E.g. the first serial port in
735          * U-Boot is the same as "serial0" in the device tree.
736          */
737         aliases = fdt_path_offset(fdt, "/aliases");
738         if (aliases > 0) {
739 #ifdef CONFIG_SYS_NS16550_COM1
740                 if (!fdt_verify_alias_address(fdt, aliases, "serial0",
741                         CCSR_VIRT_TO_PHYS(CONFIG_SYS_NS16550_COM1)))
742                         return 0;
743 #endif
744
745 #ifdef CONFIG_SYS_NS16550_COM2
746                 if (!fdt_verify_alias_address(fdt, aliases, "serial1",
747                         CCSR_VIRT_TO_PHYS(CONFIG_SYS_NS16550_COM2)))
748                         return 0;
749 #endif
750         }
751
752         /*
753          * The localbus node is typically a root node, even though the lbc
754          * controller is part of CCSR.  If we were to put the lbc node under
755          * the SOC node, then the 'ranges' property in the lbc node would
756          * translate through the 'ranges' property of the parent SOC node, and
757          * we don't want that.  Since it's a separate node, it's possible for
758          * the 'reg' property to be wrong, so check it here.  For now, we
759          * only check for "fsl,elbc" nodes.
760          */
761 #ifdef CONFIG_SYS_LBC_ADDR
762         off = fdt_node_offset_by_compatible(fdt, -1, "fsl,elbc");
763         if (off > 0) {
764                 const u32 *reg = fdt_getprop(fdt, off, "reg", NULL);
765                 if (reg) {
766                         uint64_t uaddr = CCSR_VIRT_TO_PHYS(CONFIG_SYS_LBC_ADDR);
767
768                         addr = fdt_translate_address(fdt, off, reg);
769                         if (uaddr != addr) {
770                                 msg("the localbus", uaddr, addr);
771                                 return 0;
772                         }
773                 }
774         }
775 #endif
776
777         return 1;
778 }