board/atmel/at91sam9260ek/at91sam9260ek.c

   1 /*
   2  * (C) Copyright 2007-2008
   3  * Stelian Pop <stelian@popies.net>
   4  * Lead Tech Design <www.leadtechdesign.com>
   5  *
   6  * See file CREDITS for list of people who contributed to this
   7  * project.
   8  *
   9  * This program is free software; you can redistribute it and/or
  10  * modify it under the terms of the GNU General Public License as
  11  * published by the Free Software Foundation; either version 2 of
  12  * the License, or (at your option) any later version.
  13  *
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17  * GNU General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, write to the Free Software
  21  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  22  * MA 02111-1307 USA
  23  */
  24
  25 #include <common.h>
  26 #include <asm/io.h>
  27 #include <asm/arch/at91sam9260_matrix.h>
  28 #include <asm/arch/at91sam9_smc.h>
  29 #include <asm/arch/at91_common.h>
  30 #include <asm/arch/at91_pmc.h>
  31 #include <asm/arch/at91_rstc.h>
  32 #include <asm/arch/gpio.h>
  33
  34 #if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB)
  35 # include <net.h>
  36 #endif
  37 #include <netdev.h>
  38
  39 DECLARE_GLOBAL_DATA_PTR;
  40
  41 /* ------------------------------------------------------------------------- */
  42 /*
  43  * Miscelaneous platform dependent initialisations
  44  */
  45
  46 #ifdef CONFIG_CMD_NAND
  47 static void at91sam9260ek_nand_hw_init(void)
  48 {
  49         struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
  50         struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
  51         unsigned long csa;
  52
  53         /* Assign CS3 to NAND/SmartMedia Interface */
  54         csa = readl(&matrix->ebicsa);
  55         csa |= AT91_MATRIX_CS3A_SMC_SMARTMEDIA;
  56         writel(csa, &matrix->ebicsa);
  57
  58         /* Configure SMC CS3 for NAND/SmartMedia */
  59         writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) |
  60                 AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0),
  61                 &smc->cs[3].setup);
  62         writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) |
  63                 AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3),
  64                 &smc->cs[3].pulse);
  65         writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5),
  66                 &smc->cs[3].cycle);
  67         writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
  68                 AT91_SMC_MODE_EXNW_DISABLE |
  69 #ifdef CONFIG_SYS_NAND_DBW_16
  70                 AT91_SMC_MODE_DBW_16 |
  71 #else /* CONFIG_SYS_NAND_DBW_8 */
  72                 AT91_SMC_MODE_DBW_8 |
  73 #endif
  74                 AT91_SMC_MODE_TDF_CYCLE(2),
  75                 &smc->cs[3].mode);
  76
  77         /* Configure RDY/BSY */
  78         at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
  79
  80         /* Enable NandFlash */
  81         at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
  82
  83 }
  84 #endif
  85
  86 #ifdef CONFIG_MACB
  87 static void at91sam9260ek_macb_hw_init(void)
  88 {
  89         struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
  90         struct at91_port *pioa = (struct at91_port *)ATMEL_BASE_PIOA;
  91         struct at91_rstc *rstc = (struct at91_rstc *)ATMEL_BASE_RSTC;
  92         unsigned long erstl;
  93
  94         /* Enable EMAC clock */
  95         writel(1 << ATMEL_ID_EMAC0, &pmc->pcer);
  96
  97         /*
  98          * Disable pull-up on:
  99          *      RXDV (PA17) => PHY normal mode (not Test mode)
 100          *      ERX0 (PA14) => PHY ADDR0
 101          *      ERX1 (PA15) => PHY ADDR1
 102          *      ERX2 (PA25) => PHY ADDR2
 103          *      ERX3 (PA26) => PHY ADDR3
 104          *      ECRS (PA28) => PHY ADDR4  => PHYADDR = 0x0
 105          *
 106          * PHY has internal pull-down
 107          */
 108         writel(pin_to_mask(AT91_PIN_PA14) |
 109                 pin_to_mask(AT91_PIN_PA15) |
 110                 pin_to_mask(AT91_PIN_PA17) |
 111                 pin_to_mask(AT91_PIN_PA25) |
 112                 pin_to_mask(AT91_PIN_PA26) |
 113                 pin_to_mask(AT91_PIN_PA28),
 114                 &pioa->pudr);
 115
 116         erstl = readl(&rstc->mr) & AT91_RSTC_MR_ERSTL_MASK;
 117
 118         /* Need to reset PHY -> 500ms reset */
 119         writel(AT91_RSTC_KEY | AT91_RSTC_MR_ERSTL(13) |
 120                 AT91_RSTC_MR_URSTEN, &rstc->mr);
 121
 122         writel(AT91_RSTC_KEY | AT91_RSTC_CR_EXTRST, &rstc->cr);
 123
 124         /* Wait for end hardware reset */
 125         while (!(readl(&rstc->sr) & AT91_RSTC_SR_NRSTL))
 126                 ;
 127
 128         /* Restore NRST value */
 129         writel(AT91_RSTC_KEY | erstl | AT91_RSTC_MR_URSTEN,
 130                 &rstc->mr);
 131
 132         /* Re-enable pull-up */
 133         writel(pin_to_mask(AT91_PIN_PA14) |
 134                 pin_to_mask(AT91_PIN_PA15) |
 135                 pin_to_mask(AT91_PIN_PA17) |
 136                 pin_to_mask(AT91_PIN_PA25) |
 137                 pin_to_mask(AT91_PIN_PA26) |
 138                 pin_to_mask(AT91_PIN_PA28),
 139                 &pioa->puer);
 140
 141         /* Initialize EMAC=MACB hardware */
 142         at91_macb_hw_init();
 143 }
 144 #endif
 145
 146 int board_early_init_f(void)
 147 {
 148         struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
 149
 150         /* Enable clocks for all PIOs */
 151         writel((1 << ATMEL_ID_PIOA) | (1 << ATMEL_ID_PIOB) |
 152                 (1 << ATMEL_ID_PIOC),
 153                 &pmc->pcer);
 154
 155         return 0;
 156 }
 157
 158 int board_init(void)
 159 {
 160 #ifdef CONFIG_AT91SAM9G20EK_2MMC
 161         /* arch number of AT91SAM9G20EK_2MMC-Board */
 162         gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9G20EK_2MMC;
 163 #else
 164 #ifdef CONFIG_AT91SAM9G20EK
 165         /* arch number of AT91SAM9G20EK-Board */
 166         gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9G20EK;
 167 #else
 168         /* arch number of AT91SAM9260EK-Board */
 169         gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9260EK;
 170 #endif
 171 #endif
 172         /* adress of boot parameters */
 173         gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
 174
 175         at91_seriald_hw_init();
 176 #ifdef CONFIG_CMD_NAND
 177         at91sam9260ek_nand_hw_init();
 178 #endif
 179 #ifdef CONFIG_HAS_DATAFLASH
 180         at91_spi0_hw_init((1 << 0) | (1 << 1));
 181 #endif
 182 #ifdef CONFIG_MACB
 183         at91sam9260ek_macb_hw_init();
 184 #endif
 185
 186         return 0;
 187 }
 188
 189 int dram_init(void)
 190 {
 191         gd->ram_size = get_ram_size(
 192                 (void *)CONFIG_SYS_SDRAM_BASE,
 193                 CONFIG_SYS_SDRAM_SIZE);
 194         return 0;
 195 }
 196
 197 #ifdef CONFIG_RESET_PHY_R
 198 void reset_phy(void)
 199 {
 200 }
 201 #endif
 202
 203 int board_eth_init(bd_t *bis)
 204 {
 205         int rc = 0;
 206 #ifdef CONFIG_MACB
 207         rc = macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC0, 0x00);
 208 #endif
 209         return rc;
 210 }